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authorGabe Black <gblack@eecs.umich.edu>2009-09-16 19:29:51 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-09-16 19:29:51 -0700
commitc876a781a592c75b38853b2ec4b7d9435f1444cf (patch)
treebfb80fe5b2a1672fca3ab5a6b713b7d5262494c5 /src
parent7a0ef6c36fa4f188fecfd709436dfa52bb0918d6 (diff)
downloadgem5-c876a781a592c75b38853b2ec4b7d9435f1444cf.tar.xz
X86: Sign extend the immediate of wripi like the register version.
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/isa/microops/regop.isa14
1 files changed, 9 insertions, 5 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index a8d50f17c..fd1ad6925 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -324,11 +324,12 @@ let {{
matcher.sub(src2_name, flag_code),
matcher.sub(src2_name, cond_check),
matcher.sub(src2_name, else_code))
+ imm_name = "%simm8" % match.group("prefix")
self.buildCppClasses(name + "i", Name, suffix + "Imm",
- matcher.sub("imm8", code),
- matcher.sub("imm8", flag_code),
- matcher.sub("imm8", cond_check),
- matcher.sub("imm8", else_code))
+ matcher.sub(imm_name, code),
+ matcher.sub(imm_name, flag_code),
+ matcher.sub(imm_name, cond_check),
+ matcher.sub(imm_name, else_code))
return
# If there's something optional to do with flags, generate
@@ -353,13 +354,16 @@ let {{
matcher = re.compile("(?<!\w)spsrc2(?!\w)")
if matcher.search(allCode):
code = "int64_t spsrc2 = signedPick(SrcReg2, 1, dataSize);" + code
+ matcher = re.compile("(?<!\w)simm8(?!\w)")
+ if matcher.search(allCode):
+ code = "int8_t simm8 = imm8;" + code
base = "X86ISA::RegOp"
# If imm8 shows up in the code, use the immediate templates, if
# not, hopefully the register ones will be correct.
templates = regTemplates
- matcher = re.compile("(?<!\w)imm8(?!\w)")
+ matcher = re.compile("(?<!\w)s?imm8(?!\w)")
if matcher.search(allCode):
base += "Imm"
templates = immTemplates