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authorAli Saidi <saidi@eecs.umich.edu>2007-01-16 19:06:05 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-01-16 19:06:05 -0500
commitecfd628ecd394f8e7df654ffc7c342d959e12e15 (patch)
treed8d7740c4472718cea0f93bb4cbf04eff9e71421 /src
parent9d04510869fe66d59a168660925a8387c0fba1b8 (diff)
downloadgem5-ecfd628ecd394f8e7df654ffc7c342d959e12e15.tar.xz
Modify ISA and staticInst to support a IsFirstMicroOp flag
Increment instruction count on first micro-op instead of last src/arch/sparc/isa/decoder.isa: Implement a twin load for ASI_LDTX_P(0xe2) src/arch/sparc/isa/formats/mem/blockmem.isa: set the new flag IsFirstMicroOp when needed src/cpu/simple/atomic.cc: Increment instruction count on first micro-op instead of last (because if we take a fault on a micro coded instruction it should be counted twice acording to legion) src/cpu/static_inst.hh: Add IsFirstMicroop flag to static insts --HG-- extra : convert_revision : 02bea93d38c03bbafe4570665eb4c01c11caa2fc
Diffstat (limited to 'src')
-rw-r--r--src/arch/sparc/isa/decoder.isa3
-rw-r--r--src/arch/sparc/isa/formats/mem/blockmem.isa6
-rw-r--r--src/cpu/simple/atomic.cc2
-rw-r--r--src/cpu/static_inst.hh2
4 files changed, 10 insertions, 3 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 2e1344a8f..bd1a44342 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -1079,6 +1079,9 @@ decode OP default Unknown::unknown()
//ASI_LDTX_N_L
0x2F: TwinLoad::ldtx_n_l(
{{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
+ //ASI_LDTX_P
+ 0xE2: TwinLoad::ldtx_p(
+ {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
default: ldtwa({{
uint64_t val = Mem.udw;
RdLow = val<31:0>;
diff --git a/src/arch/sparc/isa/formats/mem/blockmem.isa b/src/arch/sparc/isa/formats/mem/blockmem.isa
index 5d05dad03..32421a75f 100644
--- a/src/arch/sparc/isa/formats/mem/blockmem.isa
+++ b/src/arch/sparc/isa/formats/mem/blockmem.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -451,6 +451,8 @@ let {{
flag_code = ''
if (microPc == 7):
flag_code = "flags[IsLastMicroOp] = true;"
+ elif (microPc == 0):
+ flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;"
else:
flag_code = "flags[IsDelayedCommit] = true;"
pcedCode = matcher.sub("Frd_%d" % microPc, code)
@@ -492,7 +494,7 @@ let {{
flag_code = "flags[IsLastMicroOp] = true;"
pcedCode = matcher.sub("RdHigh", code)
else:
- flag_code = "flags[IsDelayedCommit] = true;"
+ flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;"
pcedCode = matcher.sub("RdLow", code)
iop = InstObjParams(name, Name, 'TwinMem', pcedCode,
opt_flags, {"ea_code": addrCalcReg,
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 8db864153..3b3536e44 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -497,7 +497,7 @@ AtomicSimpleCPU::tick()
// @todo remove me after debugging with legion done
if (curStaticInst && (!curStaticInst->isMicroOp() ||
- curStaticInst->isLastMicroOp()))
+ curStaticInst->isFirstMicroOp()))
instCnt++;
if (simulate_stalls) {
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 523cfae40..5928eea76 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -146,6 +146,7 @@ class StaticInstBase : public RefCounted
IsMicroOp, ///< Is a microop
IsDelayedCommit, ///< This microop doesn't commit right away
IsLastMicroOp, ///< This microop ends a microop sequence
+ IsFirstMicroOp, ///< This microop begins a microop sequence
//This flag doesn't do anything yet
IsMicroBranch, ///< This microop branches within the microcode for a macroop
@@ -244,6 +245,7 @@ class StaticInstBase : public RefCounted
bool isMicroOp() const { return flags[IsMicroOp]; }
bool isDelayedCommit() const { return flags[IsDelayedCommit]; }
bool isLastMicroOp() const { return flags[IsLastMicroOp]; }
+ bool isFirstMicroOp() const { return flags[IsFirstMicroOp]; }
//This flag doesn't do anything yet
bool isMicroBranch() const { return flags[IsMicroBranch]; }
//@}