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authorKe Meng <mengke97@hotmail.com>2008-01-14 11:47:32 -0500
committerKe Meng <mengke97@hotmail.com>2008-01-14 11:47:32 -0500
commit0b6876a0c0a999410311e0397d366a47728d749a (patch)
treec0de8c76dff0105fd0aac13f5896163f1bea0403 /src
parentc08b7802a9caa7823e75a71839bac14a65a3102b (diff)
downloadgem5-0b6876a0c0a999410311e0397d366a47728d749a.tar.xz
The reason is that the event is supposed to put the instructions ready to execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state.
Signed-off by: Ali Saidi <saidi@eecs.umich.edu> --HG-- extra : convert_revision : dafc16814383e8e8f8320845edf6ab2bcfed1e1d
Diffstat (limited to 'src')
-rw-r--r--src/cpu/o3/inst_queue_impl.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index aea62f12d..b14a63a17 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -667,7 +667,7 @@ InstructionQueue<Impl>::processFUCompletion(DynInstPtr &inst, int fu_idx)
// @todo: Ensure that these FU Completions happen at the beginning
// of a cycle, otherwise they could add too many instructions to
// the queue.
- issueToExecuteQueue->access(0)->size++;
+ issueToExecuteQueue->access(-1)->size++;
instsToExecute.push_back(inst);
}
@@ -752,7 +752,7 @@ InstructionQueue<Impl>::scheduleReadyInsts()
FUCompletion *execution = new FUCompletion(issuing_inst,
idx, this);
- execution->schedule(curTick + cpu->ticks(issue_latency - 1));
+ execution->schedule(curTick + cpu->ticks(op_latency - 1));
// @todo: Enforce that issue_latency == 1 or op_latency
if (issue_latency > 1) {