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authorGabe Black <gblack@eecs.umich.edu>2006-12-06 11:40:41 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-06 11:40:41 -0500
commit50b8cce355bc26a625e17a2651777340aa90a706 (patch)
treecf72e77830e82056342e35ccddef3f2088163a29 /src
parentf04fcf58f1dc7adcf67e19ca00ff741775982dfa (diff)
downloadgem5-50b8cce355bc26a625e17a2651777340aa90a706.tar.xz
Use the renamed register index, rather than the flattened one.
--HG-- extra : convert_revision : 599650c408667bb1b8db20a6847b9e697f7b49e4
Diffstat (limited to 'src')
-rw-r--r--src/cpu/o3/sparc/dyn_inst.hh16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/o3/sparc/dyn_inst.hh b/src/cpu/o3/sparc/dyn_inst.hh
index c645b832b..2d73ca8d1 100644
--- a/src/cpu/o3/sparc/dyn_inst.hh
+++ b/src/cpu/o3/sparc/dyn_inst.hh
@@ -139,23 +139,23 @@ class SparcDynInst : public BaseDynInst<Impl>
TheISA::FloatReg readFloatReg(const StaticInst *si, int idx, int width)
{
- return this->cpu->readFloatReg(this->_flatSrcRegIdx[idx], width);
+ return this->cpu->readFloatReg(this->_srcRegIdx[idx], width);
}
TheISA::FloatReg readFloatReg(const StaticInst *si, int idx)
{
- return this->cpu->readFloatReg(this->_flatSrcRegIdx[idx]);
+ return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
}
TheISA::FloatRegBits readFloatRegBits(const StaticInst *si,
int idx, int width)
{
- return this->cpu->readFloatRegBits(this->_flatSrcRegIdx[idx], width);
+ return this->cpu->readFloatRegBits(this->_srcRegIdx[idx], width);
}
TheISA::FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
{
- return this->cpu->readFloatRegBits(this->_flatSrcRegIdx[idx]);
+ return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
}
/** @todo: Make results into arrays so they can handle multiple dest
@@ -171,27 +171,27 @@ class SparcDynInst : public BaseDynInst<Impl>
void setFloatReg(const StaticInst *si, int idx,
TheISA::FloatReg val, int width)
{
- this->cpu->setFloatReg(this->_flatDestRegIdx[idx], val, width);
+ this->cpu->setFloatReg(this->_destRegIdx[idx], val, width);
BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
}
void setFloatReg(const StaticInst *si, int idx, TheISA::FloatReg val)
{
- this->cpu->setFloatReg(this->_flatDestRegIdx[idx], val);
+ this->cpu->setFloatReg(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setFloatReg(si, idx, val);
}
void setFloatRegBits(const StaticInst *si, int idx,
TheISA::FloatRegBits val, int width)
{
- this->cpu->setFloatRegBits(this->_flatDestRegIdx[idx], val, width);
+ this->cpu->setFloatRegBits(this->_destRegIdx[idx], val, width);
BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
}
void setFloatRegBits(const StaticInst *si,
int idx, TheISA::FloatRegBits val)
{
- this->cpu->setFloatRegBits(this->_flatDestRegIdx[idx], val);
+ this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
}