summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
commit90c2284714740a5febcc338eb2d2ebc064cfeb97 (patch)
tree1861a5552b06b2b9557e062fe3344f76ac45f2a2 /src
parent61b8e332253510c3c033153303b0a9ef09a31f1e (diff)
downloadgem5-90c2284714740a5febcc338eb2d2ebc064cfeb97.tar.xz
ARM: Decode the saturation instructions.
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/isa/formats/data.isa50
1 files changed, 42 insertions, 8 deletions
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index cd902242e..627c17ca0 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -131,12 +131,20 @@ def format ArmPackUnpackSatReverse() {{
const uint32_t a = bits(machInst, 19, 16);
const uint32_t op2 = bits(machInst, 7, 5);
if (bits(op2, 0) == 0) {
+ const IntRegIndex rn =
+ (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
+ const IntRegIndex rd =
+ (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
+ const uint32_t satImm = bits(machInst, 20, 16);
+ const uint32_t imm = bits(machInst, 11, 7);
+ const ArmShiftType type =
+ (ArmShiftType)(uint32_t)bits(machInst, 6, 5);
if (op1 == 0) {
return new WarnUnimplemented("pkh", machInst);
} else if (bits(op1, 2, 1) == 1) {
- return new WarnUnimplemented("ssat", machInst);
+ return new Ssat(machInst, rd, satImm + 1, rn, imm, type);
} else if (bits(op1, 2, 1) == 3) {
- return new WarnUnimplemented("usat", machInst);
+ return new Usat(machInst, rd, satImm, rn, imm, type);
}
return new Unknown(machInst);
}
@@ -154,7 +162,12 @@ def format ArmPackUnpackSatReverse() {{
break;
case 0x2:
if (op2 == 0x1) {
- return new WarnUnimplemented("ssat16", machInst);
+ const IntRegIndex rn =
+ (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
+ const IntRegIndex rd =
+ (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
+ const uint32_t satImm = bits(machInst, 20, 16);
+ return new Ssat16(machInst, rd, satImm + 1, rn);
} else if (op2 == 0x3) {
if (a == 0xf) {
return new WarnUnimplemented("sxtb", machInst);
@@ -191,7 +204,12 @@ def format ArmPackUnpackSatReverse() {{
break;
case 0x6:
if (op2 == 0x1) {
- return new WarnUnimplemented("usat16", machInst);
+ const IntRegIndex rn =
+ (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
+ const IntRegIndex rd =
+ (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
+ const uint32_t satImm = bits(machInst, 20, 16);
+ return new Usat16(machInst, rd, satImm, rn);
} else if (op2 == 0x3) {
if (a == 0xf) {
return new WarnUnimplemented("uxtb", machInst);
@@ -1108,11 +1126,19 @@ def format Thumb32DataProcPlainBin() {{
}
case 0x12:
if (!(bits(machInst, 14, 12) || bits(machInst, 7, 6))) {
- return new WarnUnimplemented("ssat16", machInst);
+ const uint32_t satImm = bits(machInst, 4, 0);
+ return new Ssat16(machInst, rd, satImm + 1, rn);
}
// Fall through on purpose...
case 0x10:
- return new WarnUnimplemented("ssat", machInst);
+ {
+ const uint32_t satImm = bits(machInst, 4, 0);
+ const uint32_t imm = bits(machInst, 7, 6) |
+ (bits(machInst, 14, 12) << 2);
+ const ArmShiftType type =
+ (ArmShiftType)(uint32_t)bits(machInst, 21, 20);
+ return new Ssat(machInst, rd, satImm + 1, rn, imm, type);
+ }
case 0x14:
return new WarnUnimplemented("sbfx", machInst);
case 0x16:
@@ -1123,11 +1149,19 @@ def format Thumb32DataProcPlainBin() {{
}
case 0x1a:
if (!(bits(machInst, 14, 12) || bits(machInst, 7, 6))) {
- return new WarnUnimplemented("usat16", machInst);
+ const uint32_t satImm = bits(machInst, 4, 0);
+ return new Usat16(machInst, rd, satImm, rn);
}
// Fall through on purpose...
case 0x18:
- return new WarnUnimplemented("usat", machInst);
+ {
+ const uint32_t satImm = bits(machInst, 4, 0);
+ const uint32_t imm = bits(machInst, 7, 6) |
+ (bits(machInst, 14, 12) << 2);
+ const ArmShiftType type =
+ (ArmShiftType)(uint32_t)bits(machInst, 21, 20);
+ return new Usat(machInst, rd, satImm, rn, imm, type);
+ }
case 0x1c:
return new WarnUnimplemented("ubfx", machInst);
default: