Checker: Fix checker CPU ports

This patch updates how the checker CPU handles the ports such that the
regressions will once again run without causing a panic.

A minor amount of tidying up was also done as part of this patch.

2 files changed, 21 insertions, 19 deletions

diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index 73205dc35..3c1690ac3 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -65,7 +65,8 @@ CheckerCPU::init()
 }
 
 CheckerCPU::CheckerCPU(Params *p)
-    : BaseCPU(p, true), thread(NULL), tc(NULL)
+    : BaseCPU(p, true), systemPtr(NULL), icachePort(NULL), dcachePort(NULL),
+      tc(NULL), thread(NULL)
 {
     memReq = NULL;
     curStaticInst = NULL;
@@ -83,9 +84,7 @@ CheckerCPU::CheckerCPU(Params *p)
     warnOnlyOnLoadError = p->warnOnlyOnLoadError;
     itb = p->itb;
     dtb = p->dtb;
-    systemPtr = NULL;
     workload = p->workload;
-    thread = NULL;
 
     updateOnError = true;
 }
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 72dc2ce3e..6bd2b7e31 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -98,42 +98,40 @@ class CheckerCPU : public BaseCPU
   public:
     virtual void init();
 
-  public:
     typedef CheckerCPUParams Params;
-    const Params *params() const
-    { return reinterpret_cast<const Params *>(_params); }
     CheckerCPU(Params *p);
     virtual ~CheckerCPU();
 
-    std::vector<Process*> workload;
-
     void setSystem(System *system);
 
-    System *systemPtr;
-
     void setIcachePort(CpuPort *icache_port);
 
-    CpuPort *icachePort;
-
     void setDcachePort(CpuPort *dcache_port);
 
-    CpuPort *dcachePort;
-
     CpuPort &getDataPort()
     {
-        panic("Not supported on checker!");
+        // the checker does not have ports on its own so return the
+        // data port of the actual CPU core
+        assert(dcachePort);
         return *dcachePort;
     }
 
     CpuPort &getInstPort()
     {
-        panic("Not supported on checker!");
+        // the checker does not have ports on its own so return the
+        // data port of the actual CPU core
+        assert(icachePort);
         return *icachePort;
     }
 
-  public:
-    // Primary thread being run.
-    SimpleThread *thread;
+  protected:
+
+    std::vector<Process*> workload;
+
+    System *systemPtr;
+
+    CpuPort *icachePort;
+    CpuPort *dcachePort;
 
     ThreadContext *tc;
 
@@ -167,6 +165,11 @@ class CheckerCPU : public BaseCPU
 
     std::queue<int> miscRegIdxs;
 
+  public:
+
+    // Primary thread being run.
+    SimpleThread *thread;
+
     TheISA::TLB* getITBPtr() { return itb; }
     TheISA::TLB* getDTBPtr() { return dtb; }