diff options
author | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-10-18 11:04:42 -0700 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-10-18 11:04:42 -0700 |
commit | 15a3a7b37b34da286f89ee07230ff6cd2b55c5f6 (patch) | |
tree | 8451c2a006618901b9abd370d0b8aaab97123164 /src | |
parent | 912f3d707412b9a6001fe816d7a56a9743c86e34 (diff) | |
parent | 010b13c937c80b9138d5c70fda6c47ea75d2a9b3 (diff) | |
download | gem5-15a3a7b37b34da286f89ee07230ff6cd2b55c5f6.tar.xz |
merged with ISA event manager fix
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/alpha/isa.cc | 4 | ||||
-rw-r--r-- | src/arch/alpha/isa.hh | 5 | ||||
-rw-r--r-- | src/arch/arm/isa.hh | 5 | ||||
-rw-r--r-- | src/arch/mips/isa.hh | 7 | ||||
-rw-r--r-- | src/cpu/simple_thread.cc | 10 | ||||
-rw-r--r-- | src/dev/mc146818.cc | 22 |
6 files changed, 41 insertions, 12 deletions
diff --git a/src/arch/alpha/isa.cc b/src/arch/alpha/isa.cc index eee391a0d..8b6da3649 100644 --- a/src/arch/alpha/isa.cc +++ b/src/arch/alpha/isa.cc @@ -36,7 +36,7 @@ namespace AlphaISA { void -ISA::serialize(std::ostream &os) +ISA::serialize(EventManager *em, std::ostream &os) { SERIALIZE_SCALAR(fpcr); SERIALIZE_SCALAR(uniq); @@ -46,7 +46,7 @@ ISA::serialize(std::ostream &os) } void -ISA::unserialize(Checkpoint *cp, const std::string §ion) +ISA::unserialize(EventManager *em, Checkpoint *cp, const std::string §ion) { UNSERIALIZE_SCALAR(fpcr); UNSERIALIZE_SCALAR(uniq); diff --git a/src/arch/alpha/isa.hh b/src/arch/alpha/isa.hh index 622d1da4c..574b50841 100644 --- a/src/arch/alpha/isa.hh +++ b/src/arch/alpha/isa.hh @@ -83,8 +83,9 @@ namespace AlphaISA intr_flag = 0; } - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(EventManager *em, std::ostream &os); + void unserialize(EventManager *em, Checkpoint *cp, + const std::string §ion); void reset(std::string core_name, ThreadID num_threads, unsigned num_vpes, BaseCPU *_cpu) diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 2315afa9e..9b21c03cd 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -95,9 +95,10 @@ namespace ArmISA return reg; } - void serialize(std::ostream &os) + void serialize(EventManager *em, std::ostream &os) {} - void unserialize(Checkpoint *cp, const std::string §ion) + void unserialize(EventManager *em, Checkpoint *cp, + const std::string §ion) {} ISA() diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh index 15c043dc0..165adff83 100644 --- a/src/arch/mips/isa.hh +++ b/src/arch/mips/isa.hh @@ -172,8 +172,11 @@ namespace MipsISA return reg; } - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(EventManager *em, std::ostream &os) + {} + void unserialize(EventManager *em, Checkpoint *cp, + const std::string §ion) + {} }; } diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index 92c6ad69b..ad69719ee 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -199,6 +199,11 @@ SimpleThread::serialize(ostream &os) SERIALIZE_SCALAR(nextPC); SERIALIZE_SCALAR(nextNPC); // thread_num and cpu_id are deterministic from the config + + // + // Now must serialize all the ISA dependent state + // + isa.serialize(cpu, os); } @@ -214,6 +219,11 @@ SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(nextPC); UNSERIALIZE_SCALAR(nextNPC); // thread_num and cpu_id are deterministic from the config + + // + // Now must unserialize all the ISA dependent state + // + isa.unserialize(cpu, cp, section); } #if FULL_SYSTEM diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc index b25b015d2..0bb6558c8 100644 --- a/src/dev/mc146818.cc +++ b/src/dev/mc146818.cc @@ -207,6 +207,15 @@ MC146818::serialize(const string &base, ostream &os) arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data)); paramOut(os, base + ".stat_regA", stat_regA); paramOut(os, base + ".stat_regB", stat_regB); + + // + // save the timer tick and rtc clock tick values to correctly reschedule + // them during unserialize + // + Tick rtcTimerInterruptTickOffset = event.when() - curTick; + SERIALIZE_SCALAR(rtcTimerInterruptTickOffset); + Tick rtcClockTickOffset = event.when() - curTick; + SERIALIZE_SCALAR(rtcClockTickOffset); } void @@ -218,10 +227,15 @@ MC146818::unserialize(const string &base, Checkpoint *cp, paramIn(cp, section, base + ".stat_regA", stat_regA); paramIn(cp, section, base + ".stat_regB", stat_regB); - // We're not unserializing the event here, but we need to - // rescehedule the event since curTick was moved forward by the - // checkpoint - reschedule(event, curTick + event.interval); + // + // properly schedule the timer and rtc clock events + // + Tick rtcTimerInterruptTickOffset; + UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset); + reschedule(event, curTick + rtcTimerInterruptTickOffset); + Tick rtcClockTickOffset; + UNSERIALIZE_SCALAR(rtcClockTickOffset); + reschedule(tickEvent, curTick + rtcClockTickOffset); } MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i) |