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authorAli Saidi <saidi@eecs.umich.edu>2007-01-30 18:27:16 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-01-30 18:27:16 -0500
commit36a1912bf01433acc86837ed60da6d510323aa1e (patch)
tree7d9c35533d7e6a1c46cd75b98658bf6e46a55d48 /src
parentcf0ba1dfb09c0e16201d963b76078625dc7adca4 (diff)
parentac36fb6e64dadb9eef5c48863b42969a61bbdaec (diff)
downloadgem5-36a1912bf01433acc86837ed60da6d510323aa1e.tar.xz
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 276b640c5c5a51e88e9bd630960ad462d9f0cb8d
Diffstat (limited to 'src')
-rw-r--r--src/arch/sparc/floatregfile.cc6
-rw-r--r--src/arch/sparc/intregfile.cc17
-rw-r--r--src/arch/sparc/miscregfile.cc152
-rw-r--r--src/arch/sparc/pagetable.cc9
-rw-r--r--src/arch/sparc/regfile.cc2
-rw-r--r--src/arch/sparc/tlb.cc46
-rw-r--r--src/cpu/base.cc12
-rw-r--r--src/cpu/base.hh6
-rw-r--r--src/cpu/cpuevent.hh1
-rw-r--r--src/cpu/exetrace.cc12
-rw-r--r--src/cpu/m5legion_interface.h3
-rw-r--r--src/dev/sparc/t1000.cc12
-rw-r--r--src/dev/sparc/t1000.hh13
-rw-r--r--src/sim/serialize.cc12
-rw-r--r--src/sim/serialize.hh7
15 files changed, 225 insertions, 85 deletions
diff --git a/src/arch/sparc/floatregfile.cc b/src/arch/sparc/floatregfile.cc
index 6f04ca829..585782ddb 100644
--- a/src/arch/sparc/floatregfile.cc
+++ b/src/arch/sparc/floatregfile.cc
@@ -183,13 +183,15 @@ Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
void FloatRegFile::serialize(std::ostream &os)
{
- SERIALIZE_ARRAY((unsigned char *)regSpace,
+ uint8_t *float_reg = (uint8_t*)regSpace;
+ SERIALIZE_ARRAY(float_reg,
SingleWidth / 8 * NumFloatRegs);
}
void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
{
- UNSERIALIZE_ARRAY((unsigned char *)regSpace,
+ uint8_t *float_reg = (uint8_t*)regSpace;
+ UNSERIALIZE_ARRAY(float_reg,
SingleWidth / 8 * NumFloatRegs);
}
diff --git a/src/arch/sparc/intregfile.cc b/src/arch/sparc/intregfile.cc
index 2c9d9b162..39a613a0d 100644
--- a/src/arch/sparc/intregfile.cc
+++ b/src/arch/sparc/intregfile.cc
@@ -81,6 +81,8 @@ IntReg IntRegFile::readReg(int intReg)
{
DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, regs[intReg]);
return regs[intReg];
+ /* XXX Currently not used. When used again regView/offset need to be
+ * serialized!
IntReg val;
if(intReg < NumIntArchRegs)
val = regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask];
@@ -92,6 +94,7 @@ IntReg IntRegFile::readReg(int intReg)
DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, val);
return val;
+ */
}
void IntRegFile::setReg(int intReg, const IntReg &val)
@@ -102,6 +105,8 @@ void IntRegFile::setReg(int intReg, const IntReg &val)
regs[intReg] = val;
}
return;
+ /* XXX Currently not used. When used again regView/offset need to be
+ * serialized!
if(intReg)
{
DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);
@@ -111,7 +116,7 @@ void IntRegFile::setReg(int intReg, const IntReg &val)
microRegs[intReg] = val;
else
panic("Tried to set non-existant integer register\n");
- }
+ } */
}
//This doesn't effect the actual CWP register.
@@ -148,20 +153,26 @@ void IntRegFile::setGlobals(int gl)
void IntRegFile::serialize(std::ostream &os)
{
+ SERIALIZE_ARRAY(regs, NumIntRegs);
+ SERIALIZE_ARRAY(microRegs, NumMicroIntRegs);
+
+ /* the below doesn't seem needed unless gabe makes regview work*/
unsigned int x;
for(x = 0; x < MaxGL; x++)
SERIALIZE_ARRAY(regGlobals[x], RegsPerFrame);
for(x = 0; x < 2 * NWindows; x++)
SERIALIZE_ARRAY(regSegments[x], RegsPerFrame);
- SERIALIZE_ARRAY(microRegs, NumMicroIntRegs);
}
void IntRegFile::unserialize(Checkpoint *cp, const std::string &section)
{
+ UNSERIALIZE_ARRAY(regs, NumIntRegs);
+ UNSERIALIZE_ARRAY(microRegs, NumMicroIntRegs);
+
+ /* the below doesn't seem needed unless gabe makes regview work*/
unsigned int x;
for(x = 0; x < MaxGL; x++)
UNSERIALIZE_ARRAY(regGlobals[x], RegsPerFrame);
for(unsigned int x = 0; x < 2 * NWindows; x++)
UNSERIALIZE_ARRAY(regSegments[x], RegsPerFrame);
- UNSERIALIZE_ARRAY(microRegs, NumMicroIntRegs);
}
diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index 422bc2fbe..0fe3e96b2 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -125,6 +125,11 @@ void MiscRegFile::clear()
dTlbTagAccess = 0;
memset(scratchPad, 0, sizeof(scratchPad));
+#if FULL_SYSTEM
+ tickCompare = NULL;
+ sTickCompare = NULL;
+ hSTickCompare = NULL;
+#endif
}
MiscReg MiscRegFile::readReg(int miscReg)
@@ -675,32 +680,31 @@ void MiscRegFile::setRegWithEffect(int miscReg,
void MiscRegFile::serialize(std::ostream & os)
{
- SERIALIZE_SCALAR(pstate);
- SERIALIZE_SCALAR(tba);
-// SERIALIZE_SCALAR(y);
- SERIALIZE_SCALAR(pil);
- SERIALIZE_SCALAR(gl);
- SERIALIZE_SCALAR(cwp);
- SERIALIZE_ARRAY(tt, MaxTL);
-// SERIALIZE_SCALAR(ccr);
SERIALIZE_SCALAR(asi);
- SERIALIZE_SCALAR(tl);
- SERIALIZE_ARRAY(tpc, MaxTL);
- SERIALIZE_ARRAY(tnpc, MaxTL);
- SERIALIZE_ARRAY(tstate, MaxTL);
SERIALIZE_SCALAR(tick);
-// SERIALIZE_SCALAR(cansave);
-// SERIALIZE_SCALAR(canrestore);
-// SERIALIZE_SCALAR(otherwin);
-// SERIALIZE_SCALAR(cleanwin);
-// SERIALIZE_SCALAR(wstate);
- SERIALIZE_SCALAR(fsr);
SERIALIZE_SCALAR(fprs);
+ SERIALIZE_SCALAR(gsr);
+ SERIALIZE_SCALAR(softint);
+ SERIALIZE_SCALAR(tick_cmpr);
+ SERIALIZE_SCALAR(stick);
+ SERIALIZE_SCALAR(stick_cmpr);
+ SERIALIZE_ARRAY(tpc,MaxTL);
+ SERIALIZE_ARRAY(tnpc,MaxTL);
+ SERIALIZE_ARRAY(tstate,MaxTL);
+ SERIALIZE_ARRAY(tt,MaxTL);
+ SERIALIZE_SCALAR(tba);
+ SERIALIZE_SCALAR(pstate);
+ SERIALIZE_SCALAR(tl);
+ SERIALIZE_SCALAR(pil);
+ SERIALIZE_SCALAR(cwp);
+ SERIALIZE_SCALAR(gl);
SERIALIZE_SCALAR(hpstate);
- SERIALIZE_ARRAY(htstate, MaxTL);
+ SERIALIZE_ARRAY(htstate,MaxTL);
+ SERIALIZE_SCALAR(hintp);
SERIALIZE_SCALAR(htba);
SERIALIZE_SCALAR(hstick_cmpr);
SERIALIZE_SCALAR(strandStatusReg);
+ SERIALIZE_SCALAR(fsr);
SERIALIZE_SCALAR(priContext);
SERIALIZE_SCALAR(secContext);
SERIALIZE_SCALAR(partId);
@@ -718,6 +722,7 @@ void MiscRegFile::serialize(std::ostream & os)
SERIALIZE_SCALAR(dTlbC0Config);
SERIALIZE_SCALAR(dTlbCXTsbPs0);
SERIALIZE_SCALAR(dTlbCXTsbPs1);
+ SERIALIZE_SCALAR(dTlbCXConfig);
SERIALIZE_SCALAR(dTlbSfsr);
SERIALIZE_SCALAR(dTlbSfar);
SERIALIZE_SCALAR(dTlbTagAccess);
@@ -730,36 +735,70 @@ void MiscRegFile::serialize(std::ostream & os)
SERIALIZE_SCALAR(res_error_tail);
SERIALIZE_SCALAR(nres_error_head);
SERIALIZE_SCALAR(nres_error_tail);
+#if FULL_SYSTEM
+ Tick tick_cmp = 0, stick_cmp = 0, hstick_cmp = 0;
+ ThreadContext *tc = NULL;
+ BaseCPU *cpu = NULL;
+ int tc_num = 0;
+ bool tick_intr_sched = true;
+
+ if (tickCompare)
+ tc = tickCompare->getTC();
+ else if (sTickCompare)
+ tc = sTickCompare->getTC();
+ else if (hSTickCompare)
+ tc = hSTickCompare->getTC();
+ else
+ tick_intr_sched = false;
+
+ SERIALIZE_SCALAR(tick_intr_sched);
+
+ if (tc) {
+ cpu = tc->getCpuPtr();
+ tc_num = cpu->findContext(tc);
+ if (tickCompare && tickCompare->scheduled())
+ tick_cmp = tickCompare->when();
+ if (sTickCompare && sTickCompare->scheduled())
+ stick_cmp = sTickCompare->when();
+ if (hSTickCompare && hSTickCompare->scheduled())
+ hstick_cmp = hSTickCompare->when();
+
+ SERIALIZE_OBJPTR(cpu);
+ SERIALIZE_SCALAR(tc_num);
+ SERIALIZE_SCALAR(tick_cmp);
+ SERIALIZE_SCALAR(stick_cmp);
+ SERIALIZE_SCALAR(hstick_cmp);
+ }
+#endif
}
void MiscRegFile::unserialize(Checkpoint * cp, const std::string & section)
{
- UNSERIALIZE_SCALAR(pstate);
- UNSERIALIZE_SCALAR(tba);
-// UNSERIALIZE_SCALAR(y);
- UNSERIALIZE_SCALAR(pil);
- UNSERIALIZE_SCALAR(gl);
- UNSERIALIZE_SCALAR(cwp);
- UNSERIALIZE_ARRAY(tt, MaxTL);
-// UNSERIALIZE_SCALAR(ccr);
UNSERIALIZE_SCALAR(asi);
- UNSERIALIZE_SCALAR(tl);
- UNSERIALIZE_ARRAY(tpc, MaxTL);
- UNSERIALIZE_ARRAY(tnpc, MaxTL);
- UNSERIALIZE_ARRAY(tstate, MaxTL);
UNSERIALIZE_SCALAR(tick);
-// UNSERIALIZE_SCALAR(cansave);
-// UNSERIALIZE_SCALAR(canrestore);
-// UNSERIALIZE_SCALAR(otherwin);
-// UNSERIALIZE_SCALAR(cleanwin);
-// UNSERIALIZE_SCALAR(wstate);
- UNSERIALIZE_SCALAR(fsr);
UNSERIALIZE_SCALAR(fprs);
+ UNSERIALIZE_SCALAR(gsr);
+ UNSERIALIZE_SCALAR(softint);
+ UNSERIALIZE_SCALAR(tick_cmpr);
+ UNSERIALIZE_SCALAR(stick);
+ UNSERIALIZE_SCALAR(stick_cmpr);
+ UNSERIALIZE_ARRAY(tpc,MaxTL);
+ UNSERIALIZE_ARRAY(tnpc,MaxTL);
+ UNSERIALIZE_ARRAY(tstate,MaxTL);
+ UNSERIALIZE_ARRAY(tt,MaxTL);
+ UNSERIALIZE_SCALAR(tba);
+ UNSERIALIZE_SCALAR(pstate);
+ UNSERIALIZE_SCALAR(tl);
+ UNSERIALIZE_SCALAR(pil);
+ UNSERIALIZE_SCALAR(cwp);
+ UNSERIALIZE_SCALAR(gl);
UNSERIALIZE_SCALAR(hpstate);
- UNSERIALIZE_ARRAY(htstate, MaxTL);
+ UNSERIALIZE_ARRAY(htstate,MaxTL);
+ UNSERIALIZE_SCALAR(hintp);
UNSERIALIZE_SCALAR(htba);
UNSERIALIZE_SCALAR(hstick_cmpr);
UNSERIALIZE_SCALAR(strandStatusReg);
+ UNSERIALIZE_SCALAR(fsr);
UNSERIALIZE_SCALAR(priContext);
UNSERIALIZE_SCALAR(secContext);
UNSERIALIZE_SCALAR(partId);
@@ -777,6 +816,7 @@ void MiscRegFile::unserialize(Checkpoint * cp, const std::string & section)
UNSERIALIZE_SCALAR(dTlbC0Config);
UNSERIALIZE_SCALAR(dTlbCXTsbPs0);
UNSERIALIZE_SCALAR(dTlbCXTsbPs1);
+ UNSERIALIZE_SCALAR(dTlbCXConfig);
UNSERIALIZE_SCALAR(dTlbSfsr);
UNSERIALIZE_SCALAR(dTlbSfar);
UNSERIALIZE_SCALAR(dTlbTagAccess);
@@ -788,4 +828,38 @@ void MiscRegFile::unserialize(Checkpoint * cp, const std::string & section)
UNSERIALIZE_SCALAR(res_error_head);
UNSERIALIZE_SCALAR(res_error_tail);
UNSERIALIZE_SCALAR(nres_error_head);
- UNSERIALIZE_SCALAR(nres_error_tail);}
+ UNSERIALIZE_SCALAR(nres_error_tail);
+
+#if FULL_SYSTEM
+ Tick tick_cmp = 0, stick_cmp = 0, hstick_cmp = 0;
+ ThreadContext *tc = NULL;
+ BaseCPU *cpu = NULL;
+ int tc_num;
+ bool tick_intr_sched;
+ UNSERIALIZE_SCALAR(tick_intr_sched);
+ if (tick_intr_sched) {
+ UNSERIALIZE_OBJPTR(cpu);
+ if (cpu) {
+ UNSERIALIZE_SCALAR(tc_num);
+ UNSERIALIZE_SCALAR(tick_cmp);
+ UNSERIALIZE_SCALAR(stick_cmp);
+ UNSERIALIZE_SCALAR(hstick_cmp);
+ tc = cpu->getContext(tc_num);
+
+ if (tick_cmp) {
+ tickCompare = new TickCompareEvent(this, tc);
+ tickCompare->schedule(tick_cmp);
+ }
+ if (stick_cmp) {
+ sTickCompare = new STickCompareEvent(this, tc);
+ sTickCompare->schedule(stick_cmp);
+ }
+ if (hstick_cmp) {
+ hSTickCompare = new HSTickCompareEvent(this, tc);
+ hSTickCompare->schedule(hstick_cmp);
+ }
+ }
+ }
+
+ #endif
+}
diff --git a/src/arch/sparc/pagetable.cc b/src/arch/sparc/pagetable.cc
index 22130d41c..e91c0599f 100644
--- a/src/arch/sparc/pagetable.cc
+++ b/src/arch/sparc/pagetable.cc
@@ -41,9 +41,12 @@ TlbEntry::serialize(std::ostream &os)
SERIALIZE_SCALAR(range.contextId);
SERIALIZE_SCALAR(range.partitionId);
SERIALIZE_SCALAR(range.real);
- uint64_t entry4u = pte();
+ uint64_t entry4u = 0;
+ if (valid)
+ entry4u = pte();
SERIALIZE_SCALAR(entry4u);
SERIALIZE_SCALAR(used);
+ SERIALIZE_SCALAR(valid);
}
@@ -57,8 +60,10 @@ TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
UNSERIALIZE_SCALAR(range.real);
uint64_t entry4u;
UNSERIALIZE_SCALAR(entry4u);
- pte.populate(entry4u);
+ if (entry4u)
+ pte.populate(entry4u);
UNSERIALIZE_SCALAR(used);
+ UNSERIALIZE_SCALAR(valid);
}
diff --git a/src/arch/sparc/regfile.cc b/src/arch/sparc/regfile.cc
index d39892e73..827e22c31 100644
--- a/src/arch/sparc/regfile.cc
+++ b/src/arch/sparc/regfile.cc
@@ -226,6 +226,7 @@ void RegFile::serialize(std::ostream &os)
miscRegFile.serialize(os);
SERIALIZE_SCALAR(pc);
SERIALIZE_SCALAR(npc);
+ SERIALIZE_SCALAR(nnpc);
}
void RegFile::unserialize(Checkpoint *cp, const std::string &section)
@@ -235,6 +236,7 @@ void RegFile::unserialize(Checkpoint *cp, const std::string &section)
miscRegFile.unserialize(cp, section);
UNSERIALIZE_SCALAR(pc);
UNSERIALIZE_SCALAR(npc);
+ UNSERIALIZE_SCALAR(nnpc);
}
void RegFile::changeContext(RegContextParam param, RegContextVal val)
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index bc3c39294..32e172957 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -1250,13 +1250,55 @@ doMmuWriteError:
void
TLB::serialize(std::ostream &os)
{
- panic("Need to implement serialize tlb for SPARC\n");
+ SERIALIZE_SCALAR(size);
+ SERIALIZE_SCALAR(usedEntries);
+ SERIALIZE_SCALAR(lastReplaced);
+
+ // convert the pointer based free list into an index based one
+ int *free_list = (int*)malloc(sizeof(int) * size);
+ int cntr = 0;
+ std::list<TlbEntry*>::iterator i;
+ i = freeList.begin();
+ while (i != freeList.end()) {
+ free_list[cntr++] = ((size_t)*i - (size_t)tlb)/ sizeof(TlbEntry);
+ i++;
+ }
+ SERIALIZE_SCALAR(cntr);
+ SERIALIZE_ARRAY(free_list, cntr);
+
+ for (int x = 0; x < size; x++) {
+ nameOut(os, csprintf("%s.PTE%d", name(), x));
+ tlb[x].serialize(os);
+ }
}
void
TLB::unserialize(Checkpoint *cp, const std::string &section)
{
- panic("Need to implement unserialize tlb for SPARC\n");
+ int oldSize;
+
+ paramIn(cp, section, "size", oldSize);
+ if (oldSize != size)
+ panic("Don't support unserializing different sized TLBs\n");
+ UNSERIALIZE_SCALAR(usedEntries);
+ UNSERIALIZE_SCALAR(lastReplaced);
+
+ int cntr;
+ UNSERIALIZE_SCALAR(cntr);
+
+ int *free_list = (int*)malloc(sizeof(int) * cntr);
+ freeList.clear();
+ UNSERIALIZE_ARRAY(free_list, cntr);
+ for (int x = 0; x < cntr; x++)
+ freeList.push_back(&tlb[free_list[x]]);
+
+ lookupTable.clear();
+ for (int x = 0; x < size; x++) {
+ tlb[x].unserialize(cp, csprintf("%s.PTE%d", section, x));
+ if (tlb[x].valid)
+ lookupTable.insert(tlb[x].range, &tlb[x]);
+
+ }
}
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index deb4e02c4..8440d2320 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -298,6 +298,16 @@ BaseCPU::registerThreadContexts()
}
+int
+BaseCPU::findContext(ThreadContext *tc)
+{
+ for (int i = 0; i < threadContexts.size(); ++i) {
+ if (tc == threadContexts[i])
+ return i;
+ }
+ return 0;
+}
+
void
BaseCPU::switchOut()
{
@@ -389,12 +399,14 @@ BaseCPU::clear_interrupts()
void
BaseCPU::serialize(std::ostream &os)
{
+ SERIALIZE_SCALAR(instCnt);
interrupts.serialize(os);
}
void
BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
{
+ UNSERIALIZE_SCALAR(instCnt);
interrupts.unserialize(cp, section);
}
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 3ae9c60b6..a1265b748 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -142,6 +142,12 @@ class BaseCPU : public MemObject
/// Notify the CPU that the indicated context is now halted.
virtual void haltContext(int thread_num) {}
+ /// Given a Thread Context pointer return the thread num
+ int findContext(ThreadContext *tc);
+
+ /// Given a thread num get tho thread context for it
+ ThreadContext *getContext(int tn) { return threadContexts[tn]; }
+
public:
struct Params
{
diff --git a/src/cpu/cpuevent.hh b/src/cpu/cpuevent.hh
index c973621c0..5816c6ca1 100644
--- a/src/cpu/cpuevent.hh
+++ b/src/cpu/cpuevent.hh
@@ -71,6 +71,7 @@ class CpuEvent : public Event
*/
static void replaceThreadContext(ThreadContext *oldTc,
ThreadContext *newTc);
+ ThreadContext* getTC() { return tc; }
};
template <class T, void (T::* F)(ThreadContext *tc)>
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 85b08ee32..e34ae3731 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -307,6 +307,7 @@ Trace::InstRecord::dump(ostream &outs)
bool diffHtba = false;
bool diffPstate = false;
bool diffY = false;
+ bool diffFsr = false;
bool diffCcr = false;
bool diffTl = false;
bool diffGl = false;
@@ -410,6 +411,8 @@ Trace::InstRecord::dump(ostream &outs)
if(shared_data->y !=
thread->readIntReg(NumIntArchRegs + 1))
diffY = true;
+ if(shared_data->fsr != thread->readMiscReg(MISCREG_FSR))
+ diffFsr = true;
//if(shared_data->ccr != thread->readMiscReg(MISCREG_CCR))
if(shared_data->ccr !=
thread->readIntReg(NumIntArchRegs + 2))
@@ -450,8 +453,8 @@ Trace::InstRecord::dump(ostream &outs)
if ((diffPC || diffCC || diffInst || diffIntRegs ||
diffFpRegs || diffTpc || diffTnpc || diffTstate ||
diffTt || diffHpstate || diffHtstate || diffHtba ||
- diffPstate || diffY || diffCcr || diffTl || diffGl ||
- diffAsi || diffPil || diffCwp || diffCansave ||
+ diffPstate || diffY || diffCcr || diffTl || diffFsr ||
+ diffGl || diffAsi || diffPil || diffCwp || diffCansave ||
diffCanrestore || diffOtherwin || diffCleanwin || diffTlb)
&& !((staticInst->machInst & 0xC1F80000) == 0x81D00000)
&& !(((staticInst->machInst & 0xC0000000) == 0xC0000000)
@@ -487,6 +490,8 @@ Trace::InstRecord::dump(ostream &outs)
outs << " [Pstate]";
if (diffY)
outs << " [Y]";
+ if (diffFsr)
+ outs << " [FSR]";
if (diffCcr)
outs << " [Ccr]";
if (diffTl)
@@ -556,6 +561,9 @@ Trace::InstRecord::dump(ostream &outs)
//thread->readMiscReg(MISCREG_Y),
thread->readIntReg(NumIntArchRegs + 1),
shared_data->y);
+ printRegPair(outs, "FSR",
+ thread->readMiscReg(MISCREG_FSR),
+ shared_data->fsr);
printRegPair(outs, "Ccr",
//thread->readMiscReg(MISCREG_CCR),
thread->readIntReg(NumIntArchRegs + 2),
diff --git a/src/cpu/m5legion_interface.h b/src/cpu/m5legion_interface.h
index 81714f769..373dc5cdc 100644
--- a/src/cpu/m5legion_interface.h
+++ b/src/cpu/m5legion_interface.h
@@ -30,7 +30,7 @@
#include <unistd.h>
-#define VERSION 0xA1000008
+#define VERSION 0xA1000009
#define OWN_M5 0x000000AA
#define OWN_LEGION 0x00000055
@@ -61,6 +61,7 @@ typedef struct {
uint16_t pstate;
uint64_t y;
+ uint64_t fsr;
uint8_t ccr;
uint8_t tl;
uint8_t gl;
diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc
index 233808631..3a2f881f1 100644
--- a/src/dev/sparc/t1000.cc
+++ b/src/dev/sparc/t1000.cc
@@ -101,18 +101,6 @@ T1000::calcConfigAddr(int bus, int dev, int func)
M5_DUMMY_RETURN
}
-void
-T1000::serialize(std::ostream &os)
-{
- panic("Need implementation\n");
-}
-
-void
-T1000::unserialize(Checkpoint *cp, const std::string &section)
-{
- panic("Need implementation\n");
-}
-
BEGIN_DECLARE_SIM_OBJECT_PARAMS(T1000)
SimObjectParam<System *> system;
diff --git a/src/dev/sparc/t1000.hh b/src/dev/sparc/t1000.hh
index 2955763a9..8e28d90e5 100644
--- a/src/dev/sparc/t1000.hh
+++ b/src/dev/sparc/t1000.hh
@@ -90,19 +90,6 @@ class T1000 : public Platform
* Calculate the configuration address given a bus/dev/func.
*/
virtual Addr calcConfigAddr(int bus, int dev, int func);
-
- /**
- * Serialize this object to the given output stream.
- * @param os The stream to serialize to.
- */
- virtual void serialize(std::ostream &os);
-
- /**
- * Reconstruct the state of this object from a checkpoint.
- * @param cp The checkpoint use.
- * @param section The section name of this object
- */
- virtual void unserialize(Checkpoint *cp, const std::string &section);
};
#endif // __DEV_T1000_HH__
diff --git a/src/sim/serialize.cc b/src/sim/serialize.cc
index 941f0b1c6..1ff16976d 100644
--- a/src/sim/serialize.cc
+++ b/src/sim/serialize.cc
@@ -57,6 +57,8 @@
using namespace std;
+extern SimObject *resolveSimObject(const string &);
+
int Serializable::ckptMaxCount = 0;
int Serializable::ckptCount = 0;
int Serializable::ckptPrevCount = -1;
@@ -158,7 +160,7 @@ arrayParamIn(Checkpoint *cp, const std::string &section,
void
objParamIn(Checkpoint *cp, const std::string &section,
- const std::string &name, Serializable * &param)
+ const std::string &name, SimObject * &param)
{
if (!cp->findObj(section, name, param)) {
fatal("Can't unserialize '%s:%s'\n", section, name);
@@ -388,17 +390,15 @@ Checkpoint::find(const std::string &section, const std::string &entry,
bool
Checkpoint::findObj(const std::string &section, const std::string &entry,
- Serializable *&value)
+ SimObject *&value)
{
string path;
if (!db->find(section, entry, path))
return false;
- if ((value = objMap[path]) != NULL)
- return true;
-
- return false;
+ value = resolveSimObject(path);
+ return true;
}
diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh
index 880fb0785..43cd4ecf4 100644
--- a/src/sim/serialize.hh
+++ b/src/sim/serialize.hh
@@ -47,6 +47,7 @@
class IniFile;
class Serializable;
class Checkpoint;
+class SimObject;
template <class T>
void paramOut(std::ostream &os, const std::string &name, const T &param);
@@ -65,7 +66,7 @@ void arrayParamIn(Checkpoint *cp, const std::string &section,
void
objParamIn(Checkpoint *cp, const std::string &section,
- const std::string &name, Serializable * &param);
+ const std::string &name, SimObject * &param);
//
@@ -96,7 +97,7 @@ objParamIn(Checkpoint *cp, const std::string &section,
#define UNSERIALIZE_OBJPTR(objptr) \
do { \
- Serializable *sptr; \
+ SimObject *sptr; \
objParamIn(cp, section, #objptr, sptr); \
objptr = dynamic_cast<typeof(objptr)>(sptr); \
} while (0)
@@ -225,7 +226,7 @@ class Checkpoint
std::string &value);
bool findObj(const std::string &section, const std::string &entry,
- Serializable *&value);
+ SimObject *&value);
bool sectionExists(const std::string &section);