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authorGabe Black <gblack@eecs.umich.edu>2009-08-17 20:15:16 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-17 20:15:16 -0700
commit45bae0c70f43dc04ccf485e2ea54b892a072cb0c (patch)
tree8cdc6954ef9c853b85e4d25d03a93f98e951d9c8 /src
parent200fed31de52ec783006bb1d7c1dbcc4112e7fb3 (diff)
downloadgem5-45bae0c70f43dc04ccf485e2ea54b892a072cb0c.tar.xz
X86: Implement the multiply and add instructions.
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa60
-rw-r--r--src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py32
-rw-r--r--src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py21
3 files changed, 80 insertions, 33 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index cb57bf9f0..d136fcbce 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -1062,38 +1062,36 @@
}
default: UD2();
}
- }
- 0x1E: decode LEGACY_DECODEVAL {
- // no prefix
- 0x0: decode OPCODE_OP_BOTTOM3 {
- 0x1: Inst::PSLLW(Pq,Qq);
- 0x2: Inst::PSLLD(Pq,Qq);
- 0x3: Inst::PSLLQ(Pq,Qq);
- 0x4: Inst::PMULUDQ(Pq,Qq);
- 0x5: pmaddwd_Pq_Qq();
- 0x6: Inst::PSADBW(Pq,Qq);
- 0x7: maskmovq_Pq_PRq();
- default: Inst::UD2();
- }
- // operand size (0x66)
- 0x1: decode OPCODE_OP_BOTTOM3 {
- 0x1: Inst::PSLLW(Vo,Wo);
- 0x2: Inst::PSLLD(Vo,Wo);
- 0x3: Inst::PSLLQ(Vo,Wo);
- 0x4: Inst::PMULUDQ(Vo,Wo);
- 0x5: pmaddwd_Vo_Wo();
- 0x6: Inst::PSADBW(Vo,Wo);
- 0x7: maskmovdqu_Vo_VRo();
- default: Inst::UD2();
- }
- // repne (0xF2)
- 0x8: decode OPCODE_OP_BOTTOM3 {
- 0x0: lddqu_Vo_Mo();
- default: Inst::UD2();
+ 0x1E: decode LEGACY_DECODEVAL {
+ // no prefix
+ 0x0: decode OPCODE_OP_BOTTOM3 {
+ 0x1: PSLLW(Pq,Qq);
+ 0x2: PSLLD(Pq,Qq);
+ 0x3: PSLLQ(Pq,Qq);
+ 0x4: PMULUDQ(Pq,Qq);
+ 0x5: PMADDWD(Pq,Qq);
+ 0x6: PSADBW(Pq,Qq);
+ 0x7: WarnUnimpl::maskmovq_Pq_PRq();
+ default: UD2();
+ }
+ // operand size (0x66)
+ 0x1: decode OPCODE_OP_BOTTOM3 {
+ 0x1: PSLLW(Vo,Wo);
+ 0x2: PSLLD(Vo,Wo);
+ 0x3: PSLLQ(Vo,Wo);
+ 0x4: PMULUDQ(Vo,Wo);
+ 0x5: PMADDWD(Vo,Wo);
+ 0x6: PSADBW(Vo,Wo);
+ 0x7: WarnUnimpl::maskmovdqu_Vo_VRo();
+ default: UD2();
+ }
+ // repne (0xF2)
+ 0x8: decode OPCODE_OP_BOTTOM3 {
+ 0x0: WarnUnimpl::lddqu_Vo_Mo();
+ default: UD2();
+ }
+ default: UD2();
}
- default: Inst::UD2();
- }
- format Inst {
0x1F: decode LEGACY_DECODEVAL {
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py
index 40b38867b..f157d165f 100644
--- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py
+++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py
@@ -54,5 +54,35 @@
# Authors: Gabe Black
microcode = '''
-# PMADDWD
+def macroop PMADDWD_XMM_XMM {
+ mmuli ufp3, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmml, ufp3, ufp4, size=4, ext=0
+ mmuli ufp3, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmmh, ufp3, ufp4, size=4, ext=0
+};
+
+def macroop PMADDWD_XMM_M {
+ ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
+ ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8
+ mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmml, ufp3, ufp4, size=4, ext=0
+ mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmmh, ufp3, ufp4, size=4, ext=0
+};
+
+def macroop PMADDWD_XMM_P {
+ rdip t7
+ ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
+ ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8
+ mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmml, ufp3, ufp4, size=4, ext=0
+ mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi xmmh, ufp3, ufp4, size=4, ext=0
+};
'''
diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py
index 40b38867b..f6940d159 100644
--- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py
+++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py
@@ -54,5 +54,24 @@
# Authors: Gabe Black
microcode = '''
-# PMADDWD
+def macroop PMADDWD_MMX_MMX {
+ mmuli ufp3, mmx, mmxm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, mmx, mmxm, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi mmx, ufp3, ufp4, size=4, ext=0
+};
+
+def macroop PMADDWD_MMX_M {
+ ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8
+ mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi mmx, ufp3, ufp4, size=4, ext=0
+};
+
+def macroop PMADDWD_MMX_P {
+ rdip t7
+ ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8
+ mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20)
+ mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10)
+ maddi mmx, ufp3, ufp4, size=4, ext=0
+};
'''