X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement.

4 files changed, 13 insertions, 5 deletions

diff --git a/src/arch/x86/emulenv.cc b/src/arch/x86/emulenv.cc
index 8e4600a14..7e4a9fc55 100644
--- a/src/arch/x86/emulenv.cc
+++ b/src/arch/x86/emulenv.cc
@@ -118,8 +118,7 @@ void EmulEnv::doModRM(const ExtMachInst & machInst)
     //Figure out what segment to use. This won't be entirely accurate since
     //the presence of a displacement is supposed to make the instruction
     //default to the data segment.
-    if ((base != INTREG_RBP && base != INTREG_RSP) ||
-            0/*Has an immediate offset*/) {
+    if ((base != INTREG_RBP && base != INTREG_RSP) || machInst.dispSize) {
         seg = SEGMENT_REG_DS;
         //Handle any segment override that might have been in the instruction
         int segFromInst = machInst.legacy.seg;
diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc
index 24276f06c..f537f92af 100644
--- a/src/arch/x86/predecoder.cc
+++ b/src/arch/x86/predecoder.cc
@@ -77,6 +77,7 @@ namespace X86ISA
         immediateCollected = 0;
         emi.immediate = 0;
         emi.displacement = 0;
+        emi.dispSize = 0;
 
         emi.modRM = 0;
         emi.sib = 0;
@@ -383,6 +384,8 @@ namespace X86ISA
                 emiIsReady = true;
                 nextState = ResetState;
             }
+
+            emi.dispSize = displacementSize;
         }
         else
             nextState = DisplacementState;
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh
index bdf3a814e..956ec3216 100644
--- a/src/arch/x86/types.hh
+++ b/src/arch/x86/types.hh
@@ -175,6 +175,8 @@ namespace X86ISA
         uint8_t addrSize;
         //The effective stack size.
         uint8_t stackSize;
+        //The size of the displacement
+        uint8_t dispSize;
 
         //Mode information
         OperatingMode mode;
@@ -187,12 +189,13 @@ namespace X86ISA
                      "op = {\n\t\tnum = %d,\n\t\top = %#x,\n\t\t"
                            "prefixA = %#x,\n\t\tprefixB = %#x\n\t},\n\t"
                      "modRM = %#x,\n\tsib = %#x,\n\t"
-                     "immediate = %#x,\n\tdisplacement = %#x\n}\n",
+                     "immediate = %#x,\n\tdisplacement = %#x\n\t"
+                     "dispSize = %d}\n",
                      (uint8_t)emi.legacy, (uint8_t)emi.rex,
                      emi.opcode.num, (uint8_t)emi.opcode.op,
                      emi.opcode.prefixA, emi.opcode.prefixB,
                      (uint8_t)emi.modRM, (uint8_t)emi.sib,
-                     emi.immediate, emi.displacement);
+                     emi.immediate, emi.displacement, emi.dispSize);
         return os;
     }
 
@@ -227,6 +230,8 @@ namespace X86ISA
             return false;
         if(emi1.stackSize != emi2.stackSize)
             return false;
+        if(emi1.dispSize != emi2.dispSize)
+            return false;
         return true;
     }
 
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index d305e2599..4388dd416 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -82,7 +82,8 @@ namespace __hash_namespace {
                     ((uint64_t)emi.opcode.op)) ^
                     emi.immediate ^ emi.displacement ^
                     emi.mode ^
-                    emi.opSize ^ emi.addrSize ^ emi.stackSize;
+                    emi.opSize ^ emi.addrSize ^
+                    emi.stackSize ^ emi.dispSize;
         };
     };
 }