First steps toward getting full system to work with

TimingSimpleCPU.  Not there yet.

cpu/simple/atomic.cc:
    Only read SC result if store was an SC.
    Don't fake SC here; fake it in PhysicalMemory so
    all CPU models can share in the joy.
cpu/simple/timing.cc:
    Don't forget to checkForInterrupts().
    Only fetch subsequent instruction if we're still running
    (i.e. not quiesced).
dev/io_device.hh:
    Initialize port pointer in SendEvent object.
mem/physical.cc:
    Move fake SC "implementation" here from AtomicSimpleCPU.
mem/request.hh:
    Initialize flags to all clear, not uninitialized.
    Otherwise we can't reliably look at flags w/o explicitly
    setting them every time we create a request.

--HG--
extra : convert_revision : ae7601ce6fb54c54e19848aa5391327f9a6e61a6

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