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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-09-16 19:28:01 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-09-16 19:28:01 -0700 |
| commit | eec6bfaa9de23b075762a62e57e46cd3f2f977ef (patch) | |
| tree | 1de2c404f825cfc2039737b3a6cab89605b577ec /src | |
| parent | 83eebe046481eeefe3ed9f63f63a87a78ae9fb03 (diff) | |
| download | gem5-eec6bfaa9de23b075762a62e57e46cd3f2f977ef.tar.xz | |
X86: Fix setting the busy bit in the task descriptor in LTR.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/isa/insts/system/segmentation.py | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/arch/x86/isa/insts/system/segmentation.py b/src/arch/x86/isa/insts/system/segmentation.py index b83fcba95..c97f2f152 100644 --- a/src/arch/x86/isa/insts/system/segmentation.py +++ b/src/arch/x86/isa/insts/system/segmentation.py @@ -179,7 +179,8 @@ def macroop LTR_R wrdh t3, t1, t2 wrdl tr, t1, reg wrbase tr, t3, dataSize=8 - ori t1, t1, (1 << 9) + limm t5, (1 << 9) + or t1, t1, t5 st t1, tsg, [8, t4, t0], dataSize=8 }; @@ -195,7 +196,8 @@ def macroop LTR_M wrdh t3, t1, t2 wrdl tr, t1, t5 wrbase tr, t3, dataSize=8 - ori t1, t1, (1 << 9) + limm t5, (1 << 9) + or t1, t1, t5 st t1, tsg, [8, t4, t0], dataSize=8 }; @@ -212,7 +214,8 @@ def macroop LTR_P wrdh t3, t1, t2 wrdl tr, t1, t5 wrbase tr, t3, dataSize=8 - ori t1, t1, (1 << 9) + limm t5, (1 << 9) + or t1, t1, t5 st t1, tsg, [8, t4, t0], dataSize=8 }; |