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author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-07 15:07:42 -0500 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-12-07 15:07:42 -0500 |
commit | 993b7be4bb3dae5b15cd4c23a4c0e4c3dc7ed734 (patch) | |
tree | a595851b8385871ae104a06c59f17e62e3a9e154 /src | |
parent | e4790bcbe29b82dc81d4f34b78bb6ee2f718806a (diff) | |
download | gem5-993b7be4bb3dae5b15cd4c23a4c0e4c3dc7ed734.tar.xz |
imported patch aux-fix.patch
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/alpha/process.cc | 2 | ||||
-rw-r--r-- | src/arch/sparc/process.cc | 2 | ||||
-rw-r--r-- | src/arch/x86/process.cc | 2 | ||||
-rw-r--r-- | src/sim/process.cc | 6 | ||||
-rw-r--r-- | src/sim/process.hh | 12 |
5 files changed, 10 insertions, 14 deletions
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc index 3e5851e74..004be1ec0 100644 --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -67,7 +67,7 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize) { objFile->loadSections(initVirtMem); - typedef M5_auxv_t<uint64_t> auxv_t; + typedef AuxVector<uint64_t> auxv_t; std::vector<auxv_t> auxv; ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index 987e0465e..91baea40c 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -189,7 +189,7 @@ SparcLiveProcess::argsInit(int pageSize) { int intSize = sizeof(IntType); - typedef M5_auxv_t<IntType> auxv_t; + typedef AuxVector<IntType> auxv_t; std::vector<auxv_t> auxv; diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 8d0cd5038..2013190eb 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -200,7 +200,7 @@ X86LiveProcess::startup() void X86LiveProcess::argsInit(int intSize, int pageSize) { - typedef M5_auxv_t<uint64_t> auxv_t; + typedef AuxVector<uint64_t> auxv_t; std::vector<auxv_t> auxv; Process::startup(); diff --git a/src/sim/process.cc b/src/sim/process.cc index 244fb9297..a1f4c7d1d 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -87,14 +87,14 @@ using namespace TheISA; int num_processes = 0; template<class IntType> -M5_auxv_t<IntType>::M5_auxv_t(IntType type, IntType val) +AuxVector<IntType>::AuxVector(IntType type, IntType val) { a_type = TheISA::htog(type); a_val = TheISA::htog(val); } -template class M5_auxv_t<uint32_t>; -template class M5_auxv_t<uint64_t>; +template class AuxVector<uint32_t>; +template class AuxVector<uint64_t>; Process::Process(ProcessParams * params) : SimObject(params), system(params->system), checkpointRestored(false), diff --git a/src/sim/process.hh b/src/sim/process.hh index 996663847..e6b7c80b7 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -62,19 +62,15 @@ namespace TheISA } template<class IntType> -struct M5_auxv_t +struct AuxVector { IntType a_type; - union { - IntType a_val; - IntType a_ptr; - IntType a_fcn; - }; + IntType a_val; - M5_auxv_t() + AuxVector() {} - M5_auxv_t(IntType type, IntType val); + AuxVector(IntType type, IntType val); }; class Process : public SimObject |