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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 03:55:24 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 03:55:24 -0700 |
| commit | b144f05b535697629b08767bf77b5b80f91a34f2 (patch) | |
| tree | 588e92541a3154d530e5ae7dd49d0546aac05517 /src | |
| parent | 6dc3cedc4e6debc331805444aa04ccf9f956f870 (diff) | |
| download | gem5-b144f05b535697629b08767bf77b5b80f91a34f2.tar.xz | |
SE/FS: Remove the last references to FULL_SYSTEM from POWER.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/power/SConscript | 8 | ||||
| -rw-r--r-- | src/arch/power/tlb.cc | 17 |
2 files changed, 12 insertions, 13 deletions
diff --git a/src/arch/power/SConscript b/src/arch/power/SConscript index 366fc1e65..e8d385f4d 100644 --- a/src/arch/power/SConscript +++ b/src/arch/power/SConscript @@ -41,7 +41,10 @@ if env['TARGET_ISA'] == 'power': Source('insts/condition.cc') Source('insts/static_inst.cc') Source('interrupts.cc') + Source('linux/linux.cc') + Source('linux/process.cc') Source('pagetable.cc') + Source('process.cc') Source('tlb.cc') Source('utility.cc') Source('vtophys.cc') @@ -51,11 +54,6 @@ if env['TARGET_ISA'] == 'power': DebugFlag('Power') - if not env['FULL_SYSTEM']: - Source('process.cc') - Source('linux/linux.cc') - Source('linux/process.cc') - # Add in files generated by the ISA description. isa_desc_files = env.ISADesc('isa/main.isa') diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc index 8a088032c..d9be7fa69 100644 --- a/src/arch/power/tlb.cc +++ b/src/arch/power/tlb.cc @@ -50,6 +50,7 @@ #include "debug/TLB.hh" #include "mem/page_table.hh" #include "params/PowerTLB.hh" +#include "sim/full_system.hh" #include "sim/process.hh" using namespace std; @@ -310,14 +311,14 @@ TLB::translateData(RequestPtr req, ThreadContext *tc, bool write) Fault TLB::translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode) { -#if !FULL_SYSTEM - if (mode == Execute) - return translateInst(req, tc); - else - return translateData(req, tc, mode == Write); -#else - fatal("translate atomic not yet implemented\n"); -#endif + if (FullSystem) { + fatal("translate atomic not yet implemented in full system mode.\n"); + } else { + if (mode == Execute) + return translateInst(req, tc); + else + return translateData(req, tc, mode == Write); + } } void |