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authorKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:39 -0400
committerKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:39 -0400
commitf268d7d004b8eef968f27995ff033b98beb945aa (patch)
tree3cbe63db93aa72e351fc2ba78e9dcfd1b6b11be4 /src
parente8b7df072b17bfd86b294fc47cf29d3d013f646a (diff)
downloadgem5-f268d7d004b8eef968f27995ff033b98beb945aa.tar.xz
alpha: make hwrei a control inst
this always changes the PC and is basically an impromptu branch instruction. why not speculate on this instead of always be forced to mispredict/squash after the hwrei gets resolved? The InOrder model needs this marked as "isControl" so it knows to update the PC after the ALU executes it. If this isnt marked as control, then it's going to force the model to check the PC of every instruction at commit (what O3 does?), and that would be a wasteful check for a very high percentage of instructions.
Diffstat (limited to 'src')
-rw-r--r--src/arch/alpha/isa/decoder.isa2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index f0aa5a3fd..3cc2a1006 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -935,7 +935,7 @@ decode OPCODE default Unknown::unknown() {
0x1e: decode PALMODE {
0: OpcdecFault::hw_rei();
format BasicOperate {
- 1: hw_rei({{ xc->hwrei(); }}, IsSerializing, IsSerializeBefore);
+ 1: hw_rei({{ xc->hwrei(); }}, IsSerializing, IsSerializeBefore, IsControl);
}
}