Import changeset

65 files changed, 11241 insertions, 0 deletions

diff --git a/system/alpha/h/DEC21040.h b/system/alpha/h/DEC21040.h
new file mode 100644
index 000000000..993964ac2
--- /dev/null
+++ b/system/alpha/h/DEC21040.h
@@ -0,0 +1,409 @@
+#ifndef __DECCHIP21040_H_LOADED
+#define __DECCHIP21040_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: DEC21040.h,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *    Parameters and logicals for AM79C960 drivers in EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log:
+ *
+ */
+
+#ifdef NEEDPCI
+
+#include "pci.h"
+
+/*  The embedded Ethernet controller on the EB66 and EB64+ is a
+ *  DECchip 21040 PCI device.
+ *
+ *  Please see the PCI and DECchip 21040 literature for definitive lists
+ *  and further detail.
+ *
+ */
+
+
+/*****************************************************************************
+ * General                                                                   *
+ *****************************************************************************/
+
+/*
+ *  Maximum number of DECchip 21040s supported in the EB66 and
+ *  64+ monitors.  This is assuming 1 embedded device and 2 PCI
+ *  slots.  Of course this changes if a bridge card is used.
+ */
+
+#define DECCHIP21040_MAX_DEVICES	3
+
+/*****************************************************************************
+ * ROM ID                                                                    *
+ *****************************************************************************/
+/*
+ *  As the ROM ID is only used by the DECchip 21040, then this information
+ *  can go here.  Note that this information is the same for both EB66
+ *  and EB64P.
+ *
+ *  To read this device you must first write which page you want
+ *  into the PAGE_REGISTER.  The bit settings look like:
+ *
+ *  SxxA AAAA
+ *
+ *  Where S = 0 = BBRAM, S = 1 = Ethernet ID ROM.
+ *
+ *  A AAAA select the high order address lines of the BBRAM
+ *  and are ignored for the Ethernet ID ROM.
+ */
+#define PAGE_REGISTER    0xc00
+#define SELECT_ROMID     0x80
+#define ROMID_BASE       0x800
+
+/*****************************************************************************
+ * CSRs, these exist in PCI I/O space                                        *
+ *****************************************************************************/
+/*
+ *  CSR offsets.
+ */
+
+#define CSR0       0x0000			/* Bus Mode Register */
+#define CSR1       0x0008			/* Transmit Poll Demand */
+#define CSR2       0x0010			/* Receive Poll Demand */
+#define CSR3       0x0018			/* Rx Ring Base Address */
+#define CSR4       0x0020			/* Tx Ring Base Address */
+#define CSR5       0x0028			/* Status Register */
+#define CSR6       0x0030			/* Serial command register */
+#define CSR7       0x0038			/* Interrupt Mask register */
+#define CSR8       0x0040			/* Missed Frame counter */
+#define CSR9       0x0048			/* ENET ROM register */
+#define CSR10      0x0050			/* Data Diagnostic register */
+#define CSR11      0x0058			/* Full duplex register */
+#define CSR12      0x0060			/* SIA Status register */
+#define CSR13      0x0068			/* SIA connectivity register */
+#define CSR14      0x0070			/* SIA Tx Rx Register */
+#define CSR15      0x0078			/* SIA General register */
+
+#define TDES1_ADD  0x0088
+#define RDES1_ADD  0x00B8
+#define PCI_DIAG   0x0178
+
+/*
+ *  CSR bit definitions (see the DECchip 21040 manual for details).
+ */
+#define CSR0_CAL   0x0000C000		/* 15:14 Cache alignment */
+#define CSR0_PBL   0x00003F00		/* 13:18 Programmable burst length */
+#define CSR0_BLE   0x00000080		/* Big/Little endian */
+#define CSR0_DSL   0x0000007C		/* Descriptor Skip Length */
+#define CSR0_BAR   0x00000020		/* Bus Arbitration */
+#define CSR0_SWR   0x00000001		/* Software Reset */
+
+#define CSR1_TPD   0x00000001		/* Transmit Poll Demand */
+
+#define CSR2_RPD   0x00000001		/* Receive Poll Demand */
+
+#define CSR3_RXB   0xFFFFFFFC		/* Rx ring base address */
+
+#define CSR4_TXB   0xFFFFFFFC		/* Tx ring base address */
+
+#define CSR5_EB    0x03800000		/* 25:23 Error Bits */
+#define CSR5_TS    0x00700000		/* 22:20 Transmission Process State */
+#define CSR5_RS    0x000E0000		/* 19:17 Receive Process State */
+#define CSR5_NIS   0x00010000		/* Normal interrupt Summary */
+#define CSR5_AIS   0x00008000		/* Abnormal interrupt Summary */
+#define CSR5_SE    0x00002000		/* System Error */
+#define CSR5_LNF   0x00001000		/* link fail */
+#define CSR5_FD    0x00000800		/* Full duplex short frame received */
+#define CSR5_AT    0x00000400		/* AUI/TP switch */
+#define CSR5_RWT   0x00000200		/* Receive watchdog time-out */
+#define CSR5_RPS   0x00000100		/* Receive process stopped */
+#define CSR5_RU    0x00000080		/* Receive buffer unavailable */
+#define CSR5_RI    0x00000040		/* Receive Interrupt */
+#define CSR5_UNF   0x00000020		/* Transmit underflow */
+#define CSR5_TJT   0x00000008		/* Transmit jabber timeout */
+#define CSR5_TU    0x00000004		/* Transmit buffer unavailable */
+#define CSR5_TPS   0x00000002		/* Transmit process stopped */
+#define CSR5_TI    0x00000001		/* Transmit interrupt */
+
+#define CSR5_TS_SUSPENDED 0x00600000    /* 110: Transmit process suspended */
+#define CSR5_RS_SUSPENDED 0x00080000    /* 100: Receive process suspended */
+
+#define CSR6_TR    0x0000C000		/* 15:14 Threshold control bits */
+#define CSR6_ST    0x00002000		/* Start/stop transmission */
+#define CSR6_FC    0x00001000		/* Force collision mode */
+#define CSR6_OM    0x00000C00		/* 11:10 Operating Mode */
+#define CSR6_FD    0x00000200		/* Full duplex operating mode */
+#define CSR6_FKD   0x00000100		/* Flaky oscillator disable */
+#define CSR6_PM    0x00000080		/* Pass All Multicast */
+#define CSR6_PR    0x00000040		/* Promiscuous mode */
+#define CSR6_SB    0x00000020		/* Start/Stop Backoff counter */
+#define CSR6_IF    0x00000010		/* Inverse filtering */
+#define CSR6_PB    0x00000008		/* Pass Bad frames */
+#define CSR6_SR    0x00000002		/* Start/Stop Receive */
+#define CSR6_HP    0x00000001		/* Hash/Perfect receive filtering mode
+                                         */
+
+#define CSR7_NIM   0x00010000		/* Normal interrupt summary mask */
+#define CSR7_AIM   0x00008000		/* Abnormal interrupt summary mask */
+#define CSR7_SEM   0x00002000		/* System Error Mask */
+#define CSR7_LFM   0x00001000		/* Link fail mask */
+#define CSR7_FDM   0x00000800		/* Full Duplex mask */
+#define CSR7_ATM   0x00000400		/* AUI/TP switch mask */
+#define CSR7_RWM   0x00000200		/* Receive watchdog timeout mask */
+#define CSR7_RSM   0x00000100		/* Receive stopped mask */
+#define CSR7_RUM   0x00000080		/* Receive buffer unavailable mask */
+#define CSR7_RIM   0x00000040		/* Receive interrupt mask */
+#define CSR7_UNM   0x00000020		/* Underflow interrupt mask */
+#define CSR7_TJM   0x00000008		/* transmit jabber timeout mask */
+#define CSR7_TUM   0x00000004		/* transmit buffer unavailable mask */
+#define CSR7_TSM   0x00000002		/* transmission stopped mask */
+#define CSR7_TIM   0x00000001		/* transmit interrupt mask */
+
+#define CSR8_MFO   0x00010000		/* Missed frame overflow */
+#define CSR8_MFC   0x0000FFFF		/* Missed frame counter */
+
+#define CSR9_DT    0x000000FF		/* 7:0 Data */
+#define CSR9_DN    0x80000000		/* 31 Data not valid, 0 = valid */
+
+#define CSR11_FD   0x0000FFFF		/* 15:0 Full duplex auto configuration
+                                         * value */
+#define CSR12_PAUI 0x00000001
+#define CSR12_NCR  0x00000002
+#define CSR12_LKF  0x00000004
+
+/*
+ * CSR13 - SIA programming.
+ */
+#define CSR13_SRL  0x00000001           /* SIA Reset r/w */
+#define CSR13_PS   0x00000002           /* Pin AUI/TP Selection r/w */
+#define CSR13_CAC  0x00000004           /* CSR Auto Configuration */
+#define CSR13_AUI  0x00000008           /* 10 Base T or AUI */
+#define CSR13_EDP  0x00000010           /* SIA PLL external input enable */
+#define CSR13_ENI  0x00000020           /* Encoder Input Mux */
+#define CSR13_SIM  0x00000040           /* Serial Interface Input Mux */
+
+/*****************************************************************************
+ * Macros                                                                    *
+ *****************************************************************************/
+#define _21040WriteCSR(device,csr,value) \
+  (outportl((device)->PCI_IO_Base + (csr), (value)))
+
+#define _21040ReadCSR(device,csr) \
+  (inportl((device)->PCI_IO_Base + (csr)))
+
+#define _21040ValidBuffer(buffer,size) \
+  ( \
+   (((unsigned long)(buffer) & 0x3) == 0) \
+   && \
+   ((unsigned long)(buffer) <= 0xFFFFFFFF) \
+   && \
+   (PCIValidAddress((unsigned char *) (buffer))) \
+   && \
+   (PCIValidAddress((unsigned char *) (buffer) + (size))) \
+  )
+
+/*****************************************************************************
+ * PCI Constants                                                             *
+ *****************************************************************************/
+/*
+ * The configuration registers for DECchip 21040 exist in PCI configuration
+ * space.  The definitions for the standard fields are in pci.h, these
+ * definitions are 21040 specific.
+ */
+#define CFID     0x0000			/* Configuration ID */
+#define CFCS     0x0004			/* Configuration command/status */
+#define CFRV     0x0008			/* Configuration revision */
+#define CFLT     0x000C			/* Configuration latency timer */
+#define CBIO     0x0010			/* Configuration base IO address */
+
+#define CBIO_MIO 0x00000001		/* Memory I/O. 1 = I/O. */
+#define CSR_SIZE 0x400                  /* you can work this out by writing
+                                           all F's to CBIO */
+
+/*****************************************************************************
+ * Setup Frame, if needed                                                    *
+ *****************************************************************************/
+#define SETUP_FRAME_NEEDED   1                 /* Do we need a setup frame? */
+#define SETUP_FRAME_SIZE   192
+#define SETUP_PHYSICAL_ADDRESS_OFFSET 156
+#define SETUP_HASH_FILTER_SIZE 128
+/*****************************************************************************
+ * Data Structures                                                           *
+ *****************************************************************************/
+/*
+ * TX descriptor. Must be longword aligned in memory.
+ */
+typedef struct {
+    union {
+        unsigned int tdes0;
+        struct {
+            unsigned int DE : 1;	/* deferred */
+            unsigned int UF : 1;	/* underflow error */
+            unsigned int LF : 1;	/* link fail */
+            unsigned int CC : 4;	/* 6:3 Collision count */
+            unsigned int HF : 1;	/* Heartbeat fail */
+            unsigned int EC : 1;	/* excessive collisions */
+            unsigned int LC : 1;	/* late collisions */
+            unsigned int NC : 1;	/* no carrier */
+            unsigned int LO : 1;        /* loss of carrier */
+            unsigned int unused_1 : 2;	/* 13:12 */
+            unsigned int TO : 1;	/* transmit jabber timeout */
+            unsigned int ES : 1;	/* error summary */
+            unsigned int unused_12 : 15;
+                                        /* 30:16 */
+            unsigned int OWN : 1;	/* Own bit, 1 = 21040 */
+        } s_tdes0;
+    } u_tdes0;
+    union {
+        unsigned int tdes1;
+        struct {
+            unsigned int TBS1 : 11;	/* 10:0 transmit buffer size 1 */
+            unsigned int TBS2 : 11;	/* 21:11 transmit buffer size 2 */
+            unsigned int HP : 1;	/* Hash/Perfect filtering */
+            unsigned int DPD : 1;	/* disable padding */
+            unsigned int TCH : 1;	/* Second address chained */
+            unsigned int TER : 1;	/* transmit end of ring */
+            unsigned int AC : 1;	/* add CRC disable */
+            unsigned int SET : 1;	/* setup packet */
+            unsigned int IV : 1;	/* inverse filtering */
+            unsigned int FS : 1;	/* First segment */
+            unsigned int LS : 1;	/* last segment */
+            unsigned int IC : 1;	/* interrupt on completion */
+
+        } s_tdes1;
+    } u_tdes1;
+    unsigned int tdes2;
+    unsigned int tdes3;
+} DECCHIP_21040_TX_BD;
+
+/*
+ * Receive descriptor.  Must be longword aligned in memory.
+ */
+typedef struct {
+    union {
+        unsigned int rdes0;
+        struct {
+            unsigned int OF : 1;	/* overflow */
+            unsigned int CE : 1;	/* CRC error */
+            unsigned int DB : 1;	/* dribbling bit */
+            unsigned int unused_1 : 1;  /* 3 */
+            unsigned int RJ : 1;	/* Receive watchdog */
+            unsigned int FT : 1;	/* frame type */
+            unsigned int CS : 1;	/* collision seen */
+            unsigned int TL : 1;	/* frame too long */
+            unsigned int LS : 1;	/* last descriptor */
+            unsigned int FS : 1;	/* First descriptor */
+            unsigned int MF : 1;	/* Multicast frame */
+            unsigned int RF : 1;	/* runt frame */
+            unsigned int DT : 2;	/* 13:12 Data type */
+            unsigned int LE : 1;	/* length error */
+            unsigned int ES : 1;	/* error summary */
+            unsigned int FL : 15;	/* Frame Length */
+            unsigned int OWN : 1;	/* Own bit 1 = 21040 */
+        } s_rdes0;
+    } u_rdes0;
+    union {
+        unsigned int rdes1;
+        struct {
+            unsigned int RBS1 : 11;	/* 10:0 Buffer Size 1 */
+            unsigned int RBS2 : 11;	/* 21:11  Buffer Size 2 */
+            unsigned int unused_1 : 2;	/* 23:22 */
+            unsigned int RCH : 1;	/* Second address chained */
+            unsigned int RER : 1;	/* Receive end of ring */
+            unsigned int unused_2 : 6;	/* 31:26 */
+        } s_rdes1;
+    } u_rdes1;
+    unsigned int rdes2;
+    unsigned int rdes3;
+} DECCHIP_21040_RX_BD;
+
+/*
+ *  Each device has a block of counters associated with it.
+ */
+typedef struct counters {
+/*
+ * Transmit counters.
+ */
+  unsigned int tx_restarted;
+  unsigned int p_tx;
+  unsigned int b_tx;
+  unsigned int tx_err_UF;
+  unsigned int tx_err_EC;
+  unsigned int tx_err_LC;
+  unsigned int tx_err_NC;
+  unsigned int tx_err_LO;
+  unsigned int tx_err_TO;
+  unsigned int tx_err_LF;
+/*
+ * Receive couters.
+ */
+  unsigned int rx_restarted;
+  unsigned int p_rx;
+  unsigned int mf_rx;
+  unsigned int b_rx;
+  unsigned int rx_err_OF;
+  unsigned int rx_err_CE;
+  unsigned int rx_err_CS;
+  unsigned int rx_err_TL;
+  unsigned int rx_err_LE;
+  unsigned int rx_err_RF;
+} counters_t;
+
+/*
+ *  Describe what a particular DECchip 21040 looks like.
+ */
+typedef struct DECchip_21040_device {
+    unsigned int device;		/* DBM device number */
+    unsigned int index;                 /* Index into static structures */
+    PCIDevice_t *pci;                   /* The PCI device */
+    unsigned long PCI_IO_Base;		/* Swizzled IO base address */
+    unsigned int rx_index;              /* Next RX buffer */
+    unsigned int tx_index;              /* Next TX buffer */
+    struct counters *counters;          /* block of counter information */
+    mac_addr hw_address;                /* This device's h/w address */
+    char *setup_frame;                  /* setup frame */
+    struct {
+      unsigned int exists : 1;          /* Does this device exist? */
+      unsigned int allocated : 1;	/* Is this device in use? */
+      unsigned int initialised : 1;     /* Has the device been initialised? */
+      unsigned int loopback : 1;        /* loopback mode selected */
+      unsigned int setup_frame : 1;     /* setup frame needed? */
+      unsigned int hw_valid : 1;	/* Is the hardware address valid? */
+    } flags;
+} DECchip_21040_device_t;
+
+/* /ether/DEC21040.c */
+extern DECchip_21040_device_t * DECchip_21040_device_find(int device_no);
+extern int DECchip_21040_device_register(int device_no);
+extern void DECchip_21040_device_init_module(void );
+
+#endif /* NEEDPCI */
+#endif /* __DECCHIP21040_H_LOADED */
diff --git a/system/alpha/h/Makefile b/system/alpha/h/Makefile
new file mode 100644
index 000000000..96c66b2e2
--- /dev/null
+++ b/system/alpha/h/Makefile
@@ -0,0 +1,20 @@
+# $Id: Makefile,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
+# $Log: Makefile,v $
+# Revision 1.1.1.1  1997/10/30 23:27:13  verghese
+# current 10/29/97
+#
+# Revision 1.2  1994/06/28  20:08:21  fdh
+# Modified filenames and build precedure to fit into a FAT filesystem.
+#
+# Revision 1.1  1994/03/11  05:14:12  fdh
+# Initial revision
+#
+
+include ../rules.osf
+
+all:
+
+clean:
+	rm -f *~ \#*\# core
+	$(CLEAN)
+
diff --git a/system/alpha/h/address.h b/system/alpha/h/address.h
new file mode 100644
index 000000000..e352630f4
--- /dev/null
+++ b/system/alpha/h/address.h
@@ -0,0 +1,121 @@
+#ifndef __ADDRESSES_H_LOADED
+#define __ADDRESSES_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: address.h,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Network addresses, and other parameters to service interface, for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: address.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:13  verghese
+ * current 10/29/97
+ *
+ * Revision 1.7  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.6  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.5  1994/06/22  15:10:11  rusling
+ * Fixed up WNT compile warnings.
+ *
+ * Revision 1.4  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.3  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.2  1994/01/20  17:56:30  rusling
+ * Added #ifdef ADDRESSES_H around this include file.
+ *
+ * Revision 1.1  1993/08/06  10:26:13  berent
+ * Initial revision
+ *
+ *
+ */
+
+
+/* Note that all the address and protocol types in this file are held in network byte order */
+
+/* MAC address */
+
+#define MAC_ADDRESS_SIZE 6
+
+typedef unsigned char mac_addr[MAC_ADDRESS_SIZE];
+
+/* Broadcast MAC address */
+static mac_addr broadcast_mac_address = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
+
+/* Ethernet protocol ids */
+
+#define ETHERNET_PROTOCOL_ID_SIZE 2
+
+typedef unsigned char ethernet_protocol_id[ETHERNET_PROTOCOL_ID_SIZE];
+
+/* Standard ethernet protocol ids - from RFC 1340 */
+static ethernet_protocol_id ether_protocol_ip = {0x08, 0x00};
+static ethernet_protocol_id ether_protocol_arp = {0x08, 0x06};
+
+/* IP addresses */
+
+#define IP_ADDRESS_SIZE 4
+
+typedef unsigned char ip_addr[IP_ADDRESS_SIZE];
+
+static ip_addr own_ip_addr_unknown_address = {0,0,0,0};
+static ip_addr local_ip_broadcast_address = {0xFF,0xFF,0xFF,0xFF};
+
+/* IP protocol ids */
+
+typedef unsigned char ip_protocol_id;
+
+/* UDP port ids */
+
+#define UDP_PORT_SIZE 2
+
+typedef unsigned char udp_port[UDP_PORT_SIZE];
+
+/* Well known UDP port numbers - mainly from RFC 1340 */
+
+static udp_port udp_port_remote_debug_connect={410 >> 8, 410 & 0xff}; /* New assignment by IANA  -
+                                                                        Ladebug remote debug protocol = 410 */
+
+/* Special for compatibility with existing remote debug implementation */
+static udp_port udp_port_old_debug={0x54, 0x07};
+
+#define ETHER_BUFFER_SIZE 1600
+
+#endif /* __ADDRESSES_H_LOADED */
diff --git a/system/alpha/h/am79c960.h b/system/alpha/h/am79c960.h
new file mode 100644
index 000000000..727d99292
--- /dev/null
+++ b/system/alpha/h/am79c960.h
@@ -0,0 +1,381 @@
+#ifndef __AM79C960_H_LOADED
+#define __AM79C960_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: am79c960.h,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *    Parameters and logicals for AM79C960 drivers in EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: am79c960.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:13  verghese
+ * current 10/29/97
+ *
+ * Revision 1.8  1994/12/12  21:31:59  cruz
+ * Fixed bug in TMD3 constants
+ *
+ * Revision 1.7  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.6  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.5  1994/06/24  15:26:49  rusling
+ * Fixed initialization alignment problems.
+ *
+ * Revision 1.4  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.3  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.2  1994/06/03  20:11:11  fdh
+ * Replaced shorts declared in bitfields to ints.
+ *
+ * Revision 1.1  1993/08/06  10:10:05  berent
+ * Initial revision
+ *
+ *
+ */
+
+
+
+/*  The embedded Ethernet controller on the EB64 is an AMD Am79C960 device.
+ *
+ *  This device integrates an Am7990 LANCE Ethernet controller with an ISA
+ *  bus interface plus all the serial interface logic bar some discrete
+ *  termination and isolation transformers for AUI (10base5) and twisted
+ *  pair (10baseT) connections.
+ *
+ *  The AUI port on EB64 is connected to an Am7996 thinwire transceiver to
+ *  provide a 10base2 port (BNC) as well as the twisted pair (MMJ)
+ *  connectivity.
+ *
+ *  The device is programmed in a similar but not identical fashion to the
+ *  LANCE. The following programming differences and features are noted:
+ *
+ *  A RAP/RDP mechanism is used for register access like the LANCE, but with
+ *  a much larger register set:
+ *
+ *        Initialisation block now part of on-chip register set with new
+ *        ...features added to the mode register. This can be set up in
+ *        ...memory and copied by the device using the csr0_INIT bit, or
+ *        ...programmed directly to the device using the extended CSR map.
+ *
+ *        CSR3 completely changed - interrupt mask and enabling bits for
+ *        ...new features
+ *
+ *        CSR3 can be accessed while the "LANCE" running
+ *
+ *        A register added for controlling the ISA bus DMA profile eg. FIFO
+ *        ...watermarks for DMA loads and stores, TX transmission start
+ *        ...point wrt data in TX FIFO, DMA burstsizes.
+ *
+ *        Registers to overrule ring sizes in initialisation blocks allowing
+ *        ...ring sizes from 1-64k entries. CSR76 for RX; CSR78 for TX
+ *
+ *         Timer and ID registers
+ *
+ *         Missed pkt and RX collision counters
+ *
+ * A similar RAP/IDP mechanism is used to program ISA DMA signal timing, ISA
+ * bus configuration, bits, and the functionality for the three LED drives
+ * provided.
+ *
+ * The Am79C960 *must* use a 16-bit DMA path, but can use an 8-bit path for
+ * CSR (IO) access. It also supports access to a sixteen byte area for
+ * keeping the MAC address in PROM. This is always byte-wide access, as is a
+ * shared memory mode to a larger local address space, not used on EB64.
+ *
+ * EB64 accesses to the 79C960 are through the VL82C486 ISA controller. All
+ * CSR accesses should be done as 16-bit words, with the VL82C486 taking care
+ * of the packing/unpacking issue. Enet PROM accesses are done as byte
+ * accesses. The EB64 memory controller will perform read_modify_write cycles
+ * into main memory to correctly merge the bytes/words, and preserve longword
+ * parity.
+ *
+ *
+ *  Please see the Am7990 and Am79C960 literature for definitive lists and
+ *  further detail.
+ *
+ *  PLEASE NOTE: LANCE is used in many definitions for historical reasons.
+ */
+
+
+        /* Maximum number of AMD79C960's supported in the EB64 monitor */
+
+#define AM79C960_MAX_DEVICES	2
+
+
+        /* Base addresses supported for 79C960 in ISA address space */
+
+#define EMBEDDED_79C960_BASE 	0x360	    /* IOAM pins = 0b11 */
+#define OPTION_79C960_BASE 	0x300	    /* IOAM pins = 0b00 */
+
+        /* Assigned interrupt numbers for 8259 controller */
+
+#define EMBEDDED_79C960_INT 	9
+#define OPTION_79C960_INT	12
+
+        /* Assigned mask numbers for enabling appropriate DMA channel */
+
+#define EMBEDDED_79C960_DMA 	1
+#define OPTION_79C960_DMA 	2
+
+
+             /* CSR access offsets for 79C960 */
+
+#define HW_ADDR_OFFSET  0    /* The hardware address is at the base address for the device */
+#define	RDP_OFFSET	0x10
+#define	RAP_OFFSET 	0x12
+#define	RESET_OFFSET	0x14
+#define	IDP_OFFSET	0x16
+#define	VSW_OFFSET	0x18
+
+#define LANCE_CSR0  0		/* Main csr */
+#define LANCE_IADRL 1		/* Init block low address bits */
+#define LANCE_IADRH 2		/* Init block high address bits */
+#define LANCE_CSR3  3		/* Mask and function bits */
+#define LANCE_CSR4  4           /* Additional mask and function bits, only exists on amd 79c960 */
+
+    /* CSR bit definitions - CSR1 and 2 have no bit fields */
+
+             /* CSR0 Bit definitions */
+
+#define csr0_INIT	0x0001		/* Initialize - can be set with STRT on 79C960*/
+#define csr0_STRT	0x0002		/* Start operation */
+#define csr0_STOP	0x0004		/* Stop LANCE */
+#define csr0_TDMD	0x0008		/* Transmit demand */
+#define csr0_TXON	0x0010		/* Transmitter ON */
+#define csr0_RXON	0x0020		/* Receiver ON */
+#define csr0_IENA	0x0040		/* Interrupt enable */
+#define csr0_INTR	0x0080		/* Interrupt received */
+#define csr0_IDON	0x0100		/* Initialization done */
+#define csr0_TINT	0x0200		/* Transmitter interrupt */
+#define csr0_RINT	0x0400		/* Receiver interrupt */
+#define csr0_MERR	0x0800		/* Memory error */
+#define csr0_MISS	0x1000		/* Missed packet */
+#define csr0_CERR	0x2000		/* Collision error */
+#define csr0_BABL	0x4000		/* Babbling on the wire */
+#define csr0_ERR	0x8000		/* Error logical OR */
+
+
+             /* CSR3 Bit definitions - all undefined bits reserved */
+
+#define csr3_EMBA	0x0008		/* Enable Alternate Backoff Algorithm - 79C960 */
+#define csr3_DXMT2PD	0x0010		/* Disable 2-part TX deferral - 79C960 */
+#define csr3_IDONM	0x0100		/* Initialise Done interrupt mask */
+#define csr3_TINT	0x0200		/* TX interrupt mask */
+#define csr3_RINT	0x0400		/* RX interrupt mask */
+#define csr3_MERM	0x0800		/* Memory error interrupt mask */
+#define csr3_MISSM	0x1000		/* Missed pkt interrupt mask */
+#define csr3_BABLM	0x4000		/* Babble interrupt mask */
+#define csr3_MASKALL    0x5F00          /* Mask all CSR3 maskable interrupts */
+
+             /* CSR4 Bit definitions - all undefined bits reserved */
+                   /* This register is unique to the 79C960 */
+
+#define csr4_JABM	0x0001		/* Jabber interrupt mask
+#define csr4_JAB	0x0002		/* set if T-MAU detects a jabber condition
+#define csr4_TXSTRTM	0x0004		/* TX start (of packet) interrupt mask */
+#define csr4_TXSTRT	0x0008		/*    */
+#define csr4_RCVCCOM	0x0010		/* RX Collision Counter Overflow interrupt mask */
+#define csr4_RCVCCO	0x0020		/* RX Collision Counter Overflow bit */
+#define csr4_MPCOM	0x0100		/* Missed Pkt counter overflow interrupt mask */
+#define csr4_MPCO	0x0200		/* Missed Pkt counter overflow bit */
+#define csr4_ASTRPRCV	0x0400		/* Enable Automatic Pad Stripping on RX - IEEE802.3 */
+#define csr4_APADXMT	0x0800		/* Enable Automatic Padding on TX - IEEE802.3 */
+#define csr4_DPOLL	0x1000		/* Disable polling - TX rings */
+#define csr4_TIMER	0x2000		/*    */
+#define csr4_DMAPLUS	0x4000		/* Disable CSR80 DMA burst counter */
+#define csr4_ENTST	0x8000		/* Enable Test mode */
+
+
+
+             /* Receive Message Descriptor */
+       /* RMD0, RMD2 and RMD3 have no bit fields */
+
+     /* Bits 0 -> 7 of RMD1 part of buffer address */
+
+#define rmd1_ENP	0x0100		/* End of packet */
+#define rmd1_STP	0x0200		/* Start of packet */
+#define rmd1_BUFF	0x0400		/* Buffer error */
+#define rmd1_CRC	0x0800		/* CRC error */
+#define rmd1_OFLO	0x1000		/* Overflow error */
+#define rmd1_FRAM	0x2000		/* Framing error */
+#define rmd1_ERR	0x4000		/* Error logical OR */
+#define rmd1_OWN	0x8000		/* Who owns it */
+
+
+
+             /* Transmit Message Descriptor */
+           /* TMD0 and TMD2 have no bit fields */
+
+     /* Bits 0 -> 7 of TMD1 part of buffer address */
+
+#define tmd1_ENP	0x0100		/* End of packet */
+#define tmd1_STP	0x0200		/* Start of packet */
+#define tmd1_DEF	0x0400		/* Had to defer */
+#define tmd1_ONE	0x0800		/* One eretry needed */
+#define tdm1_MORE	0x1000		/* More than one retry */
+#define tmd1_ADDFCS	0x2000		/* Am79C960 specific - add FCS on pkt basis */
+#define tmd1_ERR	0x4000		/* Error logical OR */
+#define tmd1_OWN	0x8000		/* Who owns it */
+
+
+  /* Bits 0 -> 9 of TMD3 provide a TDR counter for finding cable faults */
+
+#define tmd3_RTRY	0x0400		/* Too many retries */
+#define tmd3_LCAR	0x0800		/* Loss of Carrier */
+#define tmd3_LCOL	0x1000		/* Late Collision on send */
+#define tmd3_RES	0x2000		/* RESERVED */
+#define tmd3_UFLO	0x4000		/* Underflow Error */
+#define tmd3_BUFF	0x8000		/* Buffer Error */
+
+
+             /* For init block - operating modes */
+
+#define mode_DRX	0x0001		/* Disable receiver */
+#define mode_DTX	0x0002		/* Disable transmitter */
+#define mode_LOOP 	0x0004		/* Loopback mode */
+#define mode_DTCR	0x0008		/* Disable transmit CRC */
+#define mode_COLL	0x0010		/* Force collision */
+#define mode_DRTY	0x0020		/* Disable retries */
+#define mode_INTL  	0x0040		/* Internal loopback */
+#define mode_PORTSEL0	0x0080		/* 0 = AUI; 1 = T-MAU */
+#define mode_PORTSEL1	0x0100		/* MBZ */
+#define mode_LRT_TSEL	0x0200		/* Low RX threshold/TX mode select */
+#define mode_MENDECL	0x0400		/* MENDEC loopback mode */
+#define mode_DAPC	0x0800		/* T-MAU: disable automatic polarity correction */
+#define mode_DLNKTST	0x1000		/* Disable link status */
+#define mode_DRCVPA	0x2000		/* Disable RX physical address */
+#define mode_DRCVBC	0x4000		/* Disable RX broadcast */
+#define mode_PROM	0x8000		/* Promiscuous mode */
+
+
+
+             /* Initialization block. */
+
+#define LANCE_INIT_BLOCK_SIZE 		24
+#define LANCE_INIT_BLOCK_MODE_OFFSET 	0
+#define LANCE_INIT_BLOCK_PADR_OFFSET 	2
+#define LANCE_INIT_BLOCK_LADRF_OFFSET 	8
+#define LANCE_INIT_BLOCK_RD_OFFSET	16
+#define LANCE_INIT_BLOCK_TD_OFFSET	20
+
+
+typedef struct {
+    unsigned
+      radr : 24,	/* Ring address.			*/
+           :  5,
+      rlen :  3;	/* Entries (0=1, 1=2, 2=4, 3=8...)	*/
+} INIT_BLOCK_DESC;
+
+             /* Receive buffer descriptor. */
+
+typedef struct{
+  unsigned int
+    ladr : 24,		/* Buffer address.			*/
+    enp	 : 1,		/* End of packet.			*/
+    stp	 : 1,		/* Start of packet.			*/
+    buff : 1,		/* Buffer error.			*/
+    crc  : 1,		/* CRC error.				*/
+    oflo : 1,		/* Overflow error.			*/
+    fram : 1,		/* Framing error.			*/
+    err  : 1,		/* Error summary: buff + crc + oflo + fram */
+    own  : 1;		/* Buffer owner: host=0, lance=1.	*/
+  uw bcnt;		/* Buffer size.				*/
+  uw mcnt;		/* Message size.			*/
+} LANCE_RECV_BD;
+
+             /* Transmit buffer descriptor. */
+
+typedef struct{
+  unsigned int
+    ladr : 24,		/* Buffer address.			*/
+    enp	 : 1,		/* End of packet.			*/
+    stp	 : 1,		/* Start of packet.			*/
+    def	 : 1,		/* Deferred.				*/
+    one	 : 1,		/* One retry.				*/
+    more : 1,		/* More retries.			*/
+    add_fcs : 1,        /* Add FCS on packet basis - 79C960 specific feature */
+    err	 : 1,		/* Error summary: lcol + lcar + uflo + rtry */
+    own	 : 1;		/* Buffer owner: host=0, lance=1.	*/
+  uw bcnt;		/* Buffer size.				*/
+  uw tmd3;		/* TMD 3				*/
+} LANCE_SEND_BD;
+
+#define LANCE_OWNS 1
+#define HOST_OWNS  0
+
+             /* Lance counters. */
+
+typedef struct{
+  time_t zeroed;
+  int    b_recv;
+  int    b_sent;
+  int    f_recv;
+  int    f_sent;
+  int    mc_b_recv;
+  int    mc_f_recv;
+  int    f_sent_def;
+  int    f_sent_sgl_col;
+  int    f_sent_mult_col;
+  int    send_fail_exs_col;
+  int    send_fail_cc;
+  int    send_fail_short;
+  int    send_fail_open;
+  int    send_fail_flen;
+  int    send_fail_defer;
+  int    recv_fail_fcs;
+  int    recv_fail_f_err;
+  int    recv_fail_flen;
+  int    data_overrun;
+  int    sbuf_unav;
+  int    ubuf_unav;
+  int    cc_fail;
+} LANCE_CTRS;
+
+typedef struct{
+  int	base_addr;
+  int	interrupt_line;
+  int	dma_mask;
+} AM79C960_CONFIG;
+
+#define AM79C960_FLUSH_WATCHDOG	    5000    /* watchdog timeout  - in ms - for TX flush routine */
+
+/* /ether/am79c960.c */
+extern int am79c960_device_register(int device_no);
+extern void am79c960_device_init_module(void );
+
+#endif /* __AM79C960_H_LOADED */
diff --git a/system/alpha/h/arp.h b/system/alpha/h/arp.h
new file mode 100644
index 000000000..dfab7c787
--- /dev/null
+++ b/system/alpha/h/arp.h
@@ -0,0 +1,108 @@
+#ifndef __ARP_H_LOADED
+#define __ARP_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: arp.h,v 1.1.1.1 1997/10/30 23:27:13 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Arp interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: arp.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:13  verghese
+ * current 10/29/97
+ *
+ * Revision 1.6  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.5  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.4  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.3  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.2  1994/01/20  15:46:47  rusling
+ * Added new routine, arp_show(), to print out
+ * the contents of the current arp table.
+ *
+ * Revision 1.1  1993/08/06  10:25:46  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/* arp_init - initialises the arp module; and registers it with the
+ * ethernet protocol handler.
+ *
+ * Argument:
+ *    device_no - device number on which arp should be registered.
+ */
+extern void arp_init(int device_no);
+
+/* arp_set_device_addr - tells arp a device's ip address.
+ *
+ * Arguments:
+ *     device_no - device number
+ *     ip        - ip address
+ */
+extern void arp_set_device_addr(int device_no,ip_addr ip);
+
+/* arp_resolve - converts an ip address into an ethernet address
+ *
+ * Arguments:
+ *     device_no - device on which the message is to be sent
+ *     ip        - ip address
+ *     mac       - returned ethernet MAC address
+ *
+ * Returned value:
+ *     TRUE      - address resolved; eaddr valid
+ *     FALSE     - Unable to resolve address.
+ */
+extern int arp_resolve(int device_no, ip_addr ip, mac_addr mac);
+
+/* arp_init_module - initialise the module
+ */
+extern void arp_init_module(void);
+/*
+ * arp_show - show all arp entries
+ */
+extern void arp_show(void);
+
+#endif /* __ARP_H_LOADED */
diff --git a/system/alpha/h/base.h b/system/alpha/h/base.h
new file mode 100644
index 000000000..46b0e65ca
--- /dev/null
+++ b/system/alpha/h/base.h
@@ -0,0 +1,78 @@
+#ifndef __BASE_H_LOADED
+#define __BASE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: base.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: base.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.1  1993/06/08  19:56:11  fdh
+ * Initial revision
+ *
+ */
+
+#include "lib.h"
+
+/* priority and critical sections */
+
+extern int base_ensurepriority(int priority);
+extern void base_setpriority(int priority);
+
+/* timing */
+extern void base_msdelay(int ms);
+
+/* second clock */
+time_t base_seconds;
+time_t base_time(int delta);
+extern int base_jiffies;  /* raw interrupt count */
+
+/* interrupts */
+
+/* process control */
+extern void base_yield();
+
+/* general */
+
+extern void base_kickthedog();   /* don't reboot for another XXX seconds */
+extern int base_watchdog;  /* if 0, timer interrupt handles watchdog
+        if non-zero, user code is responsible */
+
+#endif /* __BASE_H_LOADED */
diff --git a/system/alpha/h/bbram.h b/system/alpha/h/bbram.h
new file mode 100644
index 000000000..5b29c57b4
--- /dev/null
+++ b/system/alpha/h/bbram.h
@@ -0,0 +1,101 @@
+#ifndef __BBRAM_H_LOADED
+#define __BBRAM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: bbram.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: bbram.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/06/23  16:13:56  berc
+ * Initial revision
+ *
+ * Revision 1.6  1995/02/10  02:20:00  fdh
+ * Added definitions for OSTYPE location in battary backed RAM.
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/07/11  19:46:38  fdh
+ * Remove typecast used on the value set by the BBRAM_READ macro.
+ *
+ * Revision 1.3  1994/06/22  15:10:20  rusling
+ * Fixed up WNT compile warnings.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1994/03/16  00:13:48  fdh
+ * Initial revision
+ *
+ */
+
+
+/*
+ * The TOY clock contains some BBRAM that we can use to
+ * store useful stuff.  The BBRAM that is available to us
+ * is in bytes 14-127.
+ *
+ * Currently, we use:
+ *
+ * Bytes	Contents
+ *
+ * 14:18	bootadr + pattern
+ * 21:22	rmode + pattern
+ * 23:30 	default mac address + 2 bytes of checksum.
+ *
+ * Below some macros and offsets are defined to make programming
+ * this area easier.
+ */
+
+#define BBRAM_BASE	14
+
+#define BBRAM_READ(offset,value)	\
+        {				\
+        outportb(RTCADDR, BBRAM_BASE + (offset));		\
+        (value) = inportb(RTCDATA) & 0xFF;	\
+        }
+
+#define BBRAM_WRITE(offset,value)	\
+        {				\
+        outportb(RTCADDR, BBRAM_BASE + (offset));		\
+        outportb(RTCDATA, (value) & 0xFF);			\
+        }
+
+#define BBRAM_BOOTADR		0
+#define BBRAM_BOOTADR_COOKIE	0xA1
+#define BBRAM_RMODE		7
+#define BBRAM_RMODE_COOKIE	0x1B
+#define BBRAM_MACADDR		9
+#define BBRAM_MACADDR_COOKIE	0x1C
+#define BBRAM_OSTYPE		(0x3f-BBRAM_BASE)
+
+#endif /* __BBRAM_H_LOADED */
diff --git a/system/alpha/h/bootp.h b/system/alpha/h/bootp.h
new file mode 100644
index 000000000..0b0aa85d2
--- /dev/null
+++ b/system/alpha/h/bootp.h
@@ -0,0 +1,89 @@
+#ifndef __BOOTP_H_LOADED
+#define __BOOTP_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: bootp.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     BOOTP protocol interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: bootp.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.1  1993/08/06  10:27:32  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/* bootp_boot - performs a bootp transaction
+ *
+ * Arguments:
+ *     device_no       - device on which request should be sent
+ *     input_file_name - file name supplied by caller; or null for default. Null terminated;
+ *     server_addr     - returned server IP address
+ *     boot_file_name  - returned boot file name supplied by server
+ *
+ * Returned value:
+ *     TRUE   - bootp successful; server_addr and boot_file_name valid;
+ *     FALSE  - bootp failed; server_addr and boot_file_name invalid.
+ */
+extern int bootp_boot(int device_no,
+                      char input_file_name[128],
+                      ip_addr server_addr,
+                      char bootp_file_name[128]);
+
+/* bootp_init_module - initialise the module
+ */
+extern void bootp_init_module(void);
+
+#endif /* __BOOTP_H_LOADED */
+
diff --git a/system/alpha/h/bptable.h b/system/alpha/h/bptable.h
new file mode 100644
index 000000000..5be808c0f
--- /dev/null
+++ b/system/alpha/h/bptable.h
@@ -0,0 +1,111 @@
+#ifndef __BPTABLE_H_LOADED
+#define __BPTABLE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * This file defines the interface to the breakpoint table.
+ */
+
+#include "lib.h"
+#include "server_t.h"
+
+
+#define BPTMAX 100
+
+#define SUCCESS  1
+#define TRUE     1
+#define FALSE    0
+
+#define BPTFULL  (-1)  /* breakpoint table is full */
+#define BPTDUP   (-2)  /* duplicate breakpoint */
+#define BPTNOBRK (-3)  /* no such breakpoint */
+#define BPTINV   (-4)  /* this breakpoint number not in use */
+#define BPTILL   (-5)  /* illegal breakpoint number */
+
+/* bptinitialize - Initialize the breakpoint table.
+ */
+void bptinitialize(void);
+
+/* bptinsert - add a breakpoint to the breakpoint table
+ *
+ * Arguments:
+ *    addr      - address of breakpoint
+ *    savedinst - the instruction at that address
+ *
+ * Return value:
+ *    SUCCESS if successful, otherwise a negative error code.
+ */
+int bptinsert(address_value addr, instruction_value savedinst);
+
+/* bptremote - remove a breakpoint from the breakpoint table
+ *
+ * Arguments:
+ *     addr      - address of breakpoint
+ *     savedinst - (returned) saved instruction
+ * Return value:
+ *    SUCCESS if successful, otherwise a negative error code.
+ */
+int bptremove(address_value addr, instruction_value *savedinst);
+
+/* bptgetn - get a breakpoint by number
+ *
+ * Arguments:
+ *     n         - breakpoint number
+ *     addr      - (returned) address of breakpoint
+ *     savedinst - (returned) saved instruction
+ * Return value:
+ *    SUCCESS if successful, otherwise a negative error code.
+ */
+int bptgetn(int n, address_value *addr, instruction_value *savedinst);
+
+/* bptgeta - get a breakpoint by address
+ *
+ * Arguments:
+ *     addr      - address of breakpoint
+ *     savedinst - (returned) saved instruction
+ * Return value:
+ *    SUCCESS if successful, otherwise a negative error code.
+ */
+int bptgeta(address_value addr, instruction_value *savedinst);
+
+/* bptisbreakat - checks whether there is a breakpoint at the given address
+ *
+ * Argument:
+ *     addr      - address to be checked
+ * Return value:
+ *     TRUE if there is a breakpoint at that address; FALSE if not.
+ */
+int bptisbreakat(address_value addr);
+
+/* bptfull - checks whether the breakpoint table is full
+ *
+ * Return value:
+ *      TRUE if full; FALSE if not.
+ */
+int bptfull(void);
+
+#endif /* __BPTABLE_H_LOADED */
diff --git a/system/alpha/h/buffer.h b/system/alpha/h/buffer.h
new file mode 100644
index 000000000..35433c54a
--- /dev/null
+++ b/system/alpha/h/buffer.h
@@ -0,0 +1,70 @@
+#ifndef __BUFFER_H_LOADED
+#define __BUFFER_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: buffer.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: buffer.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:12  fdh
+ * Initial revision
+ *
+ */
+
+
+/* buffer.h */
+/* definitions for buffer management */
+
+
+typedef struct Packet {
+    struct Packet *link;
+    char dest[6];
+    char src[6];
+    short unsigned count;
+    char data[1536];
+  } PACKET;
+
+#define BSIZE (sizeof(PACKET))
+#define buffer_NIL ((PACKET *) 0)
+
+
+extern void buffer_init(PACKET *start, int size);
+extern PACKET *buffer_alloc();
+extern void buffer_free(PACKET *p);
+
+#endif /* __BUFFER_H_LOADED */
diff --git a/system/alpha/h/cia.h b/system/alpha/h/cia.h
new file mode 100644
index 000000000..737e3fb05
--- /dev/null
+++ b/system/alpha/h/cia.h
@@ -0,0 +1,457 @@
+#ifndef __CIA_H_LOADED
+#define __CIA_H_LOADED
+/*****************************************************************************
+
+       Copyright 1993, 1994, 1995 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: cia.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: cia.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1995/04/20  16:37:22  cruz
+ * Made some deletions and modifications.
+ *
+ * Revision 1.2  1994/12/19  18:33:02  cruz
+ * Added some new constants.
+ *
+ * Revision 1.1  1994/11/23  19:49:39  cruz
+ * Initial revision
+ *
+ *
+ */
+
+/*
+ ******************************** WARNING *******************************
+ *	BE EXTREMELY CAREFUL WHEN USING OFFSETS LARGER THAN 0x8000  WITH
+ *	AN "LDA" INSTRUCTION BECAUSE THEY WILL CAUSE AN UNWANTED SIGN
+ *	EXTENSION.
+ ******************************** WARNING *******************************
+*/
+
+/* ======================================================================
+ * =			BASE ADDRESSES					=
+ * ======================================================================
+ *
+ *	Define the base address for registers accessing the memory
+ *	controller
+*/
+#define MC_GCR_BASE		0x874	/* General Control Register	*/
+#define MC_GCR_BASE_SHIFT 	28	/* Shift base by this # of bits */
+#define MC_DIAG_BASE		0x874	/* Diagnostic Registers		*/
+#define MC_DIAG_BASE_SHIFT 	28
+#define MC_PERFMON_BASE		0x874	/* Performance monitoring regs 	*/
+#define MC_PERFMON_BASE_SHIFT 	28
+#define MC_ERROR_BASE		0x874	/* Error Registers		*/
+#define MC_ERROR_BASE_SHIFT 	28
+#define MC_MCR_BASE		0x875	/* Memory Configuration Registers*/
+#define MC_MCR_BASE_SHIFT 	28
+#define MC_PCI_BASE		0x876	/* PCI Configuration Registers	*/
+#define MC_PCI_BASE_SHIFT 	28
+
+
+/* ======================================================================
+ * =	  OFFSETS FOR THE GENERAL CONTROL REGISTERS (87.4000.0000)	=
+ * ======================================================================
+*/
+#define MC_PCI_REV		0x80	/* Revision of CIA ASIC.	*/
+#define MC_PCI_LAT		0xC0	/* PCI Master Latency Timer.	*/
+#define MC_CIA_CTRL		0x100	/* CIA Control Register.	*/
+#define MC_CIA_CNFG		0x200	/* CIA Configuration Register.	*/
+#define MC_HAE_MEM		0x400   /* HW Address Extension (Sparse)*/
+#define MC_HAE_IO		0x440	/* HW Addr. Ext. for sparse IO.	*/
+#define MC_CFG			0x480	/* Configuration reg for bridges*/
+#define MC_CACK_EN		0x600	/* Acknowledgement Control Reg.	*/
+
+
+/* ======================================================================
+ * =	    OFFSETS FOR THE DIAGNOSTIC REGISTERS (87.4000.0000)		=
+ * ======================================================================
+*/
+#define MC_CIA_DIAG		0x2000	/* Diagnostic control register	*/
+#define MC_DIAG_CHECK		0x3000	/* Diagnostic check register	*/
+
+
+/* ======================================================================
+ * =   OFFSETS FOR THE PERFORMANCE MONITORING REGISTERS (87.4000.0000)	=
+ * ======================================================================
+*/
+#define MC_PERF_MONITOR		0x4000	/* Performance monitor register	*/
+#define MC_PERF_CONTROL		0x4040	/* Perf. Mon. Control register	*/
+
+
+/* ======================================================================
+ * =	      OFFSETS FOR THE ERROR REGISTERS (87.4000.0000)		=
+ * ======================================================================
+*/
+#define MC_CPU_ERR0		0x8000	/* CPU Error Info Register 0.	*/
+#define MC_CPU_ERR1		0x8040	/* CPU Error Info Register 1.	*/
+#define MC_CIA_ERR		0x8200	/* CIA Error Register.		*/
+#define MC_CIA_STAT		0x8240	/* CIA Status Register.		*/
+#define MC_ERR_MASK		0x8280	/* CIA Error Mask Register.	*/
+#define MC_CIA_SYN		0x8300	/* CIA Syndrome Register.	*/
+#define MC_MEM_ERR0		0x8400	/* Memory Port Status Register 0*/
+#define MC_MEM_ERR1		0x8440	/* Memory Port Status Register 1*/
+#define MC_PCI_ERR0		0x8800	/* PCI Error Status Register 0.	*/
+#define MC_PCI_ERR1		0x8840	/* PCI Error Status Register 1.	*/
+
+
+/* ======================================================================
+ * =   OFFSETS FOR THE MEMORY CONFIGURATION REGISTERS (87.5000.0000)	=
+ * ======================================================================
+*/
+#define MC_MCR			0x0	/* Memory Configuration Register*/
+#define MC_MBA0			0x600	/* Memory Base Address Register	*/
+#define MC_MBA2			0x680	/* Memory Base Address Register	*/
+#define MC_MBA4			0x700	/* Memory Base Address Register	*/
+#define MC_MBA6			0x780	/* Memory Base Address Register	*/
+#define MC_MBA8			0x800	/* Memory Base Address Register	*/
+#define MC_MBAA			0x880	/* Memory Base Address Register	*/
+#define MC_MBAC			0x900	/* Memory Base Address Register	*/
+#define MC_MBAE			0x980	/* Memory Base Address Register	*/
+#define MC_TMG0			0xB00	/* Memory Timing Register	*/
+#define MC_TMG1			0xB40	/* Memory Timing Register	*/
+#define MC_TMG2			0xB80	/* Memory Timing Register	*/
+
+
+/* ======================================================================
+ * =     OFFSETS FOR THE PCI CONFIGURATION REGISTERS (87.6000.0000)	=
+ * ======================================================================
+*/
+#define MC_TBIA			0x100	/* S/G Translation Buffer Inval.*/
+#define MC_W0_BASE		0x400	/* Window Base 0.		*/
+#define MC_W0_MASK		0x440	/* Window Mask 0.		*/
+#define MC_T0_BASE		0x480	/* Translated Base 0.		*/
+#define MC_W1_BASE		0x500	/* Window Base 1.		*/
+#define MC_W1_MASK		0x540	/* Window Mask 1.		*/
+#define MC_T1_BASE		0x580	/* Translated Base 1.		*/
+#define MC_W2_BASE		0x600	/* Window Base 2.		*/
+#define MC_W2_MASK		0x640	/* Window Mask 2.		*/
+#define MC_T2_BASE		0x680	/* Translated Base 2.		*/
+#define MC_W3_BASE		0x700	/* Window Base 3.		*/
+#define MC_W3_MASK		0x740	/* Window Mask 3.		*/
+#define MC_T3_BASE		0x780	/* Translated Base 3.		*/
+#define MC_DAC			0x7C0	/* Window DAC Base.		*/
+#define MC_LTB_TAG0		0x800	/* Lockable Translation Buffer.	*/
+#define MC_LTB_TAG1		0x840	/* Lockable Translation Buffer.	*/
+#define MC_LTB_TAG2		0x880	/* Lockable Translation Buffer.	*/
+#define MC_LTB_TAG3		0x8C0	/* Lockable Translation Buffer.	*/
+#define MC_TB_TAG0		0x900	/* Translation Buffer Tag.	*/
+#define MC_TB_TAG1		0x940	/* Translation Buffer Tag.	*/
+#define MC_TB_TAG2		0x980	/* Translation Buffer Tag.	*/
+#define MC_TB_TAG3		0x9C0	/* Translation Buffer Tag.	*/
+#define MC_TB0_PAGE0		0x1000	/* Translation Buffer 0 Page.	*/
+#define MC_TB0_PAGE1		0x1040	/* Translation Buffer 0 Page.	*/
+#define MC_TB0_PAGE2		0x1080	/* Translation Buffer 0 Page.	*/
+#define MC_TB0_PAGE3		0x10C0	/* Translation Buffer 0 Page.	*/
+#define MC_TB1_PAGE0		0x1100	/* Translation Buffer 1 Page.	*/
+#define MC_TB1_PAGE1		0x1140	/* Translation Buffer 1 Page.	*/
+#define MC_TB1_PAGE2		0x1180	/* Translation Buffer 1 Page.	*/
+#define MC_TB1_PAGE3		0x11C0	/* Translation Buffer 1 Page.	*/
+#define MC_TB2_PAGE0		0x1200	/* Translation Buffer 2 Page.	*/
+#define MC_TB2_PAGE1		0x1240	/* Translation Buffer 2 Page.	*/
+#define MC_TB2_PAGE2		0x1280	/* Translation Buffer 2 Page.	*/
+#define MC_TB2_PAGE3		0x12C0	/* Translation Buffer 2 Page.	*/
+#define MC_TB3_PAGE0		0x1300	/* Translation Buffer 3 Page.	*/
+#define MC_TB3_PAGE1		0x1340	/* Translation Buffer 3 Page.	*/
+#define MC_TB3_PAGE2		0x1380	/* Translation Buffer 3 Page.	*/
+#define MC_TB3_PAGE3		0x13C0	/* Translation Buffer 3 Page.	*/
+#define MC_TB4_PAGE0		0x1400	/* Translation Buffer 4 Page.	*/
+#define MC_TB4_PAGE1		0x1440	/* Translation Buffer 4 Page.	*/
+#define MC_TB4_PAGE2		0x1480	/* Translation Buffer 4 Page.	*/
+#define MC_TB4_PAGE3		0x14C0	/* Translation Buffer 4 Page.	*/
+#define MC_TB5_PAGE0		0x1500	/* Translation Buffer 5 Page.	*/
+#define MC_TB5_PAGE1		0x1540	/* Translation Buffer 5 Page.	*/
+#define MC_TB5_PAGE2		0x1580	/* Translation Buffer 5 Page.	*/
+#define MC_TB5_PAGE3		0x15C0	/* Translation Buffer 5 Page.	*/
+#define MC_TB6_PAGE0		0x1600	/* Translation Buffer 6 Page.	*/
+#define MC_TB6_PAGE1		0x1640	/* Translation Buffer 6 Page.	*/
+#define MC_TB6_PAGE2		0x1680	/* Translation Buffer 6 Page.	*/
+#define MC_TB6_PAGE3		0x16C0	/* Translation Buffer 6 Page.	*/
+#define MC_TB7_PAGE0		0x1700	/* Translation Buffer 7 Page.	*/
+#define MC_TB7_PAGE1		0x1740	/* Translation Buffer 7 Page.	*/
+#define MC_TB7_PAGE2		0x1780	/* Translation Buffer 7 Page.	*/
+#define MC_TB7_PAGE3		0x17C0	/* Translation Buffer 7 Page.	*/
+
+
+/* ======================================================================
+ * =   		BIT EXTENT FOR CIA_CTRL REGISTER (87.4000.0100)		=
+ * ======================================================================
+*/
+#define MC_CIA_CTRL_V_PCI_EN		0
+#define MC_CIA_CTRL_M_PCI_EN 		(1 << MC_CIA_CTRL_V_PCI_EN)
+#define MC_CIA_CTRL_V_PCI_LOCK_EN	1
+#define MC_CIA_CTRL_M_PCI_LOCK_EN 	(1 << MC_CIA_CTRL_V_PCI_LOCK_EN)
+#define MC_CIA_CTRL_V_PCI_LOOP_EN	2
+#define MC_CIA_CTRL_M_PCI_LOOP_EN 	(1 << MC_CIA_CTRL_V_PCI_LOOP_EN)
+#define MC_CIA_CTRL_V_FST_BB_EN		3
+#define MC_CIA_CTRL_M_FST_BB_EN 	(1 << MC_CIA_CTRL_V_FST_BB_EN)
+#define MC_CIA_CTRL_V_PCI_MST_EN	4
+#define MC_CIA_CTRL_M_PCI_MST_EN 	(1 << MC_CIA_CTRL_V_PCI_MST_EN)
+#define MC_CIA_CTRL_V_PCI_MEM_EN	5
+#define MC_CIA_CTRL_M_PCI_MEM_EN 	(1 << MC_CIA_CTRL_V_PCI_MEM_EN)
+#define MC_CIA_CTRL_V_PCI_REQ64_EN	6
+#define MC_CIA_CTRL_M_PCI_REQ64_EN 	(1 << MC_CIA_CTRL_V_PCI_REQ64_EN)
+#define MC_CIA_CTRL_V_PCI_ACK64_EN	7
+#define MC_CIA_CTRL_M_PCI_ACK64_EN 	(1 << MC_CIA_CTRL_V_PCI_ACK64_EN)
+#define MC_CIA_CTRL_V_ADDR_PE_EN	8
+#define MC_CIA_CTRL_M_ADDR_PE_EN 	(1 << MC_CIA_CTRL_V_ADDR_PE_EN)
+#define MC_CIA_CTRL_V_PERR_EN		9
+#define MC_CIA_CTRL_M_PERR_EN 		(1 << MC_CIA_CTRL_V_PERR_EN)
+#define MC_CIA_CTRL_V_FILLERR_EN	10
+#define MC_CIA_CTRL_M_FILLERR_EN 	(1 << MC_CIA_CTRL_V_FILLERR_EN)
+#define MC_CIA_CTRL_V_MCHKERR_EN	11
+#define MC_CIA_CTRL_M_MCHKERR_EN 	(1 << MC_CIA_CTRL_V_MCHKERR_EN)
+#define MC_CIA_CTRL_V_ECC_CHK_EN	12
+#define MC_CIA_CTRL_M_ECC_CHK_EN 	(1 << MC_CIA_CTRL_V_ECC_CHK_EN)
+#define MC_CIA_CTRL_V_ASSERT_IDLE_BC	13
+#define MC_CIA_CTRL_M_ASSERT_IDLE_BC 	(1 << MC_CIA_CTRL_V_ASSERT_IDLE_BC)
+#define MC_CIA_CTRL_V_CON_IDLE_BC	14
+#define MC_CIA_CTRL_M_CON_IDLE_BC 	(1 << MC_CIA_CTRL_V_CON_IDLE_BC)
+#define MC_CIA_CTRL_V_CSR_IOA_BYPASS 	15
+#define MC_CIA_CTRL_M_CSR_IOA_BYPASS  	(1 << MC_CIA_CTRL_V_CSR_IOA_BYPASS )
+#define MC_CIA_CTRL_V_IO_FLUSHREQ_EN 	16
+#define MC_CIA_CTRL_M_IO_FLUSHREQ_EN	(1 << MC_CIA_CTRL_V_IO_FLUSHREQ_EN )
+#define MC_CIA_CTRL_V_CPU_FLUSHREQ_EN 	17
+#define MC_CIA_CTRL_M_CPU_FLUSHREQ_EN 	(1 << MC_CIA_CTRL_V_CPU_FLUSHREQ_EN )
+#define MC_CIA_CTRL_V_ARB_EV5_EN	18
+#define MC_CIA_CTRL_M_ARB_EV5_EN 	(1 << MC_CIA_CTRL_V_ARB_EV5_EN)
+#define MC_CIA_CTRL_V_EN_ARB_LINK	19
+#define MC_CIA_CTRL_M_EN_ARB_LINK 	(1 << MC_CIA_CTRL_V_EN_ARB_LINK)
+#define MC_CIA_CTRL_V_RD_TYPE		20
+#define MC_CIA_CTRL_M_RD_TYPE 		(3 << MC_CIA_CTRL_V_RD_TYPE)
+#define MC_CIA_CTRL_V_RL_TYPE		24
+#define MC_CIA_CTRL_M_RL_TYPE 		(3 << MC_CIA_CTRL_V_RL_TYPE)
+#define MC_CIA_CTRL_V_RM_TYPE		28
+#define MC_CIA_CTRL_M_RM_TYPE 		(3 << MC_CIA_CTRL_V_RM_TYPE)
+
+
+/* ======================================================================
+ * =   		BIT EXTENT FOR CACK_EN REGISTER (87.4000.0600)		=
+ * ======================================================================
+*/
+#define MC_CACK_EN_V_MEM_LOCK	0x0	/* Controls LOCK enable.	*/
+#define MC_CACK_EN_V_MB		0x1	/* Controls MB enable.		*/
+#define MC_CACK_EN_V_SET_DIRTY	0x2	/* Controls SET_DIRTY enable.	*/
+#define MC_CACK_EN_V_BC_VICTIM	0x3	/* Controls BC_VICTIM enable.	*/
+
+
+/* ======================================================================
+ * =   		BIT SIZES FOR CACK_EN REGISTER (87.4000.0600)		=
+ * ======================================================================
+*/
+#define MC_CACK_EN_S_MEM_LOCK	1	/* Controls LOCK enable.	*/
+#define MC_CACK_EN_S_MB		1	/* Controls MB enable.		*/
+#define MC_CACK_EN_S_SET_DIRTY	1	/* Controls SET_DIRTY enable.	*/
+#define MC_CACK_EN_S_BC_VICTIM	1	/* Controls BC_VICTIM enable.	*/
+
+/* ======================================================================
+ * =   		BIT MASKS FOR CACK_EN REGISTER (87.4000.0600)		=
+ * ======================================================================
+*/
+#define MC_CACK_EN_M_MEM_LOCK	(((1<<MC_CACK_EN_S_MEM_LOCK)-1) << MC_CACK_EN_V_MEM_LOCK)
+#define MC_CACK_EN_M_MB		(((1<<MC_CACK_EN_S_MB)-1) << MC_CACK_EN_V_MB)
+#define MC_CACK_EN_M_SET_DIRTY	(((1<<MC_CACK_EN_S_SET_DIRTY)-1) << MC_CACK_EN_V_SET_DIRTY)
+#define MC_CACK_EN_M_BC_VICTIM	(((1<<MC_CACK_EN_S_BC_VICTIM)-1) << MC_CACK_EN_V_BC_VICTIM)
+
+
+/* ======================================================================
+ * =   		BIT EXTENT FOR MCR REGISTER (87.5000.0000)		=
+ * ======================================================================
+*/
+#define MC_MCR_V_MEM_SIZE	0x0	/* 1 = 256-bit data, 0 = 128-bit*/
+#define MC_MCR_V_CACHE_SIZE	0x4	/* Set to match CPU's cache size*/
+#define MC_MCR_V_REF_RATE	0x8	/* Refresh rate counter.	*/
+#define MC_MCR_V_REF_BURST	0x18	/* Refresh burst.		*/
+#define MC_MCR_V_TMG_R0		0x20	/* Row address setup.		*/
+#define MC_MCR_V_LONG_CBR_CAS	0x22	/* Refresh CAS pulse width.	*/
+#define MC_MCR_V_DLY_IDLE_BC	0x26	/* ??.				*/
+#define MC_MCR_V_EARLY_IDLE_BC	0x29	/* ??.				*/
+
+
+/* ======================================================================
+ * =   		  BIT SIZES FOR MCR REGISTER (87.5000.0000)		=
+ * ======================================================================
+*/
+#define MC_MCR_S_MEM_SIZE	1
+#define MC_MCR_S_CACHE_SIZE	3
+#define MC_MCR_S_REF_RATE	10
+#define MC_MCR_S_REF_BURST	2
+#define MC_MCR_S_TMG_R0		2
+#define MC_MCR_S_LONG_CBR_CAS	1
+#define MC_MCR_S_DLY_IDLE_BC	2
+#define MC_MCR_S_EARLY_IDLE_BC	1
+
+/* ======================================================================
+ * =   		 BIT MASKS FOR MCR REGISTER (87.5000.0000)		=
+ * ======================================================================
+*/
+#define MC_MCR_M_MEM_SIZE	(((1<<MC_MCR_S_MEM_SIZE)-1) << MC_MCR_V_MEM_SIZE)
+#define MC_MCR_M_CACHE_SIZE	(((1<<MC_MCR_S_CACHE_SIZE)-1) << MC_MCR_V_CACHE_SIZE)
+#define MC_MCR_M_REF_RATE	(((1<<MC_MCR_S_REF_RATE)-1) << MC_MCR_V_REF_RATE)
+#define MC_MCR_M_REF_BURST	(((1<<MC_MCR_S_REF_BURST)-1) << MC_MCR_V_REF_BURST)
+#define MC_MCR_M_TMG_R0		(((1<<MC_MCR_S_TMG_R0)-1) << MC_MCR_V_TMG_R0)
+#define MC_MCR_M_LONG_CBR_CAS	(((1<<MC_MCR_S_LONG_CBR_CAS)-1) << MC_MCR_V_LONG_CBR_CAS)
+#define MC_MCR_M_DLY_IDLE_BC	(((1<<MC_MCR_S_DLY_IDLE_BC)-1) << MC_MCR_V_DLY_IDLE_BC)
+#define MC_MCR_M_EARLY_IDLE_BC	(((1<<MC_MCR_S_EARLY_IDLE_BC)-1) << MC_MCR_V_EARLY_IDLE_BC)
+
+/* ======================================================================
+ * =   		BIT EXTENT FOR TIMING REGISTERS 			=
+ * ======================================================================
+*/
+#define MC_TMG_V_R1	0		/*  [1:0] row address hold  	*/
+#define MC_TMG_V_R2	2		/*  [3:2] row address hold	*/
+#define MC_TMG_V_R3	4		/*  [5:4] read, cycle time 	*/
+#define MC_TMG_V_R4	6		/*  [7:6] read, delay from 	*/
+                                        /*  MEM_RD_RDY to CAS assertion	*/
+#define MC_TMG_V_R5	8		/*  [9:8] read, cas pulse width	*/
+#define MC_TMG_V_R6	10		/*  [11:10] read, column address hold*/
+#define MC_TMG_V_W1	12		/*  [13:12] writes, non-linked 	*/
+                                        /* victim, delay from start to MEM_WR */
+#define MC_TMG_V_W4	14		/*[16:14] writes, MEM_WR to CAS assert*/
+#define MC_TMG_V_PRE	17		/* [17] RAS Pre-charge delay 	*/
+                                        /* __0=no delay, 1=delay 30 ns	*/
+#define MC_TMG_V_V3	18		/*  [19:18] write, cycle time 	*/
+#define MC_TMG_V_V4	20		/*  [22:20] linked victim,  	*/
+                                        /*  MEM_WR to CAS assertion	*/
+#define MC_TMG_V_V5	24		/*  [25:24] write, victim, CAS 	*/
+                                        /*  pulse width			*/
+#define MC_TMG_V_V6	26		/*  [27:26] victim/write, column*/
+                                        /*  address hold		*/
+#define MC_TMG_V_RV	28		/*  [29:28] read-victim, delay 	*/
+                                        /*  from MEM_RD_RDY de-assertion*/
+                                        /*  to MEM_WR			*/
+#define MC_TMG_V_RD_DLY	30		/*  [31:30] select clk the dsw 	*/
+                                        /*  will use to capture memory 	*/
+                                        /*  data 0=CLK, 1=CLK2X		*/
+
+
+/* ======================================================================
+ * =   		BIT EXTENT FOR MBA REGISTERS (87.5000.0600 + n*80)	=
+ * ======================================================================
+*/
+#define MC_MBA_V_S0_VALID	0	/* Side 0 for the bank is valid	*/
+#define MC_MBA_V_ROW_TYPE	1       /* Row and Column configuration	*/
+#define MC_MBA_V_MASK		4	/* Indicates size of mem SIMMs	*/
+#define MC_MBA_V_S1_VALID	15   	/* Side 1 for the bank is valid	*/
+#define MC_MBA_V_PATTERN	16      /* Base address of the bank	*/
+#define MC_MBA_V_TMG_SEL	28      /* Select timing register.	*/
+
+/* ======================================================================
+ * =   	  BIT FIELD VALUES FOR MBA REGISTERS (87.5000.0600 + n*80)	=
+ * ======================================================================
+*/
+#define MC_MBA_V_ROW_TYPE_10X10	0       /* 10 row, 10 column		*/
+#define MC_MBA_V_ROW_TYPE_12X10	1       /* 12 row, 10 column		*/
+#define MC_MBA_V_ROW_TYPE_11X11	1       /* 11 row, 11 column		*/
+#define MC_MBA_V_ROW_TYPE_13X11	2       /* 13 row, 11 column		*/
+#define MC_MBA_V_ROW_TYPE_12X12	2       /* 12 row, 12 column		*/
+
+#define MC_MBA_V_TMG_SEL_TMG0	0	/* Select timing register 0.	*/
+#define MC_MBA_V_TMG_SEL_TMG1	1	/* Select timing register 1.	*/
+#define MC_MBA_V_TMG_SEL_TMG2	2	/* Select timing register 2.	*/
+
+
+/* ======================================================================
+ * =   		BIT SIZES FOR MBA REGISTERS (87.5000.0600 + n*80)	=
+ * ======================================================================
+*/
+#define MC_MBA_S_S0_VALID	1
+#define MC_MBA_S_ROW_TYPE	2
+#define MC_MBA_S_MASK		5
+#define MC_MBA_S_S1_VALID	1
+#define MC_MBA_S_PATTERN	10
+#define MC_MBA_S_TMG_SEL	2
+
+/* ======================================================================
+ * =   		 BIT MASKS FOR MBA REGISTERS (87.5000.0600 + n*80)	=
+ * ======================================================================
+*/
+#define MC_MBA_M_S0_VALID	(((1<<MC_MBA_S_S0_VALID)-1) << MC_MBA_V_S0_VALID)
+#define MC_MBA_M_ROW_TYPE	(((1<<MC_MBA_S_ROW_TYPE)-1) << MC_MBA_V_ROW_TYPE)
+#define MC_MBA_M_MASK		(((1<<MC_MBA_S_MASK)-1) << MC_MBA_V_MASK)
+#define MC_MBA_M_S1_VALID	(((1<<MC_MBA_S_S1_VALID)-1) << MC_MBA_V_S1_VALID)
+#define MC_MBA_M_PATTERN	(((1<<MC_MBA_S_PATTERN)-1) << MC_MBA_V_PATTERN)
+#define MC_MBA_M_TMG_SEL	(((1<<MC_MBA_S_TMG_SEL)-1) << MC_MBA_V_TMG_SEL)
+
+
+
+#define cia_k_main_csr_base 	0x0874	/* CIA General Control Register Base*/
+#define cia_v_main_csr_base 	28	/* Shift base by this # of bits */
+
+/* Offsets from CIA control base register. 				*/
+
+#define hae_mem			0x0400
+#define hae_io			0x0440
+
+#define cia_err			0x8200
+#define cia_err_mask		0x8280
+#define cia_err_v_rcvd_mas_abt	7
+#define cia_err_m_rcvd_mas_abt (1 << cia_err_v_rcvd_mas_abt)
+#define cia_err_mask_v_mas_abt	7
+#define cia_err_mask_m_mas_abt	(1 << cia_err_mask_v_mas_abt)
+
+#define cia_k_addr_trans	0x876	/* CIA's PCI Address Translation Regs*/
+#define cia_v_addr_trans	28	/* Shift base by this # of bits */
+
+/* Offsets from PCI address translation base register.	Must be < 0x8000 */
+/* if they are to be used with LDA instructions!			*/
+#define w_base0			0x0400
+#define w_mask0			0x0440
+#define t_base0			0x0480
+#define w_base1			0x0500
+#define w_mask1			0x0540
+#define t_base1			0x0580
+#define w_base2			0x0600
+#define w_mask2			0x0640
+#define t_base2			0x0680
+#define w_base3			0x0700
+#define w_mask3			0x0740
+#define t_base3			0x0780
+
+#define w_v_en			0x0
+#define w_m_en			(1 << w_v_en)
+
+
+
+/* CIA Memory Control Register. */
+#define mcr			0
+#define mba			0x600
+#define mba_v_disp		0x7
+#define mba_k_disp		0x80 	/* 1 << mba_v_disp */
+
+
+
+/* The following constants define which bits are provided by the HAE_MEM*/
+/* register for each of the three sparse regions.			*/
+#define hae_sp1_bits		0xE0000000
+#define hae_sp2_bits		0xF8000000
+#define hae_sp3_bits		0xFC000000
+
+#endif /* __CIA_H_LOADED */
diff --git a/system/alpha/h/eb164.h b/system/alpha/h/eb164.h
new file mode 100644
index 000000000..b4fbd6bfd
--- /dev/null
+++ b/system/alpha/h/eb164.h
@@ -0,0 +1,186 @@
+#ifndef __EB164_H_LOADED
+#define __EB164_H_LOADED
+/*****************************************************************************
+
+Copyright © 1993, Digital Equipment Corporation, Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb164.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb164.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1995/02/10  02:21:36  fdh
+ * Corrected EB164 banner.
+ *
+ * Revision 1.2  1994/12/07  21:24:58  cruz
+ * Added constant defining the maximum size of the BCache
+ *
+ * Revision 1.1  1994/11/23  19:47:30  cruz
+ * Initial revision
+ *
+ *
+ */
+
+#ifdef EB164
+
+#define BANNER "DECchip 21164 Evaluation Board (EB164) Debug Monitor"
+#define PROMPT "EB164> "
+
+/****************************************************************************
+ * Basic                                                                    *
+ ****************************************************************************/
+
+#define NEEDPCI
+#define NEEDDEBUGGER
+#define NEEDFLOPPY
+
+/****************************************************************************
+ * CIA (Part of CIA) definitions	                                    *
+ ****************************************************************************/
+#include "cia.h"
+
+/****************************************************************************
+ * Plug in cards, what does it have?                                        *
+ ****************************************************************************/
+/*
+ * The Allied Telesis card is an ISA card based on the am79c960
+ * chip.
+ */
+#define ALLIED_TELESIS_AT_1500T
+
+/*
+ *  The DEC Etherworks ISA card is a LANCE like device.
+ */
+#define DEC_ETHERWORKS
+
+#define NEED21040
+
+/****************************************************************************
+ * ISA Address Space                                                        *
+ ****************************************************************************/
+
+#define RTCBASE                             0x70
+#define LEDPORT                             0x80  /* JDR Microdevices P.O.S.T. Diagnostics Card. */
+
+
+/*
+ * Allied telesis is optional.  We treat it like an optional
+ * am79c960 as far as the driver is concerned, see /h/am79c960.h
+ * for more definitions and /ether/am79c960_device.c for the device
+ * driver.
+ */
+#ifdef ALLIED_TELESIS_AT_1500T
+#define OPTIONAL_AM79C960		/* warning only define this once - kmc	*/
+#define NEEDAM79C960			/* same for this 			*/
+#define OPTIONAL_AM79C960_BASE              0x360
+#define OPTIONAL_AM79C960_INT               9
+
+/*
+ * This parameter determines the
+ * DMA Mask for the DMA2 controller.
+ *       Mask     Channel
+ *       ----     -------
+ *        1          5
+ *        2          6
+ *        3          7
+ *        4          8
+ */
+#define OPTIONAL_AM79C960_DMA               1 /* Selects DMA Channel 5 */
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+
+/****************************************************************************
+ * System Address Space                                                     *
+ ****************************************************************************/
+
+#define MINIMUM_SYSTEM_MEMORY		    0x1000000 /* 16MB */
+#define MAXIMUM_SYSTEM_CACHE     	    0x800000  /* 8MB */
+#define DMA_BUFF_BASE                       0x100000
+
+
+/****************************************************************************
+ * PCI I/O Address Space                                                    *
+ ****************************************************************************/
+/*
+ * Definitions for the windows mapping PCI addresses into
+ * system addresses
+ *
+ * 16 megabyte window starting at CPU address = 0.
+ */
+
+#define PCI_BASE_1_USED                     1
+#define PCI_BASE_1                          0x000100000
+#define PCI_MASK_1                          0x000000000
+#define PCI_TBASE_1                         0x000100000
+
+#define PCI_BASE_2_USED                     0
+#define PCI_BASE_2                          0x000000000
+#define PCI_MASK_2                          0x000000000
+#define PCI_TBASE_2                         0x000000000
+
+#define PCI_BASE_3_USED                     0
+#define PCI_BASE_3                          0x000000000
+#define PCI_MASK_3                          0x000000000
+#define PCI_TBASE_3                         0x000000000
+
+#define PCI_BASE_4_USED                     0
+#define PCI_BASE_4                          0x000000000
+#define PCI_MASK_4                          0x00000000
+#define PCI_TBASE_4                         0x000000000
+
+/*
+ * Each mask translates to a number of these units.  For
+ * APECS this unit is 1Kbyte.
+ */
+#define PCI_MASK_UNIT                       0x100000
+
+/*
+ * Where do we start allocating addresses from in PCI I/O space?
+ */
+#define PCI_IO_BASE                         0xB000
+
+/*
+ * ROM definitions.
+ */
+#define NEEDFLASHMEMORY
+#define INTEL_28F008SA
+#define ROMBASE 0xFFF80000
+#define ROMSIZE 0x100000
+#define ROMINC 0x1
+
+#endif /* EB164 */
+#endif /* __EB164_H_LOADED */
+
diff --git a/system/alpha/h/eb164mem.h b/system/alpha/h/eb164mem.h
new file mode 100644
index 000000000..0e35de570
--- /dev/null
+++ b/system/alpha/h/eb164mem.h
@@ -0,0 +1,71 @@
+#ifndef __EB164MEM_H_LOADED
+#define __EB164MEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb164mem.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb164mem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/04/20  16:37:48  cruz
+ * Made some macro definition changes.
+ *
+ * Revision 1.1  1994/12/19  18:33:33  cruz
+ * Initial revision
+ *
+ *
+ */
+
+#ifdef EB164
+
+#include "system.h"
+#include "lib.h"
+#include "cia.h"
+
+#ifndef MAKEDEPEND
+#include "cserve.h"
+#endif
+
+
+/*
+ *  Macros used to access the memory controller
+ *  csr's.
+ */
+#define MEM_MCR(x)        (((ul)MC_MCR_BASE<<MC_MCR_BASE_SHIFT)|(ul)(x))
+#define _IN_MEM_MCR(p)    (ReadL(MEM_MCR(p)))
+#define _OUT_MEM_MCR(p,d) WriteL((MEM_MCR(p)),d);mb();
+
+#define MEM_GCR(x)        (((ul)MC_GCR_BASE<<MC_GCR_BASE_SHIFT)|(ul)(x))
+#define _IN_MEM_GCR(p)    (ReadL(MEM_GCR(p)))
+#define _OUT_MEM_GCR(p,d) WriteL((MEM_GCR(p)),d);mb();
+
+#endif /* EB164 */
+#endif /* __EB164MEM_H_LOADED */
diff --git a/system/alpha/h/eb64.h b/system/alpha/h/eb64.h
new file mode 100644
index 000000000..e79e09ee2
--- /dev/null
+++ b/system/alpha/h/eb64.h
@@ -0,0 +1,180 @@
+#ifndef __EB64_H_LOADED
+#define __EB64_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb64.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb64.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.19  1995/03/05  12:06:43  fdh
+ * Adjusted ROMINC to access ROM bytes at
+ * longword boundaries as required.
+ *
+ * Revision 1.18  1995/03/05  04:18:20  fdh
+ * Changed ROMBASE and ROMINC definitions to use the
+ * I/O bus addresses by using inrom().
+ *
+ * Revision 1.17  1995/02/10  02:56:08  fdh
+ * Disabled bootopt command because the current SROM doesn't support it.
+ *
+ * Revision 1.16  1994/11/28  18:26:46  fdh
+ * Added definition to enable the special ROM access
+ * required for the EB64.
+ *
+ * Revision 1.15  1994/11/08  21:36:10  fdh
+ * Added ROM definitions.  Moved from rom.c
+ *
+ * Revision 1.14  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.13  1994/07/21  18:09:32  fdh
+ * Added MAXIMUM_SYSTEM_CACHE definition.
+ *
+ * Revision 1.12  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.11  1994/04/06  05:09:11  fdh
+ * Removed an ethernet driver.
+ *
+ * Revision 1.10  1994/04/04  15:15:44  fdh
+ * Added definition for LEDPORT.
+ *
+ * Revision 1.9  1994/04/01  13:57:22  fdh
+ * Added MINIMUM_SYSTEM_MEMORY definition and
+ * removed obsoleted PAL_IMPURE definition.
+ *
+ * Revision 1.8  1994/03/24  21:42:14  fdh
+ * Removed unnecessary compile-time conditionals.
+ *
+ * Revision 1.7  1994/02/14  16:25:01  rusling
+ * Allow remote debug support in the NT build case.
+ *
+ * Revision 1.6  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.5  1993/11/22  15:24:30  rusling
+ * Fixed up am79c960 embedded definitions.
+ *
+ * Revision 1.4  1993/11/22  14:20:41  rusling
+ * Modified am79c960 definitions.
+ *
+ * Revision 1.3  1993/11/22  13:17:13  rusling
+ * Merged with PCI/21040 changes.
+ *
+ * Revision 1.2  1993/11/22  12:16:20  rusling
+ * Added in further definitions
+ *
+ * Revision 1.1  1993/11/22  11:42:50  rusling
+ * Initial revision
+ *
+ */
+
+#ifdef EB64
+
+#define BANNER "DECchip 21064 Evaluation Board (EB64) Debug Monitor"
+#define PROMPT "EB64> "
+
+/****************************************************************************
+ * Basic                                                                    *
+ ****************************************************************************/
+
+#define NEEDSCTL
+#define NEEDDEBUGGER
+#define NEEDAM79C960
+#define NEEDFLOPPY
+#define NEEDEB64SPECIALROMACCESS
+#define DISABLEBOOTOPTION   /* Current SROM does not support this */
+
+/****************************************************************************
+ * Plug in cards, what does it have?                                        *
+ ****************************************************************************/
+/*
+ * The Allied Telesis card is an ISA card based on the am79c960
+ * chip.
+ */
+#define ALLIED_TELESIS_AT_1500T
+
+/*
+ *  The DEC Etherworks ISA card is a LANCE like device.
+ */
+#define DEC_ETHERWORKS
+
+/****************************************************************************
+ * ISA Address Space                                                        *
+ ****************************************************************************/
+
+#define LEDPORT                             0x80  /* JDR Microdevices P.O.S.T. Diagnostics Card. */
+
+/*
+ *  am79c960 definitions, see /h/am79c960.h for more definitions
+ *  and /ether/am79c960_driver.c for the device driver.
+ */
+#ifdef NEEDAM79C960
+#define EMBEDDED_AM79C960
+#define EMBEDDED_AM79C960_BASE              0x360
+#define EMBEDDED_AM79C960_INT 	            9
+#define EMBEDDED_AM79C960_DMA               1
+#endif
+
+/*
+ * Allied telesis is optional.  We treat it like an optional
+ * am79c960 as far as the driver is concerned, see /h/am79c960.h
+ * for more definitions.
+ */
+#ifdef ALLIED_TELESIS_AT_1500T
+#define OPTIONAL_AM79C960		/* warning only define this once */
+#define OPTIONAL_AM79C960_BASE              0x340
+#define OPTIONAL_AM79C960_INT               12
+#define OPTIONAL_AM79C960_DMA               2
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+/****************************************************************************
+ * System Address Space                                                     *
+ ****************************************************************************/
+
+#define MINIMUM_SYSTEM_MEMORY    0x400000
+#define MAXIMUM_SYSTEM_CACHE     0x80000
+#define DMA_BUFF_BASE            0x100000
+
+#define ROMBASE 0x0
+#define ROMSIZE 0x80000
+#define ROMINC 0x4
+
+#endif /* EB64 */
+#endif /* __EB64_H_LOADED */
+
+
+
diff --git a/system/alpha/h/eb64l.h b/system/alpha/h/eb64l.h
new file mode 100644
index 000000000..c709e3c32
--- /dev/null
+++ b/system/alpha/h/eb64l.h
@@ -0,0 +1,66 @@
+#ifndef __EB64L_H_LOADED
+#define __EB64L_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb64l.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb64l.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/02/10  02:21:59  fdh
+ * Corrected AlphaPC64 banner and prompt.
+ *
+ * Revision 1.1  1994/12/08  16:42:29  fdh
+ * Initial revision
+ *
+ */
+
+#ifdef EB64L
+/*
+ * Declare special definitions for systems with only
+ * minor variations from the standard system described
+ * by this file.  To build for a variant board, declare
+ * the variant definition in addition to the standard
+ * definition.  example... -DEB64P -DEB64L
+ */
+#include "eb64p.h"
+
+#undef BANNER
+#define BANNER "AlphaPC64 Evaluation Board Debug Monitor"
+#undef PROMPT
+#define PROMPT "AlphaPC64> "
+#undef ROMSIZE
+#define ROMSIZE 0x100000
+#define NEEDFLASHMEMORY
+#define INTEL_28F008SA
+
+#endif /* EB64L */
+#endif /* __EB64L_H_LOADED */
diff --git a/system/alpha/h/eb64mem.h b/system/alpha/h/eb64mem.h
new file mode 100644
index 000000000..7debf03bb
--- /dev/null
+++ b/system/alpha/h/eb64mem.h
@@ -0,0 +1,73 @@
+#ifndef __EB64MEM_H_LOADED
+#define __EB64MEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb64mem.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb64mem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/11/22  23:47:01  fdh
+ * Don't include PALcode include files for make depend.
+ *
+ * Revision 1.3  1994/11/07  11:58:55  rusling
+ * Include system.h and lib.h in the correct order.
+ *
+ * Revision 1.2  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.1  1994/07/21  18:11:01  fdh
+ * Initial revision
+ *
+ */
+
+#ifdef EB64
+
+#include "system.h"
+#include "lib.h"
+
+#ifndef MAKEDEPEND
+#include "cserve.h"
+#include "dc21064.h"
+#endif
+
+#define SCTL_M_BCE (1<<25)
+#define BYTE_ENABLE_SHIFT 7
+#define TRANSFER_LENGTH_SHIFT 5
+#define IO	  (((ul)(-1)<<42)|((ul)1<<33))	/*    CPU Adr[33]=1 select I/O space.	*/
+#define Lng       ((ui)3<<TRANSFER_LENGTH_SHIFT)
+#define ROM(x) (IO|Lng|(((ul)(x)&0x7fffff)<<BYTE_ENABLE_SHIFT))
+
+#define _IN_SCTL     ((ReadL(ROM(0)))&0xFFFFFF00)
+#define _OUT_SCTL(d) WriteL(ROM(0),(d&0xFFFFFF00));mb();
+
+#endif /* EB64 */
+#endif /* __EB64MEM_H_LOADED */
diff --git a/system/alpha/h/eb64p.h b/system/alpha/h/eb64p.h
new file mode 100644
index 000000000..06ff71c3a
--- /dev/null
+++ b/system/alpha/h/eb64p.h
@@ -0,0 +1,265 @@
+#ifndef __EB64P_H_LOADED
+#define __EB64P_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb64p.h,v 1.1.1.1 1997/10/30 23:27:14 verghese Exp $;
+ */
+
+/*
+ * $Log: eb64p.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:14  verghese
+ * current 10/29/97
+ *
+ * Revision 1.24  1995/02/10  02:56:08  fdh
+ * Disabled bootopt command because the current SROM doesn't support it.
+ *
+ * Revision 1.23  1994/12/08  16:42:29  fdh
+ * Removed Cabriolet (EB64L) definitions. Moved to eb64l.h
+ *
+ * Revision 1.22  1994/11/17  14:15:05  fdh
+ * Modified definitions for EB64LC
+ *
+ * Revision 1.21  1994/11/08  21:36:39  fdh
+ * Added ROM definitions. Moved from rom.c
+ * Also added Flash ROM definitions to support
+ * a variant of the EB64+ design.
+ *
+ * Revision 1.20  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.19  1994/07/21  18:09:32  fdh
+ * Added MAXIMUM_SYSTEM_CACHE definition.
+ *
+ * Revision 1.18  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.17  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.16  1994/04/06  05:09:55  fdh
+ * Removed and ethernet driver.
+ *
+ * Revision 1.15  1994/04/04  15:16:18  fdh
+ * Added definition for LEDPORT.
+ *
+ * Revision 1.14  1994/04/01  13:58:13  fdh
+ * Added MINIMUM_SYSTEM_MEMORY definition and
+ * removed obsoleted PAL_IMPURE definition.
+ * Modified BANNER definition
+ *
+ * Revision 1.13  1994/03/24  21:42:37  fdh
+ * Removed unnecessary compile-time conditionals.
+ *
+ * Revision 1.12  1994/03/16  14:28:28  rusling
+ * Let WNT versions have the debug code in them.
+ *
+ * Revision 1.11  1994/03/05  22:22:20  fdh
+ * Added Apecs pass2.0 support. Use -DAPECS_PASS1to support pass 1.0.
+ *
+ * Revision 1.10  1994/01/27  20:36:23  fdh
+ * Modified the Amd79c960 definitions to accomodate Ladebug.
+ *
+ * Revision 1.9  1994/01/27  18:12:14  fdh
+ * Modify PCI Target window definitions for a
+ * 1 megabyte window at 1 megabyte mapping into 1 megabyte.
+ *
+ * Revision 1.8  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.7  1993/11/30  15:29:22  rusling
+ * Mostly complete versions.  I've integrated changes to
+ * the PCI to system address space mappings with all the
+ * definitions in the system specific include file.
+ *
+ * Revision 1.6  1993/11/23  10:43:50  rusling
+ * Added in APECS information (taking it from pci.h).
+ *
+ * Revision 1.5  1993/11/22  16:30:23  rusling
+ * Fixed up (#ifdef EB64p -> EB64P).
+ *
+ * Revision 1.4  1993/11/22  14:23:03  rusling
+ * Modified the am8=79c960 definitions.
+ *
+ * Revision 1.3  1993/11/22  13:17:55  rusling
+ * *** empty log message ***
+ *
+ * Revision 1.2  1993/11/22  12:16:20  rusling
+ * Added in further definitions
+ *
+ * Revision 1.2  1993/11/22  12:16:20  rusling
+ * Added in further definitions
+ *
+ * Revision 1.1  1993/11/22  11:43:11  rusling
+ * Initial revision
+ *
+ */
+
+#ifdef EB64P
+
+#define BANNER "DECchip 21064 PCI Evaluation Board (EB64+) Debug Monitor"
+#define PROMPT "EB64+ "
+
+/****************************************************************************
+ * Basic                                                                    *
+ ****************************************************************************/
+
+#define NEEDPCI
+#define NEEDDEBUGGER
+#define NEEDFLOPPY
+#define DISABLEBOOTOPTION   /* Current SROM does not support this */
+
+/****************************************************************************
+ * EPIC (Part of APECS) definitions                                         *
+ ****************************************************************************/
+#define EPIC_CSR                       0x000
+#define EPIC_PCI_TBASE_1               0x0C0
+#define EPIC_PCI_TBASE_2               0x0E0
+#define EPIC_PCI_BASE_1                0x100
+#define EPIC_PCI_BASE_2                0x120
+#define EPIC_PCI_MASK_1                0x140
+#define EPIC_PCI_MASK_2                0x160
+#define EPIC_HAXR0                     0x180
+#define EPIC_HAXR1                     0x1A0
+#define EPIC_HAXR2                     0x1C0
+
+#define EPIC_CSR_M_NDEV                0x800
+
+#ifdef APECS_PASS1
+#define EPIC_CSR_M_RWC                 0xFFE0
+#else
+#define EPIC_CSR_M_RWC                 0xFF60
+#endif
+
+#define EPIC_PCI_BASE_M_WENB           0x80000
+
+/****************************************************************************
+ * Plug in cards, what does it have?                                        *
+ ****************************************************************************/
+/*
+ * The Allied Telesis card is an ISA card based on the am79c960
+ * chip.
+ */
+#define ALLIED_TELESIS_AT_1500T
+
+/*
+ *  The DEC Etherworks ISA card is a LANCE like device.
+ */
+#define DEC_ETHERWORKS
+
+#define NEED21040
+
+/****************************************************************************
+ * ISA Address Space                                                        *
+ ****************************************************************************/
+
+#define RTCBASE                             0x70
+#define LEDPORT                             0x80  /* JDR Microdevices P.O.S.T. Diagnostics Card. */
+
+
+/*
+ * Allied telesis is optional.  We treat it like an optional
+ * am79c960 as far as the driver is concerned, see /h/am79c960.h
+ * for more definitions and /ether/am79c960.c for the device
+ * driver.
+ */
+#ifdef ALLIED_TELESIS_AT_1500T
+#define OPTIONAL_AM79C960		/* warning only define this once */
+#define NEEDAM79C960			/* same for this */
+#define OPTIONAL_AM79C960_BASE              0x360
+#define OPTIONAL_AM79C960_INT               9
+
+/*
+ * This parameter determines the
+ * DMA Mask for the DMA2 controller.
+ *       Mask     Channel
+ *       ----     -------
+ *        1          5
+ *        2          6
+ *        3          7
+ *        4          8
+ */
+#define OPTIONAL_AM79C960_DMA               1 /* Selects DMA Channel 5 */
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+
+/****************************************************************************
+ * System Address Space                                                     *
+ ****************************************************************************/
+
+#define MINIMUM_SYSTEM_MEMORY    0x1000000
+#define MAXIMUM_SYSTEM_CACHE     0x200000
+#define DMA_BUFF_BASE            0x100000
+
+
+/****************************************************************************
+ * PCI I/O Address Space                                                    *
+ ****************************************************************************/
+/*
+ * Definitions for the windows mapping PCI addresses into
+ * system addresses
+ *
+ * 1 megabyte window at 1 megabyte mapping into 1 megabyte.
+ */
+#define PCI_BASE_1_USED                     1
+#define PCI_BASE_1                          0x000100000
+#define PCI_MASK_1                          0x000000000
+#define PCI_TBASE_1                         0x000100000
+
+#define PCI_BASE_2_USED                     0
+#define PCI_BASE_2                          0x010000000
+#define PCI_MASK_2                          0x00FF00000
+#define PCI_TBASE_2                         0x000000000
+
+/*
+ * Each mask translates to a number of these units.  For
+ * APECS this unit is 1Kbyte.
+ */
+#define PCI_MASK_UNIT                       0x100000
+
+/*
+ * Where do we start allocating addresses from in PCI I/O space?
+ */
+#define PCI_IO_BASE                         0xB000
+
+/*
+ * ROM definitions.
+ */
+#define ROMBASE 0xFFF80000
+#define ROMSIZE 0x80000
+#define ROMINC 0x1
+
+#endif /* EB64P */
+#endif /* __EB64P_H_LOADED */
diff --git a/system/alpha/h/eb64pmem.h b/system/alpha/h/eb64pmem.h
new file mode 100644
index 000000000..892d0dbe5
--- /dev/null
+++ b/system/alpha/h/eb64pmem.h
@@ -0,0 +1,77 @@
+#ifndef __EB64PMEM_H_LOADED
+#define __EB64PMEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb64pmem.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: eb64pmem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/11/22  23:47:01  fdh
+ * Don't include PALcode include files for make depend.
+ *
+ * Revision 1.3  1994/11/07  11:59:41  rusling
+ *  Include system.h and lib.h in the correct order.
+ *
+ * Revision 1.2  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.1  1994/07/21  18:11:01  fdh
+ * Initial revision
+ *
+ */
+
+#ifdef EB64P
+
+#include "system.h"
+#include "lib.h"
+
+#ifndef MAKEDEPEND
+#include "cserve.h"
+#include "dc21064.h"
+#endif
+
+/*
+ *  Definition for the General Control Register (GCR):
+ */
+#define GCR_OFFSET 		0x00
+#define GCR_M_BCE		0x20
+
+/*
+ *  Macros used to access the memory controller
+ *  csr's.
+ */
+#define MEM_CSR(x)        (((ul)0x18<<28)|(ul)(x))
+#define _IN_MEM_CSR(p)    (ReadL(MEM_CSR(p)))
+#define _OUT_MEM_CSR(p,d) WriteL((MEM_CSR(p)),d);mb();
+
+#endif /* EB64P */
+#endif /* __EB64PMEM_H_LOADED */
diff --git a/system/alpha/h/eb66.h b/system/alpha/h/eb66.h
new file mode 100644
index 000000000..484c583c8
--- /dev/null
+++ b/system/alpha/h/eb66.h
@@ -0,0 +1,257 @@
+#ifndef __EB66_H_LOADED
+#define __EB66_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb66.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: eb66.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.21  1995/02/10  02:56:08  fdh
+ * Disabled bootopt command because the current SROM doesn't support it.
+ *
+ * Revision 1.20  1994/12/08  16:42:29  fdh
+ * Removed EB66P definitions. Moved to eb66p.h
+ *
+ * Revision 1.19  1994/11/17  14:15:30  fdh
+ * Modified definitions for EB66P
+ *
+ * Revision 1.18  1994/11/08  21:38:33  fdh
+ * Added ROM definitions. Moved from rom.c
+ * Also added Flash ROM definitions to support
+ * a variant of the EB66 design.
+ *
+ * Revision 1.17  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.16  1994/07/21  18:09:32  fdh
+ * Added MAXIMUM_SYSTEM_CACHE definition.
+ *
+ * Revision 1.15  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.14  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.13  1994/04/06  05:10:07  fdh
+ * Removed and ethernet driver.
+ *
+ * Revision 1.12  1994/04/04  15:16:29  fdh
+ * Added definition for LEDPORT.
+ *
+ * Revision 1.11  1994/04/01  13:58:53  fdh
+ * Added MINIMUM_SYSTEM_MEMORY definition and
+ * removed obsoleted PAL_IMPURE definition.
+ *
+ * Revision 1.10  1994/03/24  21:42:48  fdh
+ * Removed unnecessary compile-time conditionals.
+ *
+ * Revision 1.9  1994/03/11  02:55:24  fdh
+ * Modified the Amd79c960 definitions to accomodate Ladebug.
+ *
+ * Revision 1.8  1994/02/14  16:18:14  rusling
+ * Allow remote debug support in NT build case.
+ *
+ * Revision 1.7  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.6  1993/11/30  15:29:22  rusling
+ * Mostly complete versions.  I've integrated changes to
+ * the PCI to system address space mappings with all the
+ * definitions in the system specific include file.
+ *
+ * Revision 1.5  1993/11/23  10:43:50  rusling
+ * Added in IOC information (taken from pci.h).
+ *
+ * Revision 1.4  1993/11/22  14:23:03  rusling
+ * Modified the am8=79c960 definitions.
+ *
+ * Revision 1.3  1993/11/22  13:17:55  rusling
+ * *** empty log message ***
+ *
+ * Revision 1.2  1993/11/22  12:16:20  rusling
+ * Added in further definitions
+ *
+ * Revision 1.2  1993/11/22  12:16:20  rusling
+ * Added in further definitions
+ *
+ * Revision 1.1  1993/11/22  11:43:22  rusling
+ * Initial revision
+ *
+ */
+
+#ifdef EB66
+
+#define BANNER "DECchip 21066 Evaluation Board (EB66) Debug Monitor"
+#define PROMPT "EB66> "
+
+/****************************************************************************
+ * Basic                                                                    *
+ ****************************************************************************/
+
+#define NEEDPCI
+#define NEEDDEBUGGER
+#define NEEDFLOPPY
+#define NEED21040
+#define DISABLEBOOTOPTION   /* Current SROM does not support this */
+
+/****************************************************************************
+ * The IOC registers                                                        *
+ ****************************************************************************/
+
+/*
+ * Status Register.
+ */
+#define IOC_REG_STATUS_0           0x40
+#define IOC_STATUS_0_M_ERR         0x00000010
+                                        /* 4 = error */
+#define IOC_STATUS_0_M_CODE        0x00000700
+                                        /* 10:8 = error code */
+#define IOC_STATUS_0_ERROR_RETRY   0
+#define IOC_STATUS_0_ERROR_NODEV   1
+#define IOC_STATUS_0_ERROR_BADDATA 2
+#define IOC_STATUS_0_ERROR_ABORT   3
+#define IOC_STATUS_0_ERROR_BADADDR 4
+#define IOC_STATUS_0_ERROR_PAGERD  5
+#define IOC_STATUS_0_ERROR_BADPAGE 6
+#define IOC_STATUS_0_ERROR_DATA    7
+
+/*
+ * PCI Target Window Registers (64bits wide).
+ */
+#define IOC_W_BASE_0               0x100
+#define IOC_W_BASE_1               0x120
+#define IOC_W_MASK_0               0x140
+#define IOC_W_MASK_1               0x160
+#define IOC_W_T_BASE_0             0x180
+#define IOC_W_T_BASE_1             0x1A0
+
+#define IOC_W_BASE_M_WEN           0x0000000200000000   /* bit 33 */
+
+/****************************************************************************
+ * Plug in cards, what does it have?                                        *
+ ****************************************************************************/
+/*
+ * The Allied Telesis card is an ISA card based on the am79c960
+ * chip.
+ */
+#define ALLIED_TELESIS_AT_1500T
+
+/*
+ *  The DEC Etherworks ISA card is a LANCE like device.
+ */
+#define DEC_ETHERWORKS
+
+
+/****************************************************************************
+ * ISA Address Space                                                        *
+ ****************************************************************************/
+
+#define RTCBASE 0x70
+#define LEDPORT                             0x80  /* JDR Microdevices P.O.S.T. Diagnostics Card. */
+
+/*
+ * Allied telesis is optional.  We treat it like an optional
+ * am79c960 as far as the driver is concerned, see /h/am79c960.h
+ * for more definitions and /ether/am79c960.c for the device
+ * driver.
+ */
+#ifdef ALLIED_TELESIS_AT_1500T
+#define OPTIONAL_AM79C960		/* warning only define this once */
+#define NEEDAM79C960			/* same for this */
+#define OPTIONAL_AM79C960_BASE              0x360
+#define OPTIONAL_AM79C960_INT               9
+
+/*
+ * This parameter determines the
+ * DMA Mask for the DMA2 controller.
+ *       Mask     Channel
+ *       ----     -------
+ *        1          5
+ *        2          6
+ *        3          7
+ *        4          8
+ */
+#define OPTIONAL_AM79C960_DMA               1 /* Selects DMA Channel 5 */
+#endif
+
+#ifdef DEC_ETHERWORKS
+#define DEC_ETHERWORKS_BASE                 0x300
+#endif
+
+/****************************************************************************
+ * System Address Space                                                     *
+ ****************************************************************************/
+
+#define MINIMUM_SYSTEM_MEMORY    0x800000
+#define MAXIMUM_SYSTEM_CACHE     0x100000
+#define DMA_BUFF_BASE            0x100000
+
+
+/****************************************************************************
+ * PCI Address Space                                                        *
+ ****************************************************************************/
+/*
+ * Definitions for the windows mapping PCI addresses into
+ * system addresses.
+ *
+ * 1 megabyte window at 1 megabyte mapping into 1 megabyte.
+ */
+#define PCI_BASE_1_USED                     1
+#define PCI_BASE_1                          0x00100000
+#define PCI_MASK_1                          0x00000000
+#define PCI_TBASE_1                         0x00100000
+
+#define PCI_BASE_2_USED                     0
+#define PCI_BASE_2                          0x00000000
+#define PCI_MASK_2                          0x00000000
+#define PCI_TBASE_2                         0x00000000
+
+/*
+ * Each mask translates to a number of these units.  For
+ * 21066 this unit is 1Mbyte.
+ */
+#define PCI_MASK_UNIT                       0x100000
+
+/*
+ * Where do we start allocating addresses from in PCI I/O space?
+ */
+#define PCI_IO_BASE		            0xB000
+
+/*
+ * ROM definitions.
+ */
+#define ROMBASE 0xFFF80000
+#define ROMSIZE 0x80000
+#define ROMINC 0x1
+
+#endif /* EB66 */
+#endif /* __EB66_H_LOADED */
diff --git a/system/alpha/h/eb66mem.h b/system/alpha/h/eb66mem.h
new file mode 100644
index 000000000..133dce0ab
--- /dev/null
+++ b/system/alpha/h/eb66mem.h
@@ -0,0 +1,75 @@
+#ifndef __EB66MEM_H_LOADED
+#define __EB66MEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb66mem.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: eb66mem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.1  1994/07/21  18:11:01  fdh
+ * Initial revision
+ *
+ */
+
+#ifdef EB66
+
+#include "system.h"
+#include "prtrace.h"
+#include "lib.h"
+
+/*
+ *  Definition for the Cache Register (CAR):
+ */
+#define CAR_OFFSET 		0x78
+#define CAR_M_BCE		0x1
+
+/*
+ *  Macros used to access the memory controller
+ *  csr's.
+ */
+#define MEM_CSR(x)        (((ul)0x12<<28)|(ul)(x))
+#define _IN_MEM_CSR(p)    (ReadQ(MEM_CSR(p)))
+#define _OUT_MEM_CSR(p,d) WriteQ((MEM_CSR(p)),d);mb();
+
+#define BANKSIZE_MAX 128
+#define BANKSIZE_MIN 8
+#define _max(a,b) (a>b ? a : b)
+#define _min(a,b) (a>b ? b : a)
+#define NONCACHEABLE (0x2<<28)
+#define PATTERN (ui) 0x5A5A5A5A
+#define MEM_RW1C 0x1686
+
+#endif /* EB66 */
+#endif /* __EB66MEM_H_LOADED */
diff --git a/system/alpha/h/eb66p.h b/system/alpha/h/eb66p.h
new file mode 100644
index 000000000..bb84a99d4
--- /dev/null
+++ b/system/alpha/h/eb66p.h
@@ -0,0 +1,66 @@
+#ifndef __EB66P_H_LOADED
+#define __EB66P_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: eb66p.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: eb66p.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/02/10  02:22:26  fdh
+ * corrected EB66+ banner.
+ *
+ * Revision 1.1  1994/12/08  16:42:29  fdh
+ * Initial revision
+ *
+ */
+
+#ifdef EB66P
+/*
+ * Declare special definitions for systems with only
+ * minor variations from the standard system described
+ * by this file.  To build for a variant board, declare
+ * the variant definition in addition to the standard
+ * definition.  example... -DEB66 -DEB66P
+ */
+#include "eb66.h"
+
+#undef BANNER
+#define BANNER "Alpha 21066A Evaluation Board (EB66+) Debug Monitor"
+#undef PROMPT
+#define PROMPT "EB66+ "
+#undef ROMSIZE
+#define ROMSIZE 0x100000
+#define NEEDFLASHMEMORY
+#define INTEL_28F008SA
+
+#endif /* EB66P */
+#endif /* __EB66P_H_LOADED */
diff --git a/system/alpha/h/edevice.h b/system/alpha/h/edevice.h
new file mode 100644
index 000000000..d1162b7b8
--- /dev/null
+++ b/system/alpha/h/edevice.h
@@ -0,0 +1,249 @@
+#ifndef __ETHER_DEVICE_H_LOADED
+#define __ETHER_DEVICE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: edevice.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Ethernet device interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: edevice.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.7  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.6  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.5  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.4  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.3  1993/11/22  13:17:13  rusling
+ * Merged with PCI/21040 changes.
+ *
+ * Revision 1.2  1993/10/01  16:05:27  berent
+ * Added module initialisation function
+ *
+ * Revision 1.1  1993/08/06  10:30:01  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/* ether_device_init - initialises an ethernet device
+ *
+ * Arguments:
+ *
+ *    device_no    - device number
+ *
+ * Returned value
+ *    TRUE         - initialised succesfully
+ *    FALSE        - error on initialisation
+ */
+extern int ether_device_init(int device_no);
+
+/* ether_device_read - reads a frame from an ethernet device
+ *
+ * Arguments:
+ *
+ *    device_no      - device number
+ *    balance_buffer - spare buffer to maintain buffer balance
+ *    frame_buffer   - returned buffer containing frame
+ *
+ * Returned value:
+ *
+ *    positive     - size of frame read; frame copied into buffer if <= size.
+ *       0         - nothing to read
+ *    negative     - error on read
+ *
+ * DESCRIPTION:
+ *    This function reads a frame from the device if there is one ready to be read. The
+ *    frame read is returned in frame_buffer.  To maintain the driver's pool of buffers
+ *    the caller must give the driver an unused buffer (balance_buffer) before the
+ *    driver returns the frame.  Once this function has been called balance_buffer must
+ *    not be used by the calling software.
+ *
+ *    On return frame_buffer will always point to a valid buffer.  If the read has failed
+ *    (result <= 0) the contents of this buffer will not be valid.  Note that whether or
+ *    not the read succeeds it is undefined whether the same buffer will be returned as
+ *    frame_buffer as was passed down as balance_buffer.
+ */
+extern int ether_device_read(int device_no,
+                             unsigned char balance_buffer[ETHER_BUFFER_SIZE],
+                             unsigned char ** frame_buffer);
+
+/* ether_device_write - queue a frame to be sent on an ethernet device
+ *
+ * Arguments:
+ *
+ *    device_no         - device number
+ *    frame_buffer      - buffer containing frame
+ *    frame             - the frame itself
+ *    size              - size of frame
+ *    balance_buffer    - returned buffer to maintain buffer balance
+ *
+ * Returned value:
+ *
+ *    TRUE -  succefully queued for sending
+ *    FALSE - unable to send
+ *
+ * DESCRIPTION:
+ *    This function writes a frame to the device  To maintain the caller's pool of buffers
+ *    the driver must give the caller an unused buffer (balance_buffer) in return for
+ *    the buffer containing the frame to be transmitted.
+ *
+ *    If the send succeeds then frame_buffer must not be accessed by the caller after this
+ *    call.  If the send can't be queued then frame_buffer will remain valid and
+ *    the returned value of balance_buffer is undefined and must not be used.
+ *
+ */
+extern int ether_device_write(int device_no,
+                              unsigned char * frame,
+                              int size,
+                              unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                              unsigned char ** balance_buffer);
+
+/* ether_device_flush - wait for all writes on an ethernet device to complete
+ *
+ * Argument:
+ *
+ *    device_no - device to be flushed
+ */
+extern int ether_device_flush(int device_no);
+
+/* ether_device_print_stats - print device statistics
+ *
+ * Argument:
+ *
+ *     device_no - device number
+ */
+extern void ether_device_print_stats(int device_no);
+
+/* ether_device_preg - print device registers
+ *
+ * Argument:
+ *
+ *     device_no - device number
+ */
+extern void ether_device_preg(int device_no);
+
+
+/* ether_device_clear_interrupts - clear all interrupts from an ethernet device
+ *
+ * Argument:
+ *
+ *     device_no - device number, -1 means all devices
+ */
+extern void ether_device_clear_interrupts(int device_no);
+
+/* ether_device_get_hw_address - gets the hardware mac address of the device
+ *
+ * Arguments:
+ *
+ *     device_no - device_number
+ *     hw_address - returned hardware address
+ */
+extern void ether_device_get_hw_address(int device_no, mac_addr hw_address);
+
+/* ether_device_next - get the next valid device number
+ *
+ * Argument:
+ *
+ *    previous_device_number - previous device number; or -1 if no previous device.
+ *
+ * Result:
+ *
+ *    next valid device number or -1 if no more devices.
+ *
+ * Description:
+ *    The purpose of this function it to allow the device table to be scanned.
+ *    If it called initially with -1 and then repeatedly called with its previous
+ *    return value as its argument it will return each valid device number
+ *    precisely once before returning -1.
+ *
+ * Notes:
+ *    1) The device numbers will not neccesary be returned in assending order
+ *    2) If previous_device_number is not the number of a valid device (or -1) the
+ *        result is undefined.
+ */
+extern int ether_device_number(int previous_device_number);
+
+/* ether_device_register - register a new ethernet device
+ *
+ * Arguments:
+ *     device_no              - device_number
+ *     init_func              - initialisation function
+ *     read_func              - read function
+ *     write_func             - write function
+ *     flush_func             - flush function
+ *     stats_func             - print statistics function
+ *     preg_func              - print device registers function
+ *     clear_interrupts_func  - clear interrupts function
+ *     hw_addr_func           - get hardware address function
+ *     description            - description of the device.
+ */
+extern void ether_device_register(int device_no,
+                                  int (* init_func)(int device_no),
+                                  int (* read_func)(int device_no,
+                                                    unsigned char balance_buffer[ETHER_BUFFER_SIZE],
+                                                    unsigned char ** frame_buffer),
+                                  int (* write_func)(int device_no,
+                                                     unsigned char * frame,
+                                                     int size,
+                                                     unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                                                     unsigned char ** balance_buffer),
+                                   int (* flush_func)(int device_no),
+                                  void (* stats_func)(int device_no),
+                                  void (* preg_func)(int device_no),
+                                  void (* clear_interrupts_func)(int device_no),
+                                  void (* hw_addr_func)(int device_no, mac_addr hw_address) ,
+                                  char *description
+                                  );
+
+/* ether_device_init_module - initialise or reinitialise the ether_device module
+ */
+extern void ether_device_init_module(void);
+
+extern void ether_device_show();
+
+#endif /* __ETHER_DEVICE_H_LOADED */
diff --git a/system/alpha/h/ether.h b/system/alpha/h/ether.h
new file mode 100644
index 000000000..b9103ff68
--- /dev/null
+++ b/system/alpha/h/ether.h
@@ -0,0 +1,96 @@
+#ifndef __ETHER_H_LOADED
+#define __ETHER_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ether.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: ether.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1994/06/20  12:54:45  fdh
+ * Initial revision
+ *
+ */
+
+#include "address.h"
+#include "arp.h"
+#include "base.h"
+#include "bootp.h"
+#include "buffer.h"
+#include "edevice.h"
+#include "ethernet.h"
+#include "ip.h"
+#include "isa_buff.h"
+#include "net_buff.h"
+#include "netman.h"
+#include "tftp.h"
+#include "udp.h"
+#include "am79c960.h"
+#include "DEC21040.h"
+
+
+/* /ether/arp.c */
+extern void arp_show();
+
+/* /ether/edevice.c */
+extern void ether_device_show();
+extern void ether_device_clear_interrupts(int device_no);
+extern int ethernet_process_one_packet(int device_no , ub input_buffer[1600] , ub * * output_buffer);
+
+/* /ether/tftp.c */
+extern void tftp_init_module(void);
+
+/* /ether/bootp.c */
+extern void bootp_init_module(void);
+
+/* ladbx/server_init_module */
+extern void ladbx_server_init_module(void);
+
+/* /ether/ethernet.c */
+extern int ethernet_process_one_packet(int, ub *, ub **);
+
+/* /ether/eaddr.c */
+extern void get_eaddr(void);
+extern int ethernet_address(ui argc , ub * s);
+
+/* /ether/netboot.c */
+extern int netboot(int argc , char * file);
+
+#endif /* __ETHER_H_LOADED */
diff --git a/system/alpha/h/ethernet.h b/system/alpha/h/ethernet.h
new file mode 100644
index 000000000..e8c72af07
--- /dev/null
+++ b/system/alpha/h/ethernet.h
@@ -0,0 +1,218 @@
+#ifndef __ETHERNET_H_LOADED
+#define __ETHERNET_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: ethernet.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Ethernet protocol interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: ethernet.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.6  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.5  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.4  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.3  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.2  1993/10/01  16:05:45  berent
+ * made interface to ethernet_init public
+ *
+ * Revision 1.1  1993/08/06  10:30:23  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/*
+ * Prototype for packet processing functions
+ *
+ * Arguments to packet processing functions:
+ *     protocol_data - protocol data passed to module when protocol registered
+ *     device_no     - device on which packet was received;
+ *     packet        - packet, with ethernet header removed;
+ *     size          - size of packet;
+ *     source        - source MAC address of packet;
+ *     frame_buffer  - original buffer containing packet.
+ *     balance_buffer- buffer returned to maintain buffer balance buffer.
+ *
+ * DESCRIPTION:
+ *     The packet processing functions process a received protocol packet. To avoid
+ *     buffer shortages they are always passed the buffer containing the packet in
+ *     frame_buffer.  They must return either this buffer, or another buffer, in
+ *     balance buffer. The ethernet module will never access frame_buffer after
+ *     calling a packet processing function; and the protocol modules must not
+ *     access the returned balance_buffer after returning from this function.
+ *
+ */
+typedef void (* ethernet_packet_handler)(void * protocol_data,
+                                int device_no,
+                                unsigned char * packet,
+                                int size,
+                                mac_addr source,
+                                unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                                unsigned char ** balance_buffer);
+
+/* ethernet_register_protocol - registers an ethernet protocol to be recognised in received frames by this module
+ *
+ * Arguments:
+ *
+ *    device_no             - device on which the protocol is to be registered
+ *    protocol_id           - protocol id to be recognised by this module
+ *    processing_function   - function to process received packets; if NULL cancels registration of protocol.
+ *    protocol_data         - arbitrary data to be passed back when a packet is received
+ *
+ * Returned value:
+ *    TRUE   - protocol registered
+ *    FALSE  - unable to register protocol
+ */
+extern int ethernet_register_protocol(int device_no,
+                                      ethernet_protocol_id protocol_id,
+                                      ethernet_packet_handler processing_function,
+                                      void * protocol_data);
+
+/* ethernet_process_one_packet - reads and processes one packet from the ethernet
+ *
+ * Arguments:
+ *
+ *    device_no - device to poll, -1 means poll all devices
+ *    input_buffer - free buffer usable by the ethernet module
+ *    output_buffer - returned free buffer that may be used by the caller.
+ *
+ * Return value:
+ *    TRUE - packet received and processed
+ *    FALSE - nothing to receive.
+ *
+ * DESCRIPTION:
+ *    This function checks whether there are any packets available to be processed on
+ *    the ethernet device. If there are it reads and processes one packet. The caller
+ *    must give it a buffer to work with (input_buffer) and will be returned a, possibly
+ *    different, buffer (output_buffer) Note that this returned buffer does not contain the
+ *    received packet, or any other meaningfull data; it is returned simply to ensure that caller
+ *    does not run short of buffers.  By calling this function the caller gives up ownership
+ *    of input_buffer. The caller must not access input_buffer after calling this function.
+ *
+ */
+extern int ethernet_process_one_packet(int device_no,
+                                       unsigned char input_buffer[ETHER_BUFFER_SIZE],
+                                       unsigned char ** output_buffer );
+
+/* ethernet_input - processes the packet passed to it as an ethernet frame
+ *
+ * Arguments:
+ *
+ *    device_no - device on which frame was received
+ *    frame - the frame to be processed
+ *    size - size of frame
+ *    input_buffer - the buffer containing the frame
+ *    balance_buffer - returned free buffer that may be used by the caller.
+ *
+ */
+extern void ethernet_input(int device_no,
+                           unsigned char * frame,
+                           int size,
+                           unsigned char input_buffer[ETHER_BUFFER_SIZE],
+                           unsigned char ** balance_buffer );
+
+/* ethernet_write - sends a packet on an ethernet
+ *
+ * Arguments:
+ *
+ *    device_no - device on which to send the packet
+ *    packet    - pointer to data packet to be sent
+ *    destination - destination address for packet
+ *    protocol_id - protocol id for packet
+ *    size        - size of packet
+ *    frame_buffer - buffer containing packet
+ *    balance_buffer - buffer returned to maintain buffer balance
+ *
+ * Return values:
+ *
+ *    TRUE  - send successfull
+ *    FALSE - Error occured
+ *
+ * DESCRIPTION:
+ *    This function writes an ethernet data packet to the device  To maintain the caller's
+ *    pool of buffers the driver must give the caller an unused buffer (balance_buffer)
+ *    in return for the buffer containing the frame to be transmitted.
+ *
+ *    If the send succeeds then frame_buffer must not be accessed by the caller after this
+ *    call.  If the send can't be queued then frame_buffer will remain valid and
+ *    the returned value of balance_buffer is undefined and must not be used.
+ *
+ */
+extern int ethernet_write(int device_no,
+                          unsigned char * packet,
+                          mac_addr destination,
+                          ethernet_protocol_id protocol_id,
+                          int size,
+                          unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                          unsigned char ** balance_buffer);
+
+
+/* ethernet_data_offset - returns the offset of the data in an ethernet frame
+ *
+ * Return value:
+ *    Offset.
+ */
+extern int ethernet_data_offset(void);
+
+/* ethernet_printpacket - print the contents of an ethernet frame
+ *
+ * Arguments:
+ *    p          - the frame
+ *    frame_size - its size
+ */
+extern void ethernet_printpacket(unsigned char *p, int frame_size);
+
+/* ethernet_printaddress - utility to print an ethernet address
+ *
+ * Argument:
+ *    address - MAC address to be printed
+ */
+extern void ethernet_printaddress(mac_addr address);
+
+#endif /* __ETHERNET_H_LOADED */
diff --git a/system/alpha/h/ev4.h b/system/alpha/h/ev4.h
new file mode 100644
index 000000000..afe5d2ec0
--- /dev/null
+++ b/system/alpha/h/ev4.h
@@ -0,0 +1,704 @@
+#ifndef	__EV4_H_LOADED
+#define	__EV4_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ev4.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: ev4.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:13  fdh
+ * Initial revision
+ *
+ */
+
+
+
+/*
+**++
+*****************************************************************************
+**									    *
+**  Copyright (c) 1992, 1993						    *
+**  by Digital Equipment Corporation, Maynard, Ma.			    *
+** 									    *
+**  This software is furnished under a license and may be used and  copied  *
+**  only  in  accordance  with  the  terms  of  such  license and with the  *
+**  inclusion of the above copyright notice.  This software or  any  other  *
+**  copies  thereof may not be provided or otherwise made available to any  *
+**  other person.  No title to and ownership of  the  software  is  hereby  *
+**  transferred.							    *
+** 									    *
+**  The information in this software is subject to change  without  notice  *
+**  and  should  not  be  construed  as  a commitment by Digital Equipment  *
+**  Corporation.							    *
+** 									    *
+**  Digital assumes no responsibility for the use or  reliability  of  its  *
+**  software on equipment which is not supplied by Digital.		    *
+**									    *
+*****************************************************************************
+**
+**  FACILITY:
+**
+**	ev4.h
+**
+**  MODULE DESCRIPTION:
+**
+**      DECchip 21064 (EV4) specific definitions
+**
+**  CREATION DATE:  29-Oct-1992
+**
+**  DESIGN ISSUES:
+**
+**      {@tbs@}
+**
+**  [@optional module tags@]...
+**
+**  MODIFICATION HISTORY:
+**
+**      Who	When		What
+**	-----	-----------	---------------------------------------------
+**      ES	10-Feb-1993	Need physical load lock and store conditional
+**	ER	05-Feb-1993	Add HWPCB offset definitions.
+**	ES	12-Jan-1993	Some HIRR additions
+**	ES	04-Jan-1993	Changed names of BIU_STAT bits
+**	ES	16-Dec-1992	Added BIU_STAT and SL_CLR definitions.
+**	ER	10-Dec-1992	Added xtbAsm to invalidate all ITB & DTB
+**				entries with ASM=0.
+**	ER	03-Dec-1992	Added definitions for architecturally reserved
+**				opcodes.
+**	ER	16-Nov-1992	Changed BIU$M_INIT definition.
+**	ER	12-Nov-1992	Added FPR definitions.
+**	ER	09-Nov-1992	Added GPR and BIU$M_INIT definitions.
+**	ES	09-Nov-1992	Added privileged and unprivileged CALL_PAL
+**				entry points.
+**	ER	02-Nov-1992	Added MMCSR$M_FAULT bit mask.
+**	ER	30-Oct-1992	Added xtbZap to invalidate all ITB & DTB
+**				entries.
+**
+**--
+*/
+
+/*
+**
+**  INTERNAL PROCESSOR REGISTER DEFINITIONS
+**
+*/
+
+#define IPR$V_PAL	7
+#define IPR$M_PAL	0x80
+#define IPR$V_ABX	6
+#define IPR$M_ABX	0x40
+#define IPR$V_IBX	5
+#define IPR$M_IBX	0x20
+#define IPR$V_INDEX	0
+#define IPR$M_INDEX	0x1F
+
+/*
+**
+**  Ibox IPR Definitions
+**
+*/
+
+#define tbTag		IPR$M_IBX + 0x0
+#define itbPte		IPR$M_IBX + 0x1
+#define iccsr		IPR$M_IBX + 0x2
+#define itbPteTemp	IPR$M_IBX + 0x3
+#define excAddr		IPR$M_IBX + 0x4
+#define slRcv		IPR$M_IBX + 0x5
+#define itbZap		IPR$M_IBX + 0x6
+#define itbAsm		IPR$M_IBX + 0x7
+#define itbIs		IPR$M_IBX + 0x8
+#define ps		IPR$M_IBX + 0x9
+#define excSum		IPR$M_IBX + 0xA
+#define palBase		IPR$M_IBX + 0xB
+#define hirr		IPR$M_IBX + 0xC
+#define sirr		IPR$M_IBX + 0xD
+#define astrr		IPR$M_IBX + 0xE
+#define hier		IPR$M_IBX + 0x10
+#define sier		IPR$M_IBX + 0x11
+#define aster		IPR$M_IBX + 0x12
+#define slClr		IPR$M_IBX + 0x13
+#define slXmit		IPR$M_IBX + 0x16
+
+/*
+**
+**  Instruction Cache Control and Status Register (ICCSR) Bit Summary
+**
+**	  Loc	Size	Name	Function
+**	 -----	----	----	---------------------------------
+**	  <42>	  1	FPE	Floating Point Enable
+**	  <41>	  1	MAP	I-stream superpage mapping enable
+**	  <40>	  1	HWE	Allow PALRES to be issued in kernel mode
+**	  <39>	  1	DI	Dual Issue enable
+**	  <38>	  1	BHE	Branch History Enable
+**	  <37>	  1	JSE	JSR Stack Enable
+**	  <36>	  1	BPE	Branch Prediction Enable
+**	  <35>	  1	PIPE	Pipeline enable
+**
+*/
+
+#define ICCSR$V_FPE	    42
+#define ICCSR$M_FPE	    0x0400
+#define ICCSR$V_MAP	    41
+#define ICCSR$M_MAP	    0x0200
+#define ICCSR$V_HWE	    40
+#define ICCSR$M_HWE	    0x0100
+#define ICCSR$V_DI	    39
+#define ICCSR$M_DI	    0x0080
+#define ICCSR$V_BHE	    38
+#define ICCSR$M_BHE	    0x0040
+#define ICCSR$V_JSE	    37
+#define ICCSR$M_JSE	    0x0020
+#define ICCSR$V_BPE	    36
+#define ICCSR$M_BPE	    0x0010
+#define ICCSR$V_PIPE	    35
+#define ICCSR$M_PIPE	    0x0008
+
+/*
+**  We may want to move the ICCSR$M_INIT definition to another module
+**  that contains user configurable options.
+*/
+#define ICCSR$M_INIT	    (ICCSR$M_FPE | ICCSR$M_MAP | ICCSR$M_DI  | \
+                             ICCSR$M_BHE | ICCSR$M_JSE | ICCSR$M_BPE | \
+                             ICCSR$M_PIPE)
+/*
+**
+**  Exception Summary Register (EXC_SUM) Bit Summary
+**
+**	 Loc	Size	Name	Function
+**	-----	----	----	------------------------------------
+**	 <33>	 1	MSK	Exception Register Write Mask window
+**	  <8>	 1	IOV	Integer overflow
+**	  <7>	 1	INE	Inexact result
+**	  <6>	 1	UNF	Underflow
+**	  <5>	 1	OVF	Overflow
+**	  <4>	 1	DZE	Division by zero
+**	  <3>	 1	INV	Invalid operation
+**	  <2>	 1	SWC	Software completion
+**
+*/
+
+#define EXC$V_MSK	33
+#define EXC$M_MSK	0x0002
+#define EXC$V_IOV	8
+#define EXC$M_IOV	0x0100
+#define EXC$V_INE	7
+#define EXC$M_INE	0x0080
+#define EXC$V_UNF	6
+#define EXC$M_UNF	0x0040
+#define EXC$V_OVF	5
+#define EXC$M_OVF	0x0020
+#define EXC$V_DZE	4
+#define	EXC$M_DZE	0x0010
+#define EXC$V_INV	3
+#define EXC$M_INV	0x0008
+#define	EXC$V_SWC	2
+#define EXC$M_SWC	0x0004
+
+/*
+**
+**  Hardware Interrupt Request Register (HIRR) Bit Summary
+**
+**	  Loc	Size	Name	Function
+**	 -----	----	----	---------------------------------
+**	  <13>	  1	SLR	Serial Line interrupt
+**	   <9>	  1	PC0	Performance Counter 0 interrupt
+**	   <8>	  1	PC1	Performance Counter 1 interrupt
+**	   <4>	  1	CRR	Correctable read data interrupt
+**	   <3>	  1	ATR	AST interrupt
+**	   <2>	  1	SWR	Software interrupt
+**	   <1>	  1	HWR	Hardware interrupt
+**
+**/
+
+#define HIRR$V_SLR	13
+#define HIRR$M_SLR	0x2000
+#define HIRR$V_PC0	9
+#define HIRR$M_PC0	0x0200
+#define HIRR$V_PC1	8
+#define HIRR$M_PC1	0x0100
+#define HIRR$V_CRR	4
+#define HIRR$M_CRR	0x0010
+#define HIRR$V_ATR	3
+#define HIRR$M_ATR	0x0008
+#define HIRR$V_SWR	2
+#define HIRR$M_SWR	0x0004
+#define HIRR$V_HWR	1
+#define HIRR$M_HWR	0x0002
+
+#define HIRR$V_IRQ0	10
+#define HIRR$V_IRQ1	11
+#define HIRR$V_IRQ2	12
+#define HIRR$V_IRQ3	5
+#define HIRR$V_IRQ4	6
+#define HIRR$V_IRQ5	7
+
+/*
+**
+**  Hardware Interrupt Enable Register (HIER) Write Bit Summary
+**
+**	  Loc	Size	Name	Function
+**	 -----	----	----	---------------------------------
+**	  <32>	  1	SLE	Serial Line interrupt enable
+**	  <15>	  1	PC1	Performance Counter 1 interrupt enable
+**	<14:9>	  6	HIER	Interrupt enables for Irq_h<5:0>
+**	   <8>	  1	PC0	Performance Counter 0 interrupt enable
+**	   <2>	  1	CRE	Correctable read data interrupt enable
+**
+**/
+
+#define HIERW$V_SLE	32
+#define HIERW$V_PC1	15
+#define HIERW$V_PC0	8
+#define HIERW$V_CRE	2
+
+/*
+**
+**  Clear Serial Line Interrupt Register (SL_CLR) Bit Summary
+**
+**	  Loc	Size	Name	    Function
+**	 -----	----	----	    ---------------------------------
+**	   <32>	  1	SLC	    W0C -- Clear serial line int request
+**	   <15>	  1	PC1	    W0C -- Clear PC1 interrupt request
+**	    <8>	  1	PC0	    W0C -- Clear PC0 interrupt request
+**	    <2>	  1	CRD	    W0C -- Clear CRD interrupt request
+**
+*/
+
+#define SL_CLR$V_SLC	    32
+#define SL_CLR$V_PC1	    15
+#define SL_CLR$V_PC0	    8
+#define SL_CLR$V_CRD	    2
+
+/*
+**
+**  Abox IPR Definitions
+**
+*/
+
+#define dtbCtl		IPR$M_ABX + 0x0
+#define tbCtl		IPR$M_ABX + 0x0
+#define dtbPte		IPR$M_ABX + 0x2
+#define dtbPteTemp	IPR$M_ABX + 0x3
+#define mmcsr		IPR$M_ABX + 0x4
+#define va		IPR$M_ABX + 0x5
+#define dtbZap		IPR$M_ABX + 0x6
+#define dtbAsm		IPR$M_ABX + 0x7
+#define dtbIs		IPR$M_ABX + 0x8
+#define biuAddr		IPR$M_ABX + 0x9
+#define biuStat		IPR$M_ABX + 0xA
+#define dcAddr		IPR$M_ABX + 0xB
+#define dcStat		IPR$M_ABX + 0xC
+#define fillAddr	IPR$M_ABX + 0xD
+#define aboxCtl		IPR$M_ABX + 0xE
+#define altMode		IPR$M_ABX + 0xF
+#define cc		IPR$M_ABX + 0x10
+#define ccCtl		IPR$M_ABX + 0x11
+#define biuCtl		IPR$M_ABX + 0x12
+#define fillSyndrome	IPR$M_ABX + 0x13
+#define bcTag		IPR$M_ABX + 0x14
+#define flushIc		IPR$M_ABX + 0x15
+#define flushIcAsm	IPR$M_ABX + 0x17
+#define xtbZap		IPR$M_ABX + IPR$M_IBX + 0x6
+#define xtbAsm		IPR$M_ABX + IPR$M_IBX + 0x7
+
+/*
+**
+**  Memory Management Control and Status Register (MM_CSR) Bit Summary
+**
+**	  Loc	Size	Name	Function
+**	 -----	----	----	---------------------------------
+**	<14:9>	  6	OPC	Opcode of faulting instruction
+**	 <8:4>	  5	RA	Ra field of faulting instruction
+**	   <3>	  1	FOW	Fault on write
+**	   <2>	  1	FOR	Fault on read
+**	   <1>	  1	ACV	Access violation
+**	   <0>	  1	WR	Faulting reference is a write
+**
+*/
+
+#define	MMCSR$V_OPC	9
+#define MMCSR$M_OPC	0x7E00
+#define MMCSR$V_RA	4
+#define MMCSR$M_RA	0x01F0
+#define MMCSR$V_FOW	3
+#define MMCSR$M_FOW	0x0008
+#define MMCSR$V_FOR	2
+#define MMCSR$M_FOR	0x0004
+#define MMCSR$V_ACV	1
+#define MMCSR$M_ACV	0x0002
+#define MMCSR$V_WR	0
+#define MMCSR$M_WR	0x0001
+
+#define MMCSR$M_FAULT	0x000E
+
+/*
+**
+** Abox Control Register (ABOX_CTL) Bit Summary
+**
+**	  Loc	Size	Name	    Function
+**	 -----	----	----	    ---------------------------------
+**	  <11>	  1	DC_FHIT	    Dcache Force Hit
+**	  <10>	  1	DC_ENA	    Dcache Enable
+**	   <6>	  1	EMD_EN	    Limited big endian support enable
+**	   <5>	  1	SPE_2	    D-stream superpage 1 enable
+**	   <4>	  1	SPE_1	    D-stream superpage 2 enable
+**	   <3>	  1	IC_SBUF_EN  Icache Stream Buffer Enable
+**	   <2>	  1	CRD_EN	    Corrected Read Data Enable
+**	   <1>	  1	MCHK_EN	    Machine Check Enable
+**	   <0>	  1	WB_DIS	    Write Buffer unload Disable
+**
+*/
+
+#define ABOX$V_DC_FHIT	    11
+#define ABOX$M_DC_FHIT	    0x0800
+#define ABOX$V_DC_ENA	    10
+#define	ABOX$M_DC_ENA	    0x0400
+#define ABOX$V_EMD_EN	    6
+#define ABOX$M_EMD_EN	    0x0040
+#define ABOX$V_SPE_2	    5
+#define ABOX$M_SPE_2	    0x0020
+#define ABOX$V_SPE_1	    4
+#define ABOX$M_SPE_1	    0x0010
+#define ABOX$V_IC_SBUF_EN   3
+#define ABOX$M_IC_SBUF_EN   0x0008
+#define ABOX$V_CRD_EN	    2
+#define ABOX$M_CRD_EN	    0x0004
+#define ABOX$V_MCHK_EN	    1
+#define ABOX$M_MCHK_EN	    0x0002
+#define ABOX$V_WB_DIS	    0
+#define	ABOX$M_WB_DIS	    0x0001
+
+/*
+**  We may want to move the ABOX$M_INIT definition to another module
+**  that contains user configurable options.
+*/
+#define	ABOX$M_INIT	    (ABOX$M_DC_ENA | ABOX$M_SPE_2 | ABOX$M_IC_SBUF_EN)
+
+/*
+**
+**  Bus Interface Unit Control Register (BIU_CTL) Bit Summary
+**
+**	  Loc	Size	Name	    Function
+**	 -----	----	----	    ---------------------------------
+**	   <36>	  1	BAD_DP	    Force bad data parity/ECC check bits
+**	<35:32>	  4	BC_PA_DIS   Don't cache PA quadrant specified
+**	   <31>	  1	BAD_TCP	    Force bad tag parity
+**	<30:28>	  3	BC_SIZE	    External cache size
+**	<27:13>	 16	BC_WE_CTL   External cache write enable control
+**	 <11:8>	  4	BC_WR_SPD   External cache write speed
+**	  <7:4>	  4	BC_RD_SPD   External cache read speed
+**	    <3>	  1	BC_FHIT	    External cache force hit
+**	    <2>	  1	OE	    Output enable
+**	    <1>	  1	ECC	    Enable ECC
+**	    <0>	  1	BC_ENA	    External cache enable
+**
+*/
+
+#define	BIU$V_BAD_DP	    36
+#define BIU$M_BAD_DP	    0x0010
+#define BIU$V_BC_PA_DIS	    32
+#define BIU$M_BC_PA_DIS	    0x000F
+#define BIU$V_BAD_TCP	    31
+#define BIU$M_BAD_TCP	    0x8000
+#define BIU$V_BC_SIZE	    28
+#define BIU$M_BC_SIZE	    0x7000
+#define BIU$V_BC_WE_CTL	    13
+#define BIU$M_BC_WE_CTL	    0xFFFE
+#define BIU$V_BC_WR_SPD	    8
+#define BIU$M_BC_WR_SPD	    0x0F00
+#define BIU$V_BC_RD_SPD	    4
+#define BIU$M_BC_RD_SPD	    0x00F0
+#define BIU$V_BC_FHIT	    3
+#define BIU$M_BC_FHIT	    0x0008
+#define BIU$V_OE	    2
+#define BIU$M_OE	    0x0004
+#define BIU$V_ECC	    1
+#define BIU$M_ECC	    0x0002
+#define BIU$V_BC_ENA	    0
+#define BIU$M_BC_ENA	    0x0001
+
+/*
+**  We may want to move the BIU$M_INIT definition to another module
+**  that contains user configurable options.
+*/
+#define	BIU$M_INIT	    BIU$M_OE
+
+/*
+**
+**  Bus Interface Unit Status Register (BIU_STAT) Bit Summary
+**
+**	  Loc	Size	Name	    Function
+**	 -----	----	----	    ---------------------------------
+**	   <14>	  1	FILL_SEO    Second error while FILL_ECC or FILL_DPERR
+**	<13:12>	  2	FILL_QW	    Used with FILL_ADDR for physical address
+**	   <11>	  1	FILL_IRD    Icache fill when FILL_ECC or FILL_DPERR
+**	   <10>	  1	FILL_DPERR  Fill parity error or double bit ECC
+**	    <9>	  1	FILL_CRD    Corrected read data
+**	    <8>	  1	FILL_ECC    ECC error
+**	    <7>	  1	BIU_SEO	    Second error while BIU or BC error
+**	  <6:4>	  3	BIU_CMD	    Cycle type
+**	    <3>	  1	BC_TCPERR   Tag control parity error on external cache
+**	    <2>	  1	BC_TPERR    Tag address parity error on external cache
+**	    <1>	  1	BIU_SERR    cAck_h pins indicate SOFT_ERROR
+**	    <0>	  1	BIU_HERR    cAck_h pins indicate HARD_ERROR
+**
+*/
+
+#define BIU_STAT$V_FILL_SEO	14
+#define BIU_STAT$M_FILL_SEO	0x4000
+#define BIU_STAT$V_FILL_CRD	9
+#define BIU_STAT$M_FILL_CRD	0x0200
+#define	BIU_STAT$V_FILL_ECC	8
+#define BIU_STAT$M_FILL_ECC	0x0100
+#define BIU_STAT$V_BC_TCPERR	3
+#define BIU_STAT$M_BC_TCPERR	0x0008
+#define BIU_STAT$V_BC_TPERR	2
+#define BIU_STAT$M_BC_TPERR	0x0004
+#define BIU_STAT$V_BIU_SERR	1
+#define BIU_STAT$M_BIU_SERR	0x0002
+#define BIU_STAT$V_BIU_HERR	0
+#define BIU_STAT$M_BIU_HERR	0x0001
+
+/*
+**
+**  General Register Definitions
+**
+*/
+
+#define	r0		$0
+#define r1		$1
+#define r2		$2
+#define r3		$3
+#define r4		$4
+#define r5		$5
+#define r6		$6
+#define r7		$7
+#define r8		$8
+#define r9		$9
+#define r10		$10
+#define r11		$11
+#define r12		$12
+#define r13		$13
+#define r14		$14
+#define	r15		$15
+#define	r16		$16
+#define	r17		$17
+#define	r18		$18
+#define	r19		$19
+#define	r20		$20
+#define	r21		$21
+#define r22		$22
+#define r23		$23
+#define r24		$24
+#define r25		$25
+#define r26		$26
+#define r27		$27
+#define r28		$28
+#define r29		$29
+#define r30		$30
+#define r31		$31
+
+/*
+**
+**  Floating Point Register Definitions
+**
+*/
+
+#define f0		$f0
+#define f1		$f1
+#define f2		$f2
+#define f3		$f3
+#define f4		$f4
+#define f5		$f5
+#define f6		$f6
+#define f7		$f7
+#define f8		$f8
+#define f9		$f9
+#define f10		$f10
+#define f11		$f11
+#define f12		$f12
+#define f13		$f13
+#define f14		$f14
+#define f15		$f15
+#define f16		$f16
+#define f17		$f17
+#define f18		$f18
+#define f19		$f19
+#define f20		$f20
+#define f21		$f21
+#define f22		$f22
+#define f23		$f23
+#define f24		$f24
+#define f25		$f25
+#define f26		$f26
+#define f27		$f27
+#define f28		$f28
+#define f29		$f29
+#define f30		$f30
+#define f31		$f31
+
+/*
+**
+**  PAL Temporary Register Definitions
+**
+*/
+
+#define	pt0		IPR$M_PAL + 0x0
+#define	pt1		IPR$M_PAL + 0x1
+#define	pt2		IPR$M_PAL + 0x2
+#define	pt3		IPR$M_PAL + 0x3
+#define	pt4		IPR$M_PAL + 0x4
+#define	pt5		IPR$M_PAL + 0x5
+#define	pt6		IPR$M_PAL + 0x6
+#define	pt7		IPR$M_PAL + 0x7
+#define	pt8		IPR$M_PAL + 0x8
+#define	pt9		IPR$M_PAL + 0x9
+#define	pt10		IPR$M_PAL + 0xA
+#define	pt11		IPR$M_PAL + 0xB
+#define	pt12		IPR$M_PAL + 0xC
+#define	pt13		IPR$M_PAL + 0xD
+#define	pt14		IPR$M_PAL + 0XE
+#define	pt15		IPR$M_PAL + 0xF
+#define	pt16		IPR$M_PAL + 0x10
+#define	pt17		IPR$M_PAL + 0x11
+#define	pt18		IPR$M_PAL + 0x12
+#define	pt19		IPR$M_PAL + 0x13
+#define	pt20		IPR$M_PAL + 0x14
+#define	pt21		IPR$M_PAL + 0x15
+#define	pt22		IPR$M_PAL + 0x16
+#define	pt23		IPR$M_PAL + 0x17
+#define	pt24		IPR$M_PAL + 0x18
+#define	pt25		IPR$M_PAL + 0x19
+#define	pt26		IPR$M_PAL + 0x1A
+#define	pt27		IPR$M_PAL + 0x1B
+#define	pt28		IPR$M_PAL + 0x1C
+#define	pt29		IPR$M_PAL + 0x1D
+#define	pt30		IPR$M_PAL + 0x1E
+#define	pt31		IPR$M_PAL + 0x1F
+
+/*
+**
+**  DECchip 21064 Privileged Architecture Library Entry Points
+**
+**	Entry Name	    Offset (Hex)	Length (Instructions)
+**
+**	RESET		     0000		    8
+**	MCHK		     0020		   16
+**	ARITH		     0060		   32
+**	INTERRUPT	     00E0		   64
+**	D_FAULT		     01E0		  128
+**	ITB_MISS	     03E0		  256
+**	ITB_ACV		     07E0		   64
+**	DTB_MISS (Native)    08E0		   64
+**	DTB_MISS (PAL)	     09E0		  512
+**	UNALIGN		     11E0		  128
+**	OPCDEC		     13E0		  256
+**	FEN		     17E0		  520
+**	CALL_PAL	     2000
+**
+*/
+
+#define PAL$RESET_ENTRY		    0x0000
+#define PAL$MCHK_ENTRY		    0x0020
+#define PAL$ARITH_ENTRY		    0x0060
+#define PAL$INTERRUPT_ENTRY	    0x00E0
+#define PAL$D_FAULT_ENTRY	    0x01E0
+#define PAL$ITB_MISS_ENTRY	    0x03E0
+#define PAL$ITB_ACV_ENTRY	    0x07E0
+#define PAL$NDTB_MISS_ENTRY	    0x08E0
+#define PAL$PDTB_MISS_ENTRY	    0x09E0
+#define PAL$UNALIGN_ENTRY	    0x11E0
+#define PAL$OPCDEC_ENTRY	    0x13E0
+#define PAL$FEN_ENTRY		    0x17E0
+#define PAL$CALL_PAL_PRIV_ENTRY	    0x2000
+#define PAL$CALL_PAL_UNPRIV_ENTRY   0x3000
+
+/*
+**
+**  DECchip 21064 Parameters
+**
+*/
+
+#define	CACHE_SIZE		8192
+#define	CACHE_BLOCK_SIZE	32
+
+/*
+**
+** Architecturally Reserved Opcode Definitions
+**
+*/
+#define	mtpr	    hw_mtpr
+#define	mfpr	    hw_mfpr
+
+#define	ldl_a	    hw_ldl/a
+#define ldq_a	    hw_ldq/a
+#define stq_a	    hw_stq/a
+#define stl_a	    hw_stl/a
+
+#define ldl_p	    hw_ldl/p
+#define ldq_p	    hw_ldq/p
+#define stl_p	    hw_stl/p
+#define stq_p	    hw_stq/p
+
+/*
+** This set defines the physical versions of load locked and store conditional
+*/
+#define ldl_pa	    hw_ldl/pa
+#define ldq_pa	    hw_ldq/pa
+#define stl_pa	    hw_stl/pa
+#define stq_pa	    hw_stq/pa
+
+/*
+**
+** Hardware Privileged Process Context Block (HWPCB) offsets
+**
+*/
+
+#define	HWPCB$Q_KSP		0x00
+#define HWPCB$Q_ESP		0x08
+#define HWPCB$Q_SSP		0x10
+#define HWPCB$Q_USP		0x18
+#define HWPCB$Q_PTBR		0x20
+#define HWPCB$Q_ASN		0x28
+#define HWPCB$Q_AST		0x30
+#define HWPCB$Q_FEN		0x38
+#define HWPCB$Q_PCC		0x40
+#define HWPCB$Q_UNIQUE		0x48
+#define HWPCB$Q_IMPURE		0x50
+
+#endif				    /* __EV4_H_LOADED */
diff --git a/system/alpha/h/fat.h b/system/alpha/h/fat.h
new file mode 100644
index 000000000..0c5df519d
--- /dev/null
+++ b/system/alpha/h/fat.h
@@ -0,0 +1,88 @@
+#ifndef __FAT_H_LOADED
+#define __FAT_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: fat.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: fat.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.1  1993/06/08  19:56:13  fdh
+ * Initial revision
+ *
+ */
+
+
+
+#define BOOT_SECTOR 0
+#define FAT 12
+#define FILES 20
+#define DATA 100
+#define BINTYPE 0
+#define FATTYPE 1
+#define DIRTYPE 2
+#define EXERTYPE 3
+struct _fat {
+  ub jmp[3];
+  ub oem[8];
+  ub bps[2];
+  ub spc[1];
+  ub rs[2];
+  ub numfat[1];
+  ub numdir[2];
+  ub totsec[2];
+  ub medsc[1];
+  ub spf[2];
+  ub spt[2];
+  ub nhead[2];
+};
+
+struct _file {
+  ub fname[8];
+  ub ext[3];
+  ub attrib[1];
+  ub reserv[10];
+  ub time[2];
+  ub date[2];
+  ub cluster[2];
+  ub fsize[4];
+};
+
+#endif /* __FAT_H_LOADED */
diff --git a/system/alpha/h/flash.h b/system/alpha/h/flash.h
new file mode 100644
index 000000000..b34838557
--- /dev/null
+++ b/system/alpha/h/flash.h
@@ -0,0 +1,101 @@
+#ifndef __FLASH_H_LOADED
+#define __FLASH_H_LOADED
+
+/*****************************************************************************
+
+Copyright © 1994, Digital Equipment Corporation, Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+#define FLASH_H_RCSID "$Id: flash.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $"
+
+/*
+ * Defines constants and macros for controlling the flash memory device.
+ *
+ * $Log: flash.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/02/02  21:42:06  cruz
+ * Changed prototype for two flash functions.
+ *
+ * Revision 1.1  1994/11/08  21:40:02  fdh
+ * Initial revision
+ *
+ *
+ */
+
+#define FLASH_BYTE 1
+#define FLASH_WORD 2
+#define FLASH_LONG 4
+#define FLASH_QUAD 8
+
+#if (defined INTEL_28F008SA || defined INTEL_28F004BX_T)
+/* Flash commands */
+#define	READ_RESET	0xff
+#define IID		0x90
+#define READ_STATUS	0x70
+#define CLEAR_STATUS	0x50
+#define ERASE_SETUP	0x20
+#define ERASE_CONFIRM	0xd0
+#define ERASE_SUSPEND	0xB0
+#define BYTE_WRITE	0x40
+#define	ALT_WR_SET_WR	0x10
+
+/* Status bits */
+#define	SR_READY	(1 << 7)
+#define SR_ERASE_SUSP	(1 << 6)
+#define SR_ERASE_ERR	(1 << 5)
+#define SR_WRITE_ERR	(1 << 4)
+#define SR_VPP_LOW	(1 << 3)
+#define SR_CMD_SEQ_ERR	(SR_WRITE_ERR | SR_ERASE_ERR)
+#endif
+
+#ifdef INTEL_28F008SA
+#define BX_T_M_CODE	0x89
+#define BX_T_D_CODE	0xA2
+#define DEVICE_NAME	"Intel 28F008SA"
+
+#define NUMSEGS		16
+#define SEGSIZE		(64 * 1024)
+#endif /* INTEL_28F008SA */
+
+#ifdef INTEL_28F004BX_T
+#define BX_T_M_CODE	0x89
+#define BX_T_D_CODE	0x78
+#define DEVICE_NAME	"Intel 28F004BX-T"
+
+#define NUMSEGS		4
+#define SEGSIZE		(128 * 1024)
+#endif /* INTEL_28F004BX_T */
+
+/* prototypes */
+static ui inflash(ui size , ui offset);
+static void outflash(ui size , ui offset , ui d);
+static int flash_present(void);
+static int flash_write_segs (ui segstart, ui segcnt, ui total_size, unsigned char *buf);
+static int read_status(void);
+static int flash_decode(int status);
+static int flash_erase(ui segnum);
+static int flash_program (ui offset, ui size, unsigned char *buf);
+static int clear_status(void);
+
+#endif /* __FLASH_H_LOADED */
diff --git a/system/alpha/h/floppy.h b/system/alpha/h/floppy.h
new file mode 100644
index 000000000..4c3ac023c
--- /dev/null
+++ b/system/alpha/h/floppy.h
@@ -0,0 +1,171 @@
+#ifndef __FLOPPY_H_LOADED
+#define __FLOPPY_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: floppy.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: floppy.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/22  15:22:35  rusling
+ * Fixed up minor OSF build problem.  Changed fdacmd()
+ * definition.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.1  1993/06/08  19:56:13  fdh
+ * Initial revision
+ *
+ */
+
+
+
+#define	TRUE	1
+#define	FALSE	0
+#define REALFLOPPY 1
+
+/* pic */
+#define	PICBOCW	0x20
+#define	PICBIRR	0x20
+#define	READIRR	0x0A
+#define	FDAMASK	0x40
+
+/* dma */
+#define DMACMD03 0x08
+#define DMACMD47 0xD0
+#define DMAMODE03 0x0B
+#define DMAMODE47 0xD6
+#define DMAXMODE03 0x40B
+#define DMAXMODE47 0x4D6
+#define	DMAOFFS	0x04
+#define	DMALPAG	0x81
+#define DMAHPAG 0x481
+#define	DMACNT	0x05
+#define	DMAHCNT	0x405
+#define	DMACBP	0x0C
+#define DMAMASK03 0x0A
+#define DMAMASK47 0xD4
+
+/* fda */
+#define	FDADCR	0x03F2
+#define	FDAMSR	0x03F4
+#define	FDADR	0x03F5
+#define	FDADRR	0x03F7
+#define	FDADCB	0x03F7
+
+/* dcr */
+#define	DCRSELA	0x00
+#define	DCRSELB	0x01
+#define	DCRSELC	0x02
+#define	DCRSELD	0x03
+#define	DCRNRES	0x04
+#define	DCRENAB	0x08
+#define	DCRMTRA	0x10
+#define	DCRMTRB	0x20
+#define	DCRMTRC	0x40
+#define	DCRMTRD	0x80
+
+/* msr */
+#define	MSRDIO	0x40
+#define	MSRRQM	0x80
+
+/* drr */
+#define	DRR500	0x00
+#define	DRR250	0x02
+
+/* dcb */
+#define	DCBNCHG	0x80
+
+/* st0 */
+#define	ST0IC	0xC0
+#define	ST0NT	0x00
+#define	ST0NR	0x08
+
+/* st1 */
+#define	ST1NW	0x02
+
+/* cmd */
+#define	NREAD	0x66
+#define	NWRITE	0x45
+#define	NRECAL	0x07
+#define	NSEEK	0x0F
+#define	NSINTS	0x08
+#define	NSPEC	0x03
+
+#define	FDTOMEM	0
+#define	MEMTOFD	1
+
+#define	NCMD	9
+#define	NSTS	7
+
+#define	UNITNUM	0
+#define	UNITSEL	(DCRSELA)
+#define	UNITMTR	(DCRMTRA)
+
+#define	lSRT	0xE0			/* 4 mS				*/
+#define	lHUT	0x08			/* 256 mS			*/
+
+#define	hSRT	0xC0			/* 4 mS				*/
+#define	hHUT	0x0F			/* 256 mS			*/
+
+#define	HLT	0x02			/* 4 mS				*/
+#define	ND	0x00			/* Use DMA			*/
+
+int	fdactrk;
+
+static void read_sector(int sec , int loc);
+static int get_file_info(char * file2load , int flag);
+static void prep_filename(ub * fn , ub * nfn , ub * ext);
+static int get_boot_info(void );
+static void load_file(void );
+static int get_sec(int gcluster);
+static int get_next_cluster(ui gcluster , ui ifat);
+static void fdainit(int rate);
+static void fdaspinup(void );
+static void fdaspindown(void );
+static int fdaio(char * buf , int sec , int type);
+static void fdacmd(unsigned char cmd[] , int ncmd);
+static int fdasts(void );
+static void fdawait(void );
+static void fdasleep(int nmsec);
+static void init_pic(void );
+
+#define fdREAD  0		               /* read command */
+#define fdWRITE 1			       /* write command */
+
+#endif /* __FLOPPY_H_LOADED */
diff --git a/system/alpha/h/fregs.h b/system/alpha/h/fregs.h
new file mode 100644
index 000000000..a829301df
--- /dev/null
+++ b/system/alpha/h/fregs.h
@@ -0,0 +1,80 @@
+#ifndef __FREGS_H_LOADED
+#define __FREGS_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: fregs.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $;
+ */
+
+/*
+ * $Log: fregs.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1994/11/24  04:21:32  fdh
+ * Initial revision
+ *
+ */
+
+/*======================================================================*/
+/*                 FLOATING POINT REGISTER DEFINITIONS			*/
+/*======================================================================*/
+
+#define	f0		$f0
+#define f1		$f1
+#define f2		$f2
+#define f3		$f3
+#define f4		$f4
+#define f5		$f5
+#define f6		$f6
+#define f7		$f7
+#define f8		$f8
+#define f9		$f9
+#define f10		$f10
+#define f11		$f11
+#define f12		$f12
+#define f13		$f13
+#define f14		$f14
+#define	f15		$f15
+#define	f16		$f16
+#define	f17		$f17
+#define	f18		$f18
+#define	f19		$f19
+#define	f20		$f20
+#define	f21		$f21
+#define f22		$f22
+#define f23		$f23
+#define f24		$f24
+#define f25		$f25
+#define f26		$f26
+#define f27		$f27
+#define f28		$f28
+#define f29		$f29
+#define f30		$f30
+#define f31		$f31
+
+#endif /* __FREGS_H_LOADED */
diff --git a/system/alpha/h/ip.h b/system/alpha/h/ip.h
new file mode 100644
index 000000000..c4ccc5de3
--- /dev/null
+++ b/system/alpha/h/ip.h
@@ -0,0 +1,192 @@
+#ifndef __IP_H_LOADED
+#define __IP_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: ip.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     IP protocol interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: ip.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.1  1993/08/06  10:30:54  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/* ip_init - initialise ip protocol for an ethernet device
+ *
+ * Argument:
+ *    device_no - device for which IP is to be initialised.
+ */
+extern void ip_init(int device_no);
+
+/* ip_set_device_addr - tells ip a device's ip address.
+ *
+ * Arguments:
+ *     device_no - device number
+ *     ip        - ip address
+ */
+extern void ip_set_device_addr(int device_no,ip_addr ip);
+
+/*
+ * Prototype for packet processing functions
+ *
+ * Arguments to packet processing functions:
+ *     protocol_data - protocol data passed to module when protocol registered
+ *     device_no     - device on which packet was received;
+ *     packet        - packet, with IP header removed;
+ *     size          - size of packet;
+ *     source        - source IP address of packet;
+ *     destination   - IP address to which the packet was addressed; this is needed by UDP.
+ *     frame_buffer  - original buffer containing packet.
+ *     balance_buffer- buffer returned to maintain buffer balance.
+ *
+ * DESCRIPTION:
+ *     The packet processing functions process a received protocol packet. To avoid
+ *     buffer shortages they are always passed the buffer containing the packet in
+ *     frame_buffer.  They must return either this buffer, or another buffer, in
+ *     balance buffer. The ip module will never access frame_buffer after
+ *     calling a packet processing function; and the protocol modules must not
+ *     access the returned balance_buffer after returning from this function.
+ *
+ */
+typedef void (* ip_packet_handler)(void * protocol_data,
+                                   int device_no,
+                                   unsigned char * packet,
+                                   int size,
+                                   ip_addr source,
+                                   ip_addr destination,
+                                   unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                                   unsigned char ** balance_buffer);
+
+/* ip_register_protocol - registers an IP protocol to be recognised in received frames by this module
+ *
+ * Arguments:
+ *
+ *    device_no             - device number on which this protocol can be received
+ *    protocol_id           - protocol id to be recognised by this module
+ *    processing_function   - function to process received packets; if NULL cancels registration of protocol.
+ *    protocol_data         - arbitrary data to be passed back when a packet is received
+ *
+ * Returned value:
+ *    TRUE   - protocol registered
+ *    FALSE  - unable to register protocol
+ */
+extern int ip_register_protocol(int device_no,
+                                ip_protocol_id protocol_id,
+                                ip_packet_handler processing_function,
+                                void * protocol_data);
+
+/* ip_write - sends a packet on an IP network
+ *
+ * Arguments:
+ *
+ *    device_no - device on which to send the packet
+ *    packet    - pointer to data packet to be sent
+ *    destination - destination address for packet
+ *    protocol_id - protocol id for packet
+ *    size        - size of packet
+ *    frame_buffer - buffer containing packet
+ *    balance_buffer - buffer returned to maintain buffer balance
+ *
+ * Return values:
+ *
+ *    TRUE  - send successfull
+ *    FALSE - Error occured
+ *
+ * DESCRIPTION:
+ *    This function writes an ip data packet to the device  To maintain the caller's
+ *    pool of buffers the driver must give the caller an unused buffer (balance_buffer)
+ *    in return for the buffer containing the frame to be transmitted.
+ *
+ *    If the send succeeds then frame_buffer must not be accessed by the caller after this
+ *    call.  If the send can't be queued then frame_buffer will remain valid and
+ *    the returned value of balance_buffer is undefined and must not be used.
+ *
+ */
+extern int ip_write(int device_no,
+                    unsigned char * packet,
+                    ip_addr destination,
+                    ip_protocol_id protocol_id,
+                    int size,
+                    unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                    unsigned char ** balance_buffer);
+
+
+/* ip_data_offset - returns the offset at which ip data should be placed in a new ethernet frame
+ *
+ * Return value:
+ *    Offset.
+ */
+extern int ip_data_offset(void);
+
+/* ip_get_address - gets the address that will be used as the source address of transmitted packets.
+ *
+ * Arguments:
+ *     device_no - device number of device on which packet is to be sent.
+ *     ip        - returned ip address
+ *
+ * Note:
+ *     This function exists so that UDP can calculate header checksums.
+ */
+extern void ip_get_device_address(int device_no, ip_addr ip);
+
+/* ip_printaddress - utility to print an ethernet address
+ *
+ * Argument:
+ *    address - IP address to be printed
+ */
+extern void ip_printaddress(mac_addr address);
+
+#endif /* __IP_H_LOADED */
diff --git a/system/alpha/h/isa_buff.h b/system/alpha/h/isa_buff.h
new file mode 100644
index 000000000..8ea648ac5
--- /dev/null
+++ b/system/alpha/h/isa_buff.h
@@ -0,0 +1,72 @@
+#ifndef __ISA_BUFFER_H_LOADED
+#define __ISA_BUFFER_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: isa_buff.h,v 1.1.1.1 1997/10/30 23:27:15 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Buffer allocator for ISA DMA buffers. Note that this buffer allocator
+ *     does not allow buffers to be freed.
+ *
+ * HISTORY:
+ *
+ * $Log: isa_buff.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:15  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/08/06  10:31:10  berent
+ * Initial revision
+ *
+ *
+ */
+
+
+/* isa_buffer_init_module - initialise the module
+ */
+extern void isa_buffer_init_module(void);
+
+/* isa_buffer_alloc - allocate a region of memory accessable by ISA DMA devices
+ *
+ * Argument:
+ *    size - number of bytes to allocate
+ *
+ * Result:
+ *    Pointer to start of buffer
+ */
+extern void * isa_buffer_alloc(int size);
+
+#endif /* __ISA_BUFFER_H_LOADED */
diff --git a/system/alpha/h/k_extra.h b/system/alpha/h/k_extra.h
new file mode 100644
index 000000000..2b1c40070
--- /dev/null
+++ b/system/alpha/h/k_extra.h
@@ -0,0 +1,89 @@
+#ifndef __KERNEL_EXTRA_H_LOADED
+#define __KERNEL_EXTRA_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: k_extra.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: k_extra.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1994/03/09  12:48:33  berent
+ * Initial revision
+ *
+ *
+ * Derived from old kernel.h by splitting out the extra functions that are not part of
+ * the target independent debug kernel interface.
+ *
+ * Log of kernel.h,v:
+ * Revision 1.3  1993/10/03  00:19:49  berent
+ * Merge in development by Anthony Berent
+ *
+ *>> Revision 1.4  1993/10/01  15:47:00  berent
+ *>> Added saved_user_pc; used to avoid need for special ethernet PAL code
+ *>>
+ *>> Revision 1.3  1993/08/09  11:43:38  berent
+ *>> Correct return types of some functions
+ *
+ * Revision 1.2  1993/06/08  22:32:06  berent
+ * Changed to improve ladbx server communications
+ *
+ * Revision 1.1  1993/06/08  19:56:36  fdh
+ * Initial revision
+ *
+ */
+
+#include "system.h"
+#include "server_t.h"
+
+void kinitpalentry(void);
+
+void kstart(void);
+
+int kwait(void);
+
+void kinstall_breakpoints(void);
+
+void kprint_breakpoints(void);
+
+void kenableserver(void);
+
+extern address_value saved_user_pc;
+
+#endif /* KERNEL_EXTRA_H_LOADED */
diff --git a/system/alpha/h/kbdscan.h b/system/alpha/h/kbdscan.h
new file mode 100644
index 000000000..5e364f448
--- /dev/null
+++ b/system/alpha/h/kbdscan.h
@@ -0,0 +1,86 @@
+#ifndef __KBDSCAN_H_LOADED
+#define __KBDSCAN_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: kbdscan.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: kbdscan.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:14  fdh
+ * Initial revision
+ *
+ */
+
+
+
+
+/* Some Key Defs */
+/* Function keys */
+#define	F1		(0x80|0x00)
+#define	F2		(0x80|0x01)
+#define	F3		(0x80|0x02)
+#define	F4		(0x80|0x03)
+#define	F5		(0x80|0x04)
+#define	F6		(0x80|0x05)
+#define	F7		(0x80|0x06)
+#define	F8		(0x80|0x07)
+#define	F9		(0x80|0x08)
+#define	F10		(0x80|0x09)
+#define	F11		(0x80|0x0a)
+#define	F12		(0x80|0x0b)
+
+/* Num lock affects these */
+#define	END		(0x80|0x0c)
+#define	DOWN		(0x80|0x0d)
+#define	PGDWN		(0x80|0x0e)
+#define	LEFT		(0x80|0x0f)
+#define	MIDDLE		(0x80|0x10)
+#define	RIGHT		(0x80|0x11)
+#define	HOME		(0x80|0x12)
+#define	UP		(0x80|0x13)
+#define	PGUP		(0x80|0x14)
+#define	INS		(0x80|0x15)
+#define	DEL		(0x80|0x16)
+
+/* Others */
+#define	PRTSC		(0x80|0x17)
+#define	PAUSE		(0x80|0x18)
+#define	ALTDWN		(0x80|0x19)
+#define	ALTUP		(0x80|0x1a)
+
+#endif /* __KBDSCAN_H_LOADED */
diff --git a/system/alpha/h/kernel.h b/system/alpha/h/kernel.h
new file mode 100644
index 000000000..1fd6f0101
--- /dev/null
+++ b/system/alpha/h/kernel.h
@@ -0,0 +1,278 @@
+#ifndef __KERNEL_H_LOADED
+#define __KERNEL_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: kernel.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * Derived from EB64 version; history of EB64 version:
+ *
+ * $Log: kernel.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.7  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.6  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.5  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.4  1994/03/09  12:48:33  berent
+ * Made NT compilable and tidied up
+ *
+ * Revision 1.4  1993/10/01  15:47:00  berent
+ * Added saved_user_pc; used to avoid need for special ethernet PAL code
+ *
+ * Revision 1.3  1993/08/09  11:43:38  berent
+ * Correct return types of some functions
+ *
+ * Revision 1.2  1993/06/08  22:32:06  berent
+ * Changed to improve ladbx server communications
+ *
+ * Revision 1.1  1993/06/08  19:56:36  fdh
+ * Initial revision
+ *
+ */
+
+#include "system.h"
+#include "server_t.h"
+
+
+/* kload_implemented - check whether the kernel will load new processes.
+ *
+ * Returns TRUE if this kernel supports the loading of new processes,
+ * FALSE if not.
+ */
+extern kload_implemented(void);
+
+/* kload - load a new process.
+ *
+ * Arguments:
+ *   name - file name of new process.
+ *   argv - argument array for new process, NULL terminated.
+ *   standardIn - file name of standard input.
+ *   standardOut - file name of standard output.
+ *   standardError - file name of standard error.
+ *   loadAddress - address at which client expects process to be loaded; or
+ *                 all bits 1 if unknown.
+ *   startAddress - address at which client expects process to start executing.
+ *                  ignored if the load address is not set.
+ *
+ *   The format and interpretation of file name arguments is kernel dependent except
+ *   in that an empty string always means use the default (if any).  The
+ *   standard input, standard output and standard error file names may be ignored by
+ *   some kernels.  Kernels will only use the load and start addresses if they have
+ *   direct control over where programs are loaded or started.
+ *
+ * Return Value:
+ *   TRUE if successful, FALSE if not.
+ */
+extern int kload(char * name,
+          char * argv[],
+          char * standardIn,
+          char * standardOut,
+          char * standardError,
+          address_value loadAddress,
+          address_value startAddress);
+
+/* kconnect_implemented - check whether the kernel will connect to existing processes.
+ *
+ * Returns TRUE if this kernel supports connecting to existing  processes,
+ * FALSE if not.
+ */
+
+extern int kconnect_implemented(void);
+
+/* kconnect - connect to an existing process
+ *
+ * Argument:
+ *    pid - process id of process to which the kernel is to be connected. The interpretation
+ *          of this value is kernel dependent.  It may be ignored by kernels running
+ *          in a non multiprocessing environment.
+ *
+ * Return Value:
+ *   TRUE if successful, FALSE if not.
+ */
+extern int kconnect(ui pid);
+
+/* kkill_possible - checks whether this kernel can kill the current process.
+ *
+ * Return Value:
+ *    TRUE if possible; false if not.
+ */
+extern int kkill_possible(void);
+
+/* kkill - kill the current process.
+ */
+extern void kkill(void);
+
+/* kdetach_possible - checks whether this kernel can detach from the current process
+ *                    without killing it.
+ *
+ * Return Value:
+ *    TRUE if possible; false if not.
+ */
+extern int kdetach_possible(void);
+
+/* kdetach - detach from the current process without killing it. If possible the kernel will
+ *           not remove any breakpoints or continue the process if it is stopped ; but
+ *           there may be kernels on which detaching can only be implemented such that
+ *           it does one or both of these.
+ */
+extern void kdetach(void);
+
+/* kpid - return the pid of the current process.
+ */
+extern ui kpid(void);
+
+/* kgo - run the current process until it hits a breakpoint or stops for some
+ *       other reason.
+ */
+extern void kgo(void);
+
+/* kstop - stop the current process as soon as possible.
+ */
+extern void kstop(void);
+
+/* kaddressok - check whether an address is readable
+ *
+ * Argument:
+ *    address - the address to be checked.
+ *
+ * Return value:
+ *    TRUE if readable, FALSE if not.
+ */
+extern int kaddressok(address_value address);
+
+/* kcexamine - get a value from memory.
+ *
+ * Argument:
+ *    address - the address from which the value is to be fetched. Must be
+ *              8 byte alligned.
+ *
+ * Return value:
+ *    The 8 byte value at address.  If there is a breakpoint within this 8 byte
+ *    region the value returned is the value that would be at that address if the
+ *    breakpoint were removed.
+ */
+extern ul kcexamine(address_value address);
+
+
+/* kcdeposit - deposit a value in memory.
+ *
+ * Arguments:
+ *    address - the address at which the value is to be deposited. Must be
+ *              8 byte alligned.
+ *    value   - the 8 byte value to be deposited.  If there is a breakpoint within
+ *              the 8 byte region the new value should not overwrite any breakpoint
+ *              instruction; but instead should change the value that will be written
+ *              back when any such instruction is removed.
+ *
+ * Return value:
+ *    TRUE if successful. FALSE if the kernel was unable to deposit the data.
+ */
+extern int kcdeposit(address_value address, ul value);
+
+/* kstep - step one instruction.  If there is a breakpoint at the current program counter
+ *          the instruction that would be at that address if the breakpoint were removed is
+ *          executed.
+ */
+extern void kstep(void);
+
+/* kpc - get the current program counter.
+ *
+ * Return value:
+ *    current program counter.
+ */
+extern address_value kpc(void);
+
+/* ksetpc - update the program counter.
+ *
+ * Argument:
+ *    address - new value of program counter.
+ */
+extern void ksetpc(address_value address);
+
+/* kregister - get the contents of a register
+ *
+ * Argument:
+ *    reg - the register number. If reg is in the range 0 to 31 the function fetches the
+ *          contents of fixed point register reg.  If reg is the range 32 to 63 it
+ *          fetches (as an 8 byte bit pattern) the contents of floating point register
+ *          reg-32.
+ *
+ * Return value:
+ *    The 8 byte bit pattern in the selected register.
+ */
+extern register_value kregister(int reg);
+
+/* ksetreg - writes a bit pattern to a register
+ *
+ * Arguments:
+ *     reg - the register number, as for kregister.
+ *     value - the 8 byte bit pattern to be written.
+ */
+extern void ksetreg(int reg, register_value value);
+
+/* kbreak - sets a breakpoint.
+ *
+ * Argument:
+ *     address - the address at which a breakpoint is to be set. Must be 4 byte alligned.
+ *
+ * Return value:
+ *     The result that should be sent back to the client.
+ */
+extern short int kbreak(address_value address);
+
+/* kremovebreak - sets a breakpoint.
+ *
+ * Argument:
+ *     address - the address of the breakpoint. Must be 4 byte alligned.
+ *
+ * Return value:
+ *     The result that should be sent back to the client.
+ */
+extern short int kremovebreak(address_value address);
+
+/* kpoll - get the state of the current process.
+ *
+ * Return value:
+ *     PROCESS_STATE_PROCESS_RUNNING  - the process is running,
+ *     PROCESS_STATE_PROCESS_AT_BREAK - the process has stopped at a breakpoint,
+ *     PROCESS_STATE_PROCESS_SUSPENDED - the process has stopped elsewhere,
+ *     PROCESS_STATE_PROCESS_TERMINATED - the process no longer exists,
+ *     PROCESS_STATE_PROCESS_LOADING - the process is loading,
+ *     PROCESS_STATE_LOAD_FAILED - the process failed to load.
+ */
+extern int kpoll(void);
+
+#endif /* __KERNEL_H_LOADED */
diff --git a/system/alpha/h/ladbx.h b/system/alpha/h/ladbx.h
new file mode 100644
index 000000000..6375aed9d
--- /dev/null
+++ b/system/alpha/h/ladbx.h
@@ -0,0 +1,74 @@
+#ifndef __LADBX_H_LOADED
+#define __LADBX_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ladbx.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: ladbx.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/30  09:39:18  berent
+ * Added   kwrmces to write the machine check error summary register
+ *
+ * Revision 1.3  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1994/06/20  12:54:55  fdh
+ * Initial revision
+ *
+ */
+
+#include "ladbxapp.h"
+#include "kernel.h"
+#include "k_extra.h"
+#include "bptable.h"
+
+/* /ladbx/kutil.s */
+extern void kutilib(void);
+extern void kwrmces(ul);
+
+/* /ladbx/readloop.c */
+extern void enable_ladbx_msg(void);
+
+/* /ladbx/kernel.c */
+extern void kinitpalentry(void);
+extern void kenableserver(void);
+extern void kprint_breakpoints(void);
+extern void kgo(void);
+extern void kstep(void);
+
+#endif /* __LADBX_H_LOADED */
diff --git a/system/alpha/h/ladbxapp.h b/system/alpha/h/ladbxapp.h
new file mode 100644
index 000000000..ca942382c
--- /dev/null
+++ b/system/alpha/h/ladbxapp.h
@@ -0,0 +1,56 @@
+#ifndef __LADBX_APP_INTERFACE_H_LOADED
+#define __LADBX_APP_INTERFACE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ladbxapp.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * This module provides the interface between the ladebug server and the
+ * application.
+ *
+ * $Log: ladbxapp.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/10/01  15:49:15  berent
+ * Initial revision
+ *
+ */
+
+/* The following address is known to both the application and the monitor.
+ * If it changes both must be rebuilt */
+#define POLL_DBM_PTR_ADDR (0x3ff0)
+
+#endif /* __LADBX_APP_INTERFACE_H_LOADED */
diff --git a/system/alpha/h/ledcodes.h b/system/alpha/h/ledcodes.h
new file mode 100644
index 000000000..e4bc58242
--- /dev/null
+++ b/system/alpha/h/ledcodes.h
@@ -0,0 +1,62 @@
+#ifndef __LEDCODES_H_LOADED
+#define __LEDCODES_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ledcodes.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: ledcodes.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1994/11/28  19:39:44  fdh
+ * Added Startup LED codes.
+ *
+ * Revision 1.1  1994/11/08  21:42:29  fdh
+ * Initial revision
+ *
+ */
+
+#define led_k_ksp_initialized   0xFF    /* Kernel Stack Pointer Initialized */
+#define led_k_sysdata_inited    0xFE    /* System Data Structure Initialized */
+#define led_k_init_IO           0xFD    /* About to complete IO bus initialization */
+#define led_k_IO_inited         0xFC    /* IO bus initialization complete */
+#define led_k_uart_inited       0xFB    /* UARTs initialized */
+
+/*
+ * Flash ROM Utility LED codes.
+ */
+#define led_k_flash_entered	0xB0	/* Flash Utility Entered */
+#define led_k_flash_found	0xB2	/* A FLASH ROM was found. */
+#define led_k_erase_flash	0xB3	/* About to erase flash. */
+#define led_k_write_flash	0xB4	/* About to write flash. */
+#define led_k_verify_flash	0xB5	/* About to verify flash. */
+#define led_k_flash_exit	0xBF	/* Program finished. */
+
+#endif /* __LEDCODES_H_LOADED */
diff --git a/system/alpha/h/lib.h b/system/alpha/h/lib.h
new file mode 100644
index 000000000..def67fb25
--- /dev/null
+++ b/system/alpha/h/lib.h
@@ -0,0 +1,517 @@
+#ifndef __LIB_H_LOADED
+#define __LIB_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: lib.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: lib.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/06/23  00:18:57  berc
+ * Initial revision
+ *
+ * Revision 1.29  1995/04/05  21:46:10  cruz
+ * Added EB164 prototype for wr_bcache().
+ *
+ * Revision 1.28  1995/04/03  18:35:32  cruz
+ * Extended the prototype definition of cserv.
+ *
+ * Revision 1.27  1995/03/05  04:17:23  fdh
+ * Corrected prototype for inrom().
+ *
+ * Revision 1.26  1995/02/28  03:05:53  fdh
+ * Moved rom.c prototypes to rom.h
+ *
+ * Revision 1.25  1995/02/27  19:21:27  fdh
+ * Added prototypes for Ctype routines.
+ *
+ * Revision 1.24  1995/02/23  21:48:31  fdh
+ * Added prototypes for set_haxr() and atoi().
+ *
+ * Revision 1.23  1995/02/22  22:01:10  fdh
+ * Changed types for tolower() and toupper().
+ *
+ * Revision 1.22  1995/02/19  17:46:01  fdh
+ * Changed one of the arguments to read_rom().
+ *
+ * Revision 1.21  1995/02/10  02:23:20  fdh
+ * Added prototype for set_romboot().
+ *
+ * Revision 1.20  1994/11/19  03:30:51  fdh
+ * Added support for romlist command.
+ *
+ * Revision 1.19  1994/11/18  19:05:31  fdh
+ * swpipl returns the current ipl.
+ *
+ * Revision 1.18  1994/11/08  21:39:20  fdh
+ * Added declaration for the flash routine.
+ *
+ * Revision 1.17  1994/11/01  11:30:01  rusling
+ * Changed following PCI-PCI bridge support.
+ *
+ * Revision 1.16  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.15  1994/08/03  19:44:23  fdh
+ * Fixups around the linker defined symbols _edata and _end.
+ * Protect time_t definition with #ifndef _TIME_T.
+ *
+ * Revision 1.14  1994/07/22  21:02:46  fdh
+ * Added extern void rtcBaseInit(void); for EB64 builds.
+ *
+ * Revision 1.13  1994/07/21  18:10:06  fdh
+ * >> Added EnableBCache(), DisableBCache(), and CleanBCache().
+ *
+ * Revision 1.12  1994/07/13  14:17:07  fdh
+ * Added data structure for holding pointers to SROM interface
+ * parameters.
+ *
+ * Revision 1.11  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.10  1994/06/22  15:10:34  rusling
+ * Fixed up WNT compile warnings.
+ *
+ * Revision 1.9  1994/06/21  15:27:47  rusling
+ * Removed putFloat() prototype.
+ *
+ * Revision 1.8  1994/06/21  14:18:05  rusling
+ * changed definition of loadHeader() in rom.c
+ *
+ * Revision 1.7  1994/06/21  10:38:53  rusling
+ * Added strncmp() for WNT.
+ *
+ * Revision 1.5  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.4  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.3  1994/06/13  15:54:35  fdh
+ * Added definitions of unsigned amounts as defined in system.h
+ * Definitions are also placed here to make the lib subdirectory
+ * free-standing from the rest of the source tree.
+ *
+ * Revision 1.2  1994/06/03  20:18:38  fdh
+ * Added protypes for all routines in /lib.
+ *
+ * Revision 1.1  1994/01/19  10:33:21  rusling
+ * Initial revision
+ *
+ * Revision 1.1  1993/06/08  19:56:14  fdh
+ * Initial revision
+ *
+ */
+
+#include <stddef.h>
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+/*
+ * Definitions of unsigned amounts
+ */
+#define ub unsigned char
+#define uw unsigned short int
+
+#ifdef _WIN32
+#define ul unsigned __int64
+#define sl __int64
+#define ui unsigned int
+#else
+#define ul unsigned long
+#define sl long
+#define ui unsigned int
+#endif
+
+typedef struct {
+  ul *abox_ctl;
+#ifdef DC21064
+  ul *biu_ctl;
+#endif /* DC21064 */
+#ifdef DC21066
+  ui *bcr0;
+  ui *bcr1;
+  ui *bcr2;
+  ui *bcr3;
+  ui *bmr0;
+  ui *bmr1;
+  ui *bmr2;
+  ui *bmr3;
+#endif /* DC21066 */
+  ul *srom_rev;
+  ul *proc_id;
+  ul *mem_size;
+  ul *cycle_cnt;
+  ul *signature;
+  ul *proc_mask;
+  ul *sysctx;
+  int valid;
+} sysdata_t;
+
+#ifdef _WIN32
+extern ul end;
+extern ul edata;
+#define _END end
+#define _EDATA edata
+#else
+extern ul _end;
+extern ul _edata;
+#define _END _end
+#define _EDATA _edata
+#endif
+
+#ifndef _TIME_T
+#define _TIME_T
+/* typedef int time_t; */
+typedef ui time_t;
+#endif
+
+/*::::::::::::::
+rw.c
+::::::::::::::*/
+/* Here B = 8 bits, W = 16 bits, L = 32 bits, Q = 64 bits */
+extern ub ReadB(ub * adr);
+extern uw ReadW(uw * adr);
+extern void WriteB(ub * adr , ub data);
+extern void WriteW(uw * adr , uw data);
+
+/*::::::::::::::
+beep.c
+::::::::::::::*/
+extern void tone(int period , int time);
+extern void dummy(int x);
+extern void Beep(int msec , int freq);
+extern void msleep(int ms);
+
+/*::::::::::::::
+c8514.c
+::::::::::::::*/
+extern int c8514init(void);
+extern void c8514erase(void);
+extern void c8514putc(char c);
+extern void c8514show(void);
+extern void c8514hide(void);
+extern void c8514insfontchar(int code , ub * s);
+extern void initfont(void);
+
+/*::::::::::::::
+date.c
+::::::::::::::*/
+extern void printDate(void);
+extern void setDate(ub * date);
+extern ui gettime(void);
+extern time_t time(void);
+extern void CheckDate(void);
+
+/*::::::::::::::
+initdata.c
+::::::::::::::*/
+extern void doinitdata(void );
+
+/*::::::::::::::
+ebxx_io.c
+::::::::::::::*/
+extern void outportb(ul p , ui d);
+extern void outportw(ul p , ui d);
+extern void outportt(ul p , ui d);
+extern void outportl(ul p , ui d);
+extern void outportbxt(ul p , ui d);
+extern void outport(ul p , ui d);
+extern void outcfgb(ui bus, ui dev, ui reg, ui data);
+extern void outcfgw(ui bus, ui dev, ui reg, ui data);
+extern void outcfgl(ui bus, ui dev, ui reg, ui data);
+extern void outmembxt(ul p , ui d);
+extern void outmemwat(ul p , ui d);
+extern ui inportb(ul p);
+extern ui inportw(ul p);
+extern ui inportt(ul p);
+extern ui inportl(ul p);
+extern ui inportwat(ul p);
+extern ui inportbxt(ul p);
+extern ui inport(ul p);
+extern ui incfgb(ui bus, ui dev, ui reg);
+extern ui incfgw(ui bus, ui dev, ui reg);
+extern ui incfgl(ui bus, ui dev, ui reg);
+extern ui inmembat(ul p);
+extern ui inmembxt(ul p);
+extern void IOBusInit(void);
+extern ul IOPCIClearNODEV(void);
+extern void outLed(ui d);
+extern void out_ioc_csr(ui p , ul d);
+extern ul in_ioc_csr(ui p);
+extern void outmemb(ul p , ui d);
+extern void outmemw(ul p , ui d);
+extern void outmemt(ul p , ui d);
+extern void outmeml(ul p , ui d);
+extern void outmem(ul p , ui d);
+extern ui inmemb(ul p);
+extern ui inmemw(ul p);
+extern ui inmemt(ul p);
+extern ul inmeml(ul p);
+extern ui inmemwat(ul p);
+extern ui inmem(ul p);
+extern void set_haxr(unsigned int addr);
+extern void outVti(ul p , ui d);
+extern ui inVti(ul p);
+extern ub inrom(ul p);
+extern ui insctl(void);
+extern void outsctl(ui d);
+extern ui inIack(void);
+#ifdef EB64
+extern void rtcBaseInit(void);
+#endif
+
+/*::::::::::::::
+ebxx_mem.c
+::::::::::::::*/
+extern void memdetect(void);
+extern int check_mem_esr(int silent);
+#ifdef EB66
+extern void out_mem_csr(ul p , ul d);
+extern ul in_mem_csr(ui p);
+#elif EB64P
+extern void out_mem_csr(ui p , ui d);
+extern ui in_mem_csr(ui p);
+#endif
+
+extern void EnableBCache(void);
+extern void DisableBCache(void);
+
+#ifdef EB164
+void wr_bcache (ui argc, ul arg1, ul arg2, ui select);
+#endif
+
+/*::::::::::::::
+ffcsubs.c
+::::::::::::::*/
+extern int strlen(char * s);
+extern void bzero(char * s , int count);
+extern void bcopy(char * from , char * to , int count);
+extern int tolower(int c);
+extern int toupper(int c);
+extern int IsAlpha(char c);
+extern int IsDigit(char c);
+
+/*::::::::::::::
+fftty.c
+::::::::::::::*/
+extern void UnGetChar(char c);
+extern char MonGetChar(void);
+extern void FlushLine(void);
+extern ul ReadHex(void);
+extern void ReadString(char * s);
+extern char RawMonGetChar(void);
+extern int kbdcontinue(void );
+
+/*::::::::::::::
+floppy.c
+::::::::::::::*/
+extern int floppyRead(int loadtype , char * file2load);
+
+/*::::::::::::::
+gpchar.c
+::::::::::::::*/
+extern void PutChar(char c);
+extern char GetChar(void);
+extern int CharAv(void);
+extern void WaitUs(int usecs);
+
+/*::::::::::::::
+ident.c
+::::::::::::::*/
+extern int ident(ul first , ul last);
+
+/*::::::::::::::
+int.c
+::::::::::::::*/
+extern void intr_enable(int int_level);
+
+/*::::::::::::::
+kbd.c
+::::::::::::::*/
+extern void kbd_error(char * error_msg , int s1);
+extern int kbd_init(void);
+extern void kbd_reset_state(void);
+extern int kbd_charav(void);
+extern int kbd_getc(void);
+
+/*::::::::::::::
+leds.c
+::::::::::::::*/
+extern void sethdled(int v);
+extern int isturbo(void);
+extern int kbd_locked(void);
+
+/*::::::::::::::
+memtest.c
+::::::::::::::*/
+extern ul do_memtest(char * llim , char * hlim , int inc);
+extern void memtest1(char * llim , char * hlim , int inc , int pattern);
+extern void memtest2(char * llim , char * hlim , int inc , int seed);
+extern void memtest3(char * llim , char * hlim , int inc);
+extern void memtest(char * min , char * max , int inc);
+
+/*::::::::::::::
+p8514.c
+::::::::::::::*/
+extern void pwgaFillSolid(ui fg , ui alu , ui planemask , int xDst , int yDst , int wDst , int hDst);
+extern void pwgaDrawColorImage(int xDst , int yDst , int wDst , int hDst , ub * pSrc , int widthSrc , ui alu , ui planemask);
+extern void pwgaBlit(int xSrc , int ySrc , int wSrc , int hSrc , int xDst , int yDst , ui alu , ui planemask);
+extern int DisplayOpen(int mode1024);
+extern void DisplayClose(void);
+extern void byteoutport(int p , int d);
+extern void short_delay(void);
+extern void InitLUT(void);
+extern int pwgaExists(void);
+extern ui pwgaHWInit(int mode1024);
+extern void outwords(short * wSrc , int wcount);
+extern void outwblock(ub * pSrc , int w , int h , int widthSrc);
+
+/*::::::::::::::
+pr.c
+::::::::::::::*/
+extern void PQ(ul x);
+extern void PL(ui x);
+extern void PW(uw x);
+extern void PB(ub x);
+extern void PutSpace(void);
+extern void PutCR(void);
+
+/*::::::::::::::
+printf.c
+::::::::::::::*/
+extern void PutString(char * s);
+extern void printf(char * f , ...);
+
+/*::::::::::::::
+search.c
+::::::::::::::*/
+extern int search(ul first , ul last , int size , char * valstr , int inverse);
+extern void ParseVal(char * s , ul * val , ul * mask , int size);
+
+/*::::::::::::::
+sniff.c
+::::::::::::::*/
+extern int find_first(int map);
+extern int sniff_eisa(int id , int mask , int num_slots);
+
+/*::::::::::::::
+uart.c
+::::::::::::::*/
+extern int uart_charav(int port);
+extern char uart_getchar(int port);
+extern void uart_putchar(int port , char c);
+extern void putcLpt(int c);
+extern void uart_init_line(int line , int baud);
+extern int uart_init(void);
+
+/*::::::::::::::
+vga.c
+::::::::::::::*/
+extern void vgaerase(void);
+extern void vgalcgen(void);
+extern void vgasetloc(void);
+extern void vgaputc(register int c);
+extern void vgastl(ul a , int d);
+extern int vgaldl(ul a);
+extern ub readreg(ui sel , ui off);
+extern void writereg(ui sel , ui off , ub dat);
+extern void dumpvga(void);
+extern void vgainit(void);
+
+/*::::::::::::::
+libc.c
+::::::::::::::*/
+extern int memcmp(const void * pcs , const void * pct , size_t n);
+extern void * memset(void * ps , char c , size_t n);
+extern void * memmove(void * ps , const void * pct , size_t n);
+extern void * memcpy(void * ps , const void * pct , size_t n);
+extern int atoi(const char *nptr);
+extern int isalnum(int c);
+extern int isalpha(int c);
+extern int isascii(int c);
+extern int iscntrl(int c);
+extern int isdigit(int c);
+extern int isgraph(int c);
+extern int islower(int c);
+extern int isprint(int c);
+extern int ispunct(int c);
+extern int isspace(int c);
+extern int isupper(int c);
+extern int isxdigit(int c);
+
+/*::::::::::::::
+flash.c
+::::::::::::::*/
+extern int flash_main(ui src , ui segnum, ui segcnt);
+/*::::::::::::::
+asmstuff.s
+::::::::::::::*/
+extern void mb(void);
+extern ul GetSP(void);
+extern ul cServe(ul, ul, ul, ...);
+extern void wrfen(ui);
+extern void swppal(ul, ul, ul, ul);
+extern void halt(void);
+extern void wait_cycles(ui cycles);
+extern int swpipl(ui);
+extern void CleanBCache(ul);
+/* Here B = 8 bits, W = 16 bits, L = 32 bits, Q = 64 bits */
+#ifdef _WIN32
+extern ui ReadL(ul);
+extern void WriteL(ul, ui);
+extern ul ReadQ(ul);
+extern void WriteQ(ul, ul);
+#else
+#define WriteL(address,value)	(*(ui *)(address)=(ui)(value))
+#define ReadL(address)		(*(ui *)(address))
+#define WriteQ(address,value)	(*(ul *)(address)=(ul)(value))
+#define	ReadQ(address)		(*(ul *)(address))
+#endif
+
+/*::::::::::::::::
+host specific library definitions
+::::::::::::::::*/
+#ifdef _WIN32
+extern int strcmp(char *cs, char *ct);
+extern char *strcpy(char *s, char *ct);
+extern int strncmp(char *cs, char *ct, int n);
+extern char *strncpy(char *s, char *ct, int n);
+extern int rand(void);
+#endif
+
+#endif /* __LIB_H_LOADED */
diff --git a/system/alpha/h/libc.h b/system/alpha/h/libc.h
new file mode 100644
index 000000000..52a35f915
--- /dev/null
+++ b/system/alpha/h/libc.h
@@ -0,0 +1,204 @@
+#ifndef __LIBC_H_LOADED
+#define __LIBC_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: libc.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ *
+ * $Log: libc.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/02/27  19:21:55  fdh
+ * Change the name of the Ctype Macros.
+ *
+ * Revision 1.1  1995/02/14  18:53:21  fdh
+ * Initial revision
+ *
+ */
+
+#define _ISMACRO(c,x) ((int) (_CTYPES[c] & (x)))
+
+#define _isalnum(c)	_ISMACRO(c,_ISALNUM_)
+#define _isalpha(c)	_ISMACRO(c,_ISALPHA_)
+#define _isascii(c)	_ISMACRO(c,_ISASCII_)
+#define _iscntrl(c)	_ISMACRO(c,_ISCNTRL_)
+#define _isdigit(c)	_ISMACRO(c,_ISDIGIT_)
+#define _isgraph(c)	_ISMACRO(c,_ISGRAPH_)
+#define _islower(c)	_ISMACRO(c,_ISLOWER_)
+#define _isprint(c)	_ISMACRO(c,_ISPRINT_)
+#define _ispunct(c)	_ISMACRO(c,_ISPUNCT_)
+#define _isspace(c)	_ISMACRO(c,_ISSPACE_)
+#define _isupper(c)	_ISMACRO(c,_ISUPPER_)
+#define _isxdigit(c)	_ISMACRO(c,_ISXDIGIT_)
+
+#define _ISALNUM_  0x0001
+#define _ISALPHA_  0x0002
+#define _ISASCII_  0x0004
+#define _ISCNTRL_  0x0008
+#define _ISDIGIT_  0x0010
+#define _ISGRAPH_  0x0020
+#define _ISLOWER_  0x0040
+#define _ISPRINT_  0x0080
+#define _ISPUNCT_  0x0100
+#define _ISSPACE_  0x0200
+#define _ISUPPER_  0x0400
+#define _ISXDIGIT_ 0x0800
+
+const uw _CTYPES[] =
+{
+/* 0 '\000'*/	_ISASCII_|_ISCNTRL_,
+/* 1 '\001'*/	_ISASCII_|_ISCNTRL_,
+/* 2 '\002'*/	_ISASCII_|_ISCNTRL_,
+/* 3 '\003'*/	_ISASCII_|_ISCNTRL_,
+/* 4 '\004'*/	_ISASCII_|_ISCNTRL_,
+/* 5 '\005'*/	_ISASCII_|_ISCNTRL_,
+/* 6 '\006'*/	_ISASCII_|_ISCNTRL_,
+/* 7 '\007'*/	_ISASCII_|_ISCNTRL_,
+/* 8 '\010'*/	_ISASCII_|_ISCNTRL_,
+/* 9 '\011'*/	_ISASCII_|_ISCNTRL_|_ISSPACE_,
+/* 10 '\012'*/	_ISASCII_|_ISCNTRL_|_ISSPACE_,
+/* 11 '\013'*/	_ISASCII_|_ISCNTRL_|_ISSPACE_,
+/* 12 '\014'*/	_ISASCII_|_ISCNTRL_|_ISSPACE_,
+/* 13 '\015'*/	_ISASCII_|_ISCNTRL_|_ISSPACE_,
+/* 14 '\016'*/	_ISASCII_|_ISCNTRL_,
+/* 15 '\017'*/	_ISASCII_|_ISCNTRL_,
+/* 16 '\020'*/	_ISASCII_|_ISCNTRL_,
+/* 17 '\021'*/	_ISASCII_|_ISCNTRL_,
+/* 18 '\022'*/	_ISASCII_|_ISCNTRL_,
+/* 19 '\023'*/	_ISASCII_|_ISCNTRL_,
+/* 20 '\024'*/	_ISASCII_|_ISCNTRL_,
+/* 21 '\025'*/	_ISASCII_|_ISCNTRL_,
+/* 22 '\026'*/	_ISASCII_|_ISCNTRL_,
+/* 23 '\027'*/	_ISASCII_|_ISCNTRL_,
+/* 24 '\030'*/	_ISASCII_|_ISCNTRL_,
+/* 25 '\031'*/	_ISASCII_|_ISCNTRL_,
+/* 26 '\032'*/	_ISASCII_|_ISCNTRL_,
+/* 27 '\033'*/	_ISASCII_|_ISCNTRL_,
+/* 28 '\034'*/	_ISASCII_|_ISCNTRL_,
+/* 29 '\035'*/	_ISASCII_|_ISCNTRL_,
+/* 30 '\036'*/	_ISASCII_|_ISCNTRL_,
+/* 31 '\037'*/	_ISASCII_|_ISCNTRL_,
+/* 32 '\040'*/	_ISASCII_|_ISPRINT_|_ISSPACE_,
+/* 33 '!'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 34 '"'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 35 '#'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 36 '$'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 37 '%'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 38 '&'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 39 '''*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 40 '('*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 41 ')'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 42 '*'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 43 '+'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 44 ','*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 45 '-'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 46 '.'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 47 '/'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 48 '0'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 49 '1'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 50 '2'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 51 '3'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 52 '4'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 53 '5'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 54 '6'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 55 '7'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 56 '8'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 57 '9'*/	_ISALNUM_|_ISASCII_|_ISDIGIT_|_ISGRAPH_|_ISPRINT_|_ISXDIGIT_,
+/* 58 ':'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 59 ';'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 60 '<'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 61 '='*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 62 '>'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 63 '?'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 64 '@'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 65 'A'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 66 'B'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 67 'C'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 68 'D'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 69 'E'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 70 'F'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_|_ISXDIGIT_,
+/* 71 'G'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 72 'H'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 73 'I'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 74 'J'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 75 'K'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 76 'L'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 77 'M'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 78 'N'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 79 'O'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 80 'P'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 81 'Q'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 82 'R'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 83 'S'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 84 'T'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 85 'U'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 86 'V'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 87 'W'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 88 'X'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 89 'Y'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 90 'Z'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISUPPER_,
+/* 91 '['*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 92 '\'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 93 ']'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 94 '^'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 95 '_'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 96 '`'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 97 'a'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 98 'b'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 99 'c'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 100 'd'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 101 'e'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 102 'f'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_|_ISXDIGIT_,
+/* 103 'g'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 104 'h'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 105 'i'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 106 'j'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 107 'k'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 108 'l'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 109 'm'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 110 'n'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 111 'o'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 112 'p'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 113 'q'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 114 'r'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 115 's'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 116 't'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 117 'u'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 118 'v'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 119 'w'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 120 'x'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 121 'y'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 122 'z'*/	_ISALNUM_|_ISALPHA_|_ISASCII_|_ISGRAPH_|_ISLOWER_|_ISPRINT_,
+/* 123 '{'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 124 '|'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 125 '}'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 126 '~'*/	_ISASCII_|_ISGRAPH_|_ISPRINT_|_ISPUNCT_,
+/* 127 '\177'*/	_ISASCII_|_ISCNTRL_
+};
+
+#endif /* __LIBC_H_LOADED */
diff --git a/system/alpha/h/local.h b/system/alpha/h/local.h
new file mode 100644
index 000000000..57915278f
--- /dev/null
+++ b/system/alpha/h/local.h
@@ -0,0 +1,58 @@
+#ifndef __LOCAL_H_LOADED
+#define __LOCAL_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: local.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: local.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/02/10  02:23:49  fdh
+ * Initial revision
+ *
+ */
+
+/*
+ * Source files that are common between the ebfw source
+ * tree and the ebtools source tree could have inherent
+ * conflicts in their requirements for libraries, definitions,
+ * etc.  The basic difference is that ebtools are built
+ * to run natively with an operating system where the ebfw
+ * tree is built to run in a freestanding environment on,
+ * typically, an evaluation board target.  Therefore, this
+ * file is used to provide the proper environment for building
+ * those common files in the ebfw source tree.
+ */
+
+#include "lib.h"
+#include "system.h"
+
+#endif /* __LOCAL_H_LOADED */
diff --git a/system/alpha/h/mem.h b/system/alpha/h/mem.h
new file mode 100644
index 000000000..6d71b54c8
--- /dev/null
+++ b/system/alpha/h/mem.h
@@ -0,0 +1,54 @@
+#ifndef __MEM_H_LOADED
+#define __MEM_H_LOADED
+
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: mem.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: mem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.1  1994/07/21  18:11:01  fdh
+ * Initial revision
+ *
+ */
+
+/*
+ * Per evaluation board include files
+ */
+#include "eb64mem.h"
+#include "eb66mem.h"
+#include "eb64pmem.h"
+
+#endif /* __MEM_H_LOADED */
diff --git a/system/alpha/h/mon.h b/system/alpha/h/mon.h
new file mode 100644
index 000000000..3611de57f
--- /dev/null
+++ b/system/alpha/h/mon.h
@@ -0,0 +1,158 @@
+#ifndef __MON_H_LOADED
+#define __MON_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: mon.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: mon.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/11/30 18:01:05  berc
+ * Initial revision
+ *
+ * Revision 1.15  1995/02/23  21:49:05  fdh
+ * Added prototype for CompareMem().
+ *
+ * Revision 1.14  1994/11/08  21:43:55  fdh
+ * Added include for lib.h
+ *
+ * Revision 1.13  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.12  1994/06/23  13:43:18  rusling
+ * Fixed up WNT compiler warnings.
+ *
+ * Revision 1.11  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.10  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.9  1994/06/13  15:15:03  rusling
+ * Added more function prototypes.
+ *
+ * Revision 1.8  1994/06/03  20:15:43  fdh
+ * Removed lib.h include and declaration for memtest.
+ *
+ * Revision 1.7  1994/04/03  00:35:49  fdh
+ * Modified PrintMem() prototype.
+ *
+ * Revision 1.6  1994/04/01  22:41:46  fdh
+ * Removed obsoleted global variable.
+ *
+ * Revision 1.5  1994/03/16  00:12:01  fdh
+ * Added some prototypes...
+ *
+ * Revision 1.4  1994/03/13  14:37:45  fdh
+ * Modified memtest prototype.
+ *
+ * Revision 1.3  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.2  1993/10/02  23:37:53  berent
+ * Merge in development by Anthony Berent
+ *
+ *>> Revision 1.2  1993/08/06  10:45:27  berent
+ *>> Added MONITOR_ETHER_DEVICE constant. This defines which ethernet device the
+ *>> monitor uses.
+ *
+ * Revision 1.1  1993/06/08  19:56:15  fdh
+ * Initial revision
+ *
+ */
+
+/* definitions for basic things */
+
+#include "system.h"
+#include "lib.h"
+
+extern ul bootadr;
+
+/* some constants */
+#define RDFILE 0
+#define VERIFY 1
+#define MONITOR_ETHER_DEVICE 0  /* Ethernet port number to be used by monitor */
+
+/*::::::::::::::
+cmd.c
+::::::::::::::*/
+extern void user_main(void);
+extern int main(void);
+
+/*::::::::::::::
+crt.c
+::::::::::::::*/
+extern void exit(void);
+
+/*::::::::::::::
+dis.c
+::::::::::::::*/
+extern void dis(int argc , ul first , ul last);
+
+/*::::::::::::::
+ffexec.c
+::::::::::::::*/
+extern void PutDotChar(register char c);
+extern void CallIt(int (* adr)(int argc, ul val1, ul val2, ul val3, ul val4) ,
+                   int argc , ul val1 , ul val2 , ul val3 , ul val4);
+extern void ExecuteProgram(int (* place)(void));
+extern ul CurrentDefault(void);
+extern void PrintMem(int size , ul first , ul last , ul iterations , int silent, int virtual);
+extern void CompareMem(ul first, ul last, ul copy);
+extern void ChecksumMem(ul first , ul last);
+extern void ChangeMem(int size , ul place, int virtual);
+extern void FillMem(ul first , ul last , ui value);
+extern void ctty(int x);
+extern void tip(int port);
+extern void PrintVersion(void);
+extern void StackTrace(void);
+extern void jToPal(ul bootadr);
+extern ul csrv(ul data , ul address , int select);
+extern int get_bootadr(void);
+
+/*::::::::::::::
+ffsrec.c
+::::::::::::::*/
+extern void GetRecord(int port);
+extern int Download(void);
+extern ui GetHex1(void);
+extern ui GetHex2(ui in);
+extern ui GetHex4(ui in);
+extern void GetData(void);
+extern void CheckChecksum(void);
+
+/*::::::::::::::
+pReg.c
+::::::::::::::*/
+extern void printReg(ul * register_array , int group);
+extern void changeReg(ul * register_array , int group , int index , ul data);
+
+#endif /* __MON_H_LOADED */
diff --git a/system/alpha/h/net_buff.h b/system/alpha/h/net_buff.h
new file mode 100644
index 000000000..cb86203cd
--- /dev/null
+++ b/system/alpha/h/net_buff.h
@@ -0,0 +1,75 @@
+#ifndef __NET_BUFFER_H_LOADED
+#define __NET_BUFFER_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: net_buff.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Buffer allocator for ISA DMA buffers. Note that this buffer allocator
+ *     does not allow buffers to be freed.
+ *
+ * HISTORY:
+ *
+ * $Log: net_buff.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/11/30  10:15:36  rusling
+ * Initial revision
+ *
+ * Revision 1.1  1993/08/06  10:31:10  berent
+ * Initial revision
+ *
+ *
+ */
+
+/* net_buffer_init_module - initialise the module
+ */
+extern void net_buffer_init_module(void);
+
+/* net_buffer_alloc - allocate a region of memory accessable by
+ * network DMA devices
+ *
+ * Argument:
+ *    size - number of bytes to allocate
+ *
+ * Result:
+ *    Pointer to start of buffer
+ */
+extern void * net_buffer_alloc(int size);
+
+#endif /* __NET_BUFFER_H_LOADED */
diff --git a/system/alpha/h/netman.h b/system/alpha/h/netman.h
new file mode 100644
index 000000000..32d0bb934
--- /dev/null
+++ b/system/alpha/h/netman.h
@@ -0,0 +1,79 @@
+#ifndef __NETMAN_H_LOADED
+#define __NETMAN_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/* "$Id: netman.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $" */
+
+/*
+ * This module provides functions for selecting which ethernet device is used and
+ * for initialising it when neccessary.
+ *
+ * $Log: netman.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/08/11  10:18:33  berent
+ * Initial revision
+ *
+ */
+
+extern int monitor_ether_device;
+
+/* netman_setup - initialise the networking modules and register the devices
+ */
+extern void netman_setup(void);
+
+/* netman_set_monitor_device - set up the device to be used by the monitor
+ *
+ * Argument:
+ *    device_no - The monitor device number.
+ *
+ * Return value:
+ *    TRUE - successful
+ *    FALSE - bad device number
+ */
+extern int netman_set_monitor_device(int device_no);
+
+/* netman_start_monitor_device - start the monitor device and all protocol handlers for it
+ */
+extern void netman_start_monitor_device(void);
+
+/* netman_monitor_device_started  - tells other modules whether the monitor device has been started
+ *
+ * Return value:
+ *    TRUE - it has been initialised before
+ *    FALSE - it has never been initialised
+ */
+extern int netman_monitor_device_started(void);
+
+#endif /* __NETMAN_H_LOADED */
diff --git a/system/alpha/h/paldefs.h b/system/alpha/h/paldefs.h
new file mode 100644
index 000000000..0d39c973a
--- /dev/null
+++ b/system/alpha/h/paldefs.h
@@ -0,0 +1,76 @@
+#ifndef __PALDEFS_H_LOADED
+#define __PALDEFS_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: paldefs.h,v 1.1.1.1 1997/10/30 23:27:16 verghese Exp $;
+ */
+
+/*
+ * $Log: paldefs.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:16  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/02/24  15:54:10  fdh
+ * Initial revision
+ *
+ */
+
+#define PAL_halt        0x0000
+#define PAL_cflush      0x0001
+#define PAL_draina      0x0002
+#define PAL_cobratt     0x0009
+#define PAL_ipir        0x000d
+#define PAL_mtpr_mces   0x0011
+#define PAL_wrfen       0x002b
+#define PAL_wrvptptr    0x002d
+#define PAL_jtopal      0x002e
+#define PAL_swpctx      0x0030
+#define PAL_wrval       0x0031
+#define PAL_rdval       0x0032
+#define PAL_tbi         0x0033
+#define PAL_wrent       0x0034
+#define PAL_swpipl      0x0035
+#define PAL_rdps        0x0036
+#define PAL_wrkgp       0x0037
+#define PAL_wrusp       0x0038
+#define PAL_wrperfmon   0x0039
+#define PAL_rdusp       0x003a
+#define PAL_whami       0x003c
+#define PAL_rtsys       0x003d
+#define PAL_rti         0x003f
+#define PAL_bpt         0x0080
+#define PAL_bugchk      0x0081
+#define PAL_chmk        0x0083
+#define PAL_callsys     0x0083
+#define PAL_imb         0x0086
+#define PAL_rduniq      0x009e
+#define PAL_wruniq      0x009f
+#define PAL_gentrap     0x00aa
+#define PAL_nphalt      0x00be
+
+#endif /* __PALDEFS_H_LOADED */
diff --git a/system/alpha/h/pci.h b/system/alpha/h/pci.h
new file mode 100644
index 000000000..17bae06d8
--- /dev/null
+++ b/system/alpha/h/pci.h
@@ -0,0 +1,203 @@
+#ifndef __PCI_H_LOADED
+#define __PCI_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id:
+ *
+ *  This file contains all of the PCI specific definitions required for
+ *  the PCI bus support within the debug monitor.
+ */
+
+/*
+ * $Log: pci.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1996/04/15 16:26:54  berc
+ * Initial revision
+ *
+ * Revision 1.11  1994/11/01  11:30:18  rusling
+ * Added PCI-PCI bridge support.
+ *
+ * Revision 1.10  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * $Log: pci.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1996/04/15 16:26:54  berc
+ * Initial revision
+ *
+ * Revision 1.11  1994/11/01  11:30:18  rusling
+ * Added PCI-PCI bridge support.
+ *
+ * Revision 1.9  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.8  1994/06/19  15:48:04  fdh
+ * Changed PCI_H to __PCI_H_LOADED
+ *
+ * Revision 1.7  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.6  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.5  1993/11/29  14:58:42  rusling
+ * Added PCI address checking and conversion routines,
+ * PCIMapAddress() and PCIValidAddress().
+ *
+ * Revision 1.4  1993/11/24  15:23:29  rusling
+ * Added PCI_CFG_REG_VENDOR_DEVICE for offset to
+ * first longword of the PCI configuration header.
+ *
+ * Revision 1.3  1993/11/23  10:43:50  rusling
+ * Remove per system information.
+ *
+ * Revision 1.2  1993/11/22  13:17:13  rusling
+ * Merged with PCI/21040 changes.
+ *
+ * Revision 1.1  1993/11/22  12:16:56  rusling
+ * Initial revision
+ *
+ *
+ */
+
+#ifdef NEEDPCI
+
+
+/*
+ *  Define the PCI device data structure.
+ */
+typedef struct PCIDevice {
+    struct PCIBus *parent;		/* parent bus */
+    struct PCIDevice *next;		/* in device chain */
+    struct PCIDevice *sibling;		/* for this bus */
+    ui slot;
+    uw vendor;
+    uw device;
+    ui class;
+
+    ui PCI_IO_Reg;
+    ui PCI_IO_Base;
+    ui PCI_IO_Size;
+    ui PCI_Mem_Reg;
+    ui PCI_Mem_Base;
+    ui PCI_Mem_Size;
+
+    void (*print)(struct PCIDevice *device);
+    struct {
+        ui IO : 1;
+        ui MEM : 1;
+        ui bridge : 1;
+        ui allocated : 1;
+    } flags;
+} PCIDevice_t;
+
+typedef struct PCIBus {
+    struct PCIBus *parent;
+    struct PCIBus *next;
+    struct PCIDevice *bridge;
+    struct PCIDevice *devices;
+    struct PCIBus *children;
+
+    ui PCI_IO_Reg;
+    ui PCI_IO_Base;
+    ui PCI_IO_Size;
+    ui PCI_Mem_Reg;
+    ui PCI_Mem_Base;
+    ui PCI_Mem_Size;
+
+    unsigned char number;
+    unsigned char primary;
+    unsigned char secondary;
+    unsigned char subordinate;
+} PCIBus_t;
+
+
+/*
+ *  Define some macros for getting at fields in the
+ *  PCIDevice_t and PCIBus_t typedefs.
+ */
+#define _PCI_IO_Base(device)  (device)->PCI_IO_Base
+#define _PCI_IO_Size(device)  (device)->PCI_IO_Size
+#define _PCI_Mem_Base(device) (device)->PCI_Mem_Base
+#define _PCI_Mem_Size(device) (device)->PCI_Mem_Size
+#define _PCI_Slot(device)     (device)->slot
+#define _PCI_Print(device)    (device)->print
+#define _PCI_Bus(device)      (device)->parent->number
+
+/*
+ *  Declare some maximums.
+ */
+#define PCI_MAX_DEVICES   	6	/* bits 31:11 of type 0 */
+#define PCI_21050_MAX_DEVICES 	16	/* bits 14:11 of type 1 */
+#define PCI_MAX_BRIDGES	   	6
+
+/*
+ *  The PCI configuration registers.
+ */
+#define PCI_CFG_REG_VENDOR_DEVICE         0x0
+#define PCI_CFG_REG_STATUS_COMMAND        0x4
+                                        /* LONG */
+#define PCI_CFG_REG_REVISION_ID           0x8
+                                        /* BYTE */
+#define PCI_CFG_REG_CLASS_CODE		  0x9
+#define PCI_CFG_REG_LATENCY_TIMER         0xD
+                                        /* BYTE */
+#define PCI_CFG_REG_BAR0                  0x10
+                                        /* Long */
+#define PCI_CFG_REG_BRIDGE_PRIMARY	  0x18
+#define PCI_CFG_REG_BRIDGE_SECONDARY	  0x19
+#define PCI_CFG_REG_BRIDGE_SUBORDINATE	  0x1a
+
+#define PCI_CFG_REG_EROM_BASE             0x30
+                                        /* Long */
+
+/*
+ *  PCI Vendors and devices.
+ */
+#define DIGITAL                        0x1011
+#define DECCHIP_21040                  0x0002
+#define DECCHIP_21030                  0x0004
+
+#define PCI_BRIDGE_CLASS		       0x060400
+/*
+ *  Declare all of the externally visible routines in pci.c
+ */
+extern void PCIShow(void);
+extern ui PCIValidAddress(ub * address);
+extern ui PCIMapAddress(ub * address);
+extern void PCIInit(void);
+extern PCIDevice_t *PCIDeviceFind(uw vendor, uw device);
+extern PCIDevice_t *PCIDeviceFindNext(PCIDevice_t *device);
+extern void PCISetDeviceConfig(PCIDevice_t *device);
+
+#endif /* NEEDPCI */
+#endif /* __PCI_H_LOADED */
diff --git a/system/alpha/h/ppec.h b/system/alpha/h/ppec.h
new file mode 100644
index 000000000..fc9aff492
--- /dev/null
+++ b/system/alpha/h/ppec.h
@@ -0,0 +1,33 @@
+#include "lib.h"
+#include "xxm.h"
+
+unsigned char ppecRegRead(int, unsigned char);
+void ppecRegWrite(int, unsigned char, unsigned char);
+int ppecOpen(int);
+void ppecClose(int);
+ul ppecMemAddr(int);
+ul ppecIOAddr(int, int, unsigned long, int);
+
+typedef unsigned char	char2[2];
+struct pcmcia {
+        int   socket;
+        char2 *cor;
+        char2 *cis;
+};
+
+struct _pcmciaTuples {
+  int count;
+  unsigned char *tuples[32];
+  unsigned char buf[256];
+};
+
+struct _ppecSlotInfo {
+  int cardPresent;
+  struct _pcmciaTuples tuples;
+};
+
+extern struct _ppecSlotInfo ppecSlotInfo[];
+
+
+
+
diff --git a/system/alpha/h/prtrace.h b/system/alpha/h/prtrace.h
new file mode 100644
index 000000000..9500ea1cc
--- /dev/null
+++ b/system/alpha/h/prtrace.h
@@ -0,0 +1,99 @@
+#ifndef __PRTRACE_H_LOADED
+#define __PRTRACE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: prtrace.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     Tracing macros for EB64 monitor
+ *
+ * HISTORY:
+ *     $Log: prtrace.h,v $
+ *     Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ *     current 10/29/97
+ *
+ * Revision 1.5  1994/08/08  00:27:52  fdh
+ * Added TRACE_ENABLE conditional.
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/03/09  12:47:12  berent
+ * Added PRINTERR macros
+ *
+ * Revision 1.1  1993/06/22  11:19:52  berent
+ * Tracing macros implemementing PRTRACE compile time
+ * option.
+ *
+ */
+
+/* The following macros are used for printing out status information and internal error */
+/* messages; such messages go to standard error in environments in which there is a */
+/* standard error file */
+#define PRINTERR1(x) printf(x)
+#define PRINTERR2(x,y) printf(x,y)
+#define PRINTERR3(x,y,z) printf(x,y,z)
+
+
+/*
+ * Tracing with debug prints using the PRTRACE
+ * macros (see prtrace.h) can be performed by
+ * two different means. (1) Defining PRTRACE
+ * will build in the tracing at compile time.
+ * (2) Defining TRACE_ENABLE will also build
+ * in tracing at compile time.  However, most
+ * of it can be enabled or disabled at run
+ * time with the debug monitor prtrace command.
+ */
+
+#ifdef TRACE_ENABLE
+#define PRTRACE
+
+extern int prtrace_enable;
+#define _PRTRACE_PRINTF if (prtrace_enable) printf
+#else
+#define _PRTRACE_PRINTF printf
+#endif
+
+#ifdef PRTRACE
+#define PRTRACE1(x) _PRTRACE_PRINTF(x)
+#define PRTRACE2(x,y) _PRTRACE_PRINTF(x,y)
+#define PRTRACE3(x,y,z) _PRTRACE_PRINTF(x,y,z)
+#else
+#define PRTRACE1(x)
+#define PRTRACE2(x,y)
+#define PRTRACE3(x,y,z)
+#endif
+
+#endif /* __PRTRACE_H_LOADED */
diff --git a/system/alpha/h/regdefs.h b/system/alpha/h/regdefs.h
new file mode 100644
index 000000000..3af0004f2
--- /dev/null
+++ b/system/alpha/h/regdefs.h
@@ -0,0 +1,83 @@
+#ifndef __REGDEFS_H_LOADED
+#define __REGDEFS_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: regdefs.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: regdefs.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.2  1995/02/24  16:00:18  fdh
+ * Conditional around #define AT.
+ *
+ * Revision 1.1  1995/02/24  15:54:26  fdh
+ * Initial revision
+ *
+ */
+
+#define v0	$0
+#define t0	$1
+#define t1	$2
+#define t2	$3
+#define t3	$4
+#define t4	$5
+#define t5	$6
+#define t6	$7
+#define t7	$8
+#define s0	$9
+#define s1	$10
+#define s2	$11
+#define s3	$12
+#define s4	$13
+#define s5	$14
+#define s6	$15
+#define fp	$15	/* fp & s6 are the same	*/
+#define a0	$16
+#define a1	$17
+#define a2	$18
+#define a3	$19
+#define a4	$20
+#define a5	$21
+#define t8	$22
+#define t9	$23
+#define t10	$24
+#define t11	$25
+#define ra	$26
+#define pv	$27	/* pv and t5 are the same */
+#define t12	$27
+#ifndef AT
+#define AT	$at
+#endif
+#define gp	$29
+#define	sp	$30
+#define zero	$31
+
+#endif /* __REGDEFS_H_LOADED */
diff --git a/system/alpha/h/rom.h b/system/alpha/h/rom.h
new file mode 100644
index 000000000..3c7f59403
--- /dev/null
+++ b/system/alpha/h/rom.h
@@ -0,0 +1,53 @@
+#ifndef __ROM_H_LOADED
+#define __ROM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: rom.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: rom.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/02/28  03:06:09  fdh
+ * Initial revision
+ *
+ */
+
+#include "romhead.h"  /* Includes required typedefs. */
+
+/*::::::::::::::
+rom.c
+::::::::::::::*/
+extern int read_rom(int argc , char *arg, ul address);
+extern void list_rom_headers(void );
+extern void set_romboot(char * arg);
+extern ui romimage_size(romheader_t * rhead);
+
+#endif /* __ROM_H_LOADED */
diff --git a/system/alpha/h/romhead.h b/system/alpha/h/romhead.h
new file mode 100644
index 000000000..5be8dd7d9
--- /dev/null
+++ b/system/alpha/h/romhead.h
@@ -0,0 +1,354 @@
+#ifndef __ROMHEAD_H_LOADED
+#define __ROMHEAD_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: romhead.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: romhead.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.16  1995/03/05  00:51:01  fdh
+ * Fixed up a couple of MACROS.
+ *
+ * Revision 1.15  1995/03/04  05:55:57  fdh
+ * Bracket COMPUTE_CHECKSUM Macro.
+ *
+ * Revision 1.14  1995/02/27  15:36:21  fdh
+ * Removed ul definitions. Replaced with structs of ui's.
+ *
+ * Revision 1.13  1995/02/16  22:06:06  fdh
+ * Changed Open VMS to OpenVMS because of some trademark junk.
+ *
+ * Revision 1.12  1995/02/14  21:19:33  cruz
+ * Fixed up header picture to match implementation.
+ *
+ * Revision 1.11  1995/02/10  02:19:03  fdh
+ * Created COMPUTE_CHECKSUM Macro.
+ * Corrected prototypes.
+ *
+ * Revision 1.10  1995/02/08  00:34:44  fdh
+ * Added ROMH_VERSION and ROTATE_RIGHT macros.
+ *
+ * Revision 1.9  1995/02/07  22:28:09  fdh
+ * Changed Windows NT alias from "WNT" to "NT".
+ *
+ * Revision 1.8  1995/02/07  04:54:33  fdh
+ * Added ostype definitions.
+ * Modified ROM_HEADER_CHECKSUM Macro.
+ *
+ * Revision 1.7  1995/02/06  02:47:40  fdh
+ * Added prototypes for romhead.c routines.
+ *
+ * Revision 1.6  1995/02/05  01:53:05  fdh
+ * Modified the definition for the ROM header.
+ * Added a MACRO that can be used to access the
+ * ROM header checksum which can be in different location
+ * for different versions of the header.
+ *
+ * Revision 1.5  1995/02/02  20:05:31  fdh
+ * Moved fwid_array[] initialization to header file.
+ *
+ * Revision 1.4  1995/01/31  23:44:00  fdh
+ * Added field for "OPTIONAL FW ID, continued" to make
+ * the optional field really 7 bytes.
+ *
+ * Revision 1.3  1995/01/31  23:21:25  fdh
+ * Updated...
+ *
+ * Revision 1.2  1995/01/23  22:34:32  fdh
+ * Extended the ROM header spec.  This is now version one
+ * which is a super-set of the version 0 header.
+ *
+ * Revision 1.1  1994/11/19  03:47:29  fdh
+ * Initial revision
+ *
+ *
+ *
+ *	Special ROM header
+ *	==================
+ *	The System ROM can contain multiple ROM images, each with
+ *	its own header. That header tells the SROM where to load
+ *	the image and also if it has been compressed with the
+ *	"makerom" tool.  For System ROMs which contain a single
+ *	image, the header is optional.  If the header does not
+ *	exist the complete System ROM is loaded and executed at
+ *	physical address zero.
+ *
+ *	31                                           0
+ *	+---------------------------------------------+
+ *	|   VALIDATION PATTERN 0x5A5AC3C3             |	0x00
+ *	+---------------------------------------------+
+ *	|   INVERSE VALIDATION PATTERN 0xA5A53C3C     |	0x04
+ *	+---------------------------------------------+
+ *	|   HEADER SIZE (Bytes)                       |	0x08
+ *	+---------------------------------------------+
+ *	|   IMAGE CHECKSUM                            |	0x0C
+ *	+---------------------------------------------+
+ *	|   IMAGE SIZE (Memory Footprint)             |	0x10
+ *	+---------------------------------------------+
+ *	|   DECOMPRESSION FLAG                        |	0x14
+ *	+---------------------------------------------+
+ *	|   DESTINATION ADDRESS LOWER LONGWORD        |	0x18
+ *	+---------------------------------------------+
+ *	|   DESTINATION ADDRESS UPPER LONGWORD        |	0x1C
+ *	+---------------------------------------------+
+ *	|   RSVD<31:16>| ID <15:8>| HEADER REV <7:0>  |	0x20  \
+ *	+---------------------------------------------+        \
+ *	|   ROM IMAGE SIZE                            |	0x24    |
+ *	+---------------------------------------------+         |  New for
+ *	|   OPTIONAL FIRMWARE ID <31:0>               |	0x28    +- Rev 1
+ *	+---------------------------------------------+         |  headers.
+ *	|   OPTIONAL FIRMWARE ID <63:32>              |	0x2C    |
+ *	+---------------------------------------------+        /
+ *	|   HEADER CHECKSUM (excluding this field)    |	0x30  /
+ *	+---------------------------------------------+
+ *
+ *	VALIDATION PATTERN
+ *	------------------
+ *	The first quadword contains a special signature pattern
+ *	that is used to verify that this "special" ROM header
+ *	has been located.  The pattern is 0x5A5AC3C3A5A53C3C.
+ *
+ *	HEADER SIZE (Bytes)
+ *	-------------------
+ *	The header size is the next longword.  This is provided
+ *	to allow for some backward compatibility in the event that
+ *	the header is extended in the future.  When the header
+ *	is located, current versions of SROM code determine where
+ *	the image begins based on the header size.  Additional data
+ *	added to the header in the future will simply be ignored
+ *	by current SROM code. Additionally, the header size = 0x20
+ *	implies version 0 of this header spec.  For any other size
+ *      see HEADER REVISION to determine header version.
+ *
+ *
+ *	IMAGE CHECKSUM
+ *	--------------
+ *	The next longword contains the image checksum.  This is
+ *	used to verify the integrity of the ROM.  Checksum is computed
+ *      in the same fashion as the header checksum.
+ *
+ *	IMAGE SIZE (Memory Footprint)
+ *	-----------------------------
+ *	The image size reflects the size of the image after it has
+ *	been loaded into memory from the ROM. See ROM IMAGE SIZE.
+ *
+ *	DECOMPRESSION FLAG
+ *	------------------
+ *	The decompression flag tells the SROM code if the makerom
+ *	tool was used to compress the ROM image with a "trivial
+ *	repeating byte algorithm".  The SROM code contains routines
+ *	which perform this decompression algorithm.  Other
+ *	compression/decompression schemes may be employed which work
+ *	independently from this one.
+ *
+ *	DESTINATION ADDRESS
+ *	-------------------
+ *	This quadword contains the destination address for the
+ *	image.  The SROM code  will begin loading the image at this
+ *	address and subsequently begin its execution there.
+ *
+ *	HEADER REV
+ *	----------
+ *	The revision of the header specifications used in this
+ *	header.  This is necessary to provide compatibility to
+ *	future changes to this header spec.  Version 0 headers
+ *	are identified by the size of the header.  See HEADER
+ *	SIZE.
+ *
+ *	FIRMWARE ID
+ *	-----------
+ *	The firmware ID is a byte that specifies the firmware type.
+ *	This facilitates image boot options necessary to boot
+ *	different operating systems.
+ *
+ *		  firmware
+ *	firmware    type
+ *	--------  --------
+ *	  DBM	     0	     Alpha Evaluation Boards Debug Monitor
+ *	  WNT        1       Windows NT Firmware
+ *	  SRM        2       Alpha System Reference Manual Console
+ *
+ *	ROM IMAGE SIZE
+ *	--------------
+ *	The ROM image size reflects the size of the image as it is
+ *	contained in the ROM. See IMAGE SIZE.
+ *
+ *	OPTIONAL FW ID
+ *	--------------
+ *	This is an optional field that can be used to provide
+ *	additional firmware information such as firmware revision
+ *	or a character descriptive string up to 8 characters.
+ *
+ *	HEADER CHECKSUM
+ *	---------------
+ *	The checksum of the header.  This is used to validate
+ *	the presence of a header beyond the validation provided
+ *	by the validation pattern.  See VALIDATION PATTERN.
+ *	The header checksum is computed from the beginning of
+ *	the header up to but excluding the header checksum
+ *	field itself.  If there are future versions of this
+ *	header the header checksum should always be the last
+ *	field defined in the header.  The checksum algorithm used
+ *	is compatible with the standard BSD4.3 algorithm provided
+ *	on most implementations of Unix.  Algorithm: The checksum
+ *	is rotated right by one bit around a 16 bit field before
+ *	adding in the value of each byte.
+ *
+ */
+
+#include "local.h"       /* Include environment specific definitions */
+
+#define ROM_H_SIGNATURE 0x5A5AC3C3
+#define ROM_H_REVISION  1
+
+
+typedef union {
+  struct {
+    /*
+     * Version 0 definition of the ROM header.
+     */
+    struct {
+      ui signature;		/* validation signature                    */
+      ui csignature;		/* inverse validation signature            */
+      ui hsize;			/* header size                             */
+      ui checksum;		/* checksum                                */
+      ui size;			/* image size (Memory Footprint)           */
+      ui decomp;		/* decompression algorithm                 */
+      struct {
+        ui low;
+        ui high;
+      } destination; 	/* destination address                     */
+    } V0;
+
+    /*
+     * Version 1 extensions to the ROM header.
+     */
+    struct {
+      char hversion;		/* ROM header version   (Byte 0)            */
+      char fw_id;		/* Firmware ID          (Byte 1)            */
+      char reserved[2];		/* Reserved             (Bytes 3:2)         */
+      ui rimage_size;		/* ROM image size                           */
+      union {
+        char id[8];		/* Optional Firmware ID (character array)   */
+        struct {
+          ui low;
+          ui high;
+        } id_S;
+      } fwoptid;
+    } V1;
+
+    /*
+     * Future extensions to the header should be included before
+     * this header checksum.  (See HEADER CHECKSUM description)
+     */
+    ui hchecksum;		/* Header checksum, (Always last entry)     */
+  } romh;
+  ui romh_array[1];		/* To allow longword access to the data     */
+} romheader_t;
+
+/*
+ * Registered Firmware types.
+ */
+#define FW_DBM 0
+#define FW_WNT 1
+#define FW_SRM 2
+
+#define FW_DBM_STRINGS "Alpha Evaluation Board Debug Monitor", "DBM", "Debug Monitor", "Monitor", NULL
+#define FW_WNT_STRINGS "Windows NT Firmware",                  "WNT", "NTFW", "ARC", "NT", NULL
+#define FW_SRM_STRINGS "Alpha SRM Console",                    "SRM", "VMS", "OSF", NULL
+
+typedef struct fw_id {
+  int firmware_id;
+  char **id_string;
+} fw_id_t;
+
+extern fw_id_t fwid_array[];
+
+#define FW_OSTYPE_DBM 0
+#define FW_OSTYPE_WNT 1
+#define FW_OSTYPE_VMS 2
+#define FW_OSTYPE_OSF 3
+
+#define OS_DBM_STRINGS "Alpha Evaluation Board Debug Monitor", "DBM"
+#define OS_WNT_STRINGS "The Windows NT Operating System",      "NT"
+#define OS_VMS_STRINGS "OpenVMS",                              "VMS"
+#define OS_OSF_STRINGS "DEC OSF/1",                            "OSF"
+
+typedef struct os_types {
+  int ostype;
+  int firmware_id;
+  char **id_string;
+} ostype_t;
+
+extern ostype_t ostype_array[];
+
+/*
+ * The ROM header checksum should always be assigned to the last
+ * field in the header.  Therefore, when reading headers created
+ * by various versions of makerom the ROM header checksum can be
+ * in different locations.  This macro can be used to access the
+ * ROM header checksum in the proper location.
+ */
+#define ROM_HEADER_CHECKSUM(x) \
+  ((x)->romh_array[((x)->romh.V0.hsize - sizeof((x)->romh.hchecksum))/sizeof(ui)])
+
+/*
+ * Macro to provide the header version number
+ */
+#define ROMH_VERSION(x) ((x)->romh.V0.hsize == 0x20 ? 0 : (x)->romh.V1.hversion)
+
+/*
+ * Macro to assist in computing the BSD4.3 style checksum.
+ */
+#define ROTATE_RIGHT(x) if ((x) & 1) (x) = ((x) >>1) + 0x8000; else (x) = (x) >>1;
+
+/*
+ * Macro used to increment the checksum
+ * by a new byte while keeping the total
+ * checksum within the 16 bit range.
+ */
+#define COMPUTE_CHECKSUM(c,k) \
+   {ROTATE_RIGHT(k); k += (ub) c; k &= 0xffff;}
+
+/*
+ * romheader.c prototypes
+ */
+extern fw_id_t * fwid_match(char * arg);
+extern fw_id_t * fwid_match_i(int fwid);
+extern void fwid_dump(char * pre);
+extern ostype_t * ostype_match(char * arg);
+extern ostype_t * ostype_match_i(int ostype);
+extern void ostype_dump(char * pre);
+extern ui compute_romh_chksum(romheader_t * header);
+extern int dumpHeader(romheader_t * header);
+
+#endif /* __ROMHEAD_H_LOADED */
diff --git a/system/alpha/h/rpb.h b/system/alpha/h/rpb.h
new file mode 100644
index 000000000..f23afda39
--- /dev/null
+++ b/system/alpha/h/rpb.h
@@ -0,0 +1,331 @@
+/*
+ *	"@(#)rpb.h	9.2	(ULTRIX/OSF)	10/30/91"
+ */
+/************************************************************************
+ *									*
+ *			Copyright (c) 1990 by				*
+ *		Digital Equipment Corporation, Maynard, MA		*
+ *			All rights reserved.				*
+ *									*
+ *   This software is furnished under a license and may be used and	*
+ *   copied  only  in accordance with the terms of such license and	*
+ *   with the  inclusion  of  the  above  copyright  notice.   This	*
+ *   software  or  any  other copies thereof may not be provided or	*
+ *   otherwise made available to any other person.  No title to and	*
+ *   ownership of the software is hereby transferred.			*
+ *									*
+ *   The information in this software is subject to change  without	*
+ *   notice  and should not be construed as a commitment by Digital	*
+ *   Equipment Corporation.						*
+ *									*
+ *   Digital assumes no responsibility for the use  or  reliability	*
+ *   of its software on equipment which is not supplied by Digital.	*
+ *									*
+ ************************************************************************/
+
+/*
+ * Defines for the architected startup addresses.
+ */
+
+#define HWRPB_ADDR	0x10000000	/* 256 MB */
+#define BOOT_ADDR	0x20000000	/* 512 MB */
+#define PGTBL_ADDR	0x40000000	/*   1 GB */
+
+/*
+ * Values for the "haltcode" field in the per-cpu portion of the HWRPB
+ *
+ * Bit defines for the "sysvar" field in the HWRPB.
+ * Each platform has different values for SYSBOARD and IOBOARD bits.
+ */
+#define HALT_PWRUP	0		/* power up */
+#define HALT_OPR	1		/* operator issued halt cmd */
+#define HALT_KSTK	2		/* kernel stack not valid */
+#define HALT_SCBB	3		/* invalid SCBB */
+#define HALT_PTBR	4		/* invalid PTBR */
+#define HALT_EXE	5		/* kernel executed halt instruction */
+#define HALT_DBLE	6		/* double error abort */
+
+/*
+ * Bit defines for the "state" field in the per-cpu portion of the HWRPB
+ */
+#define STATE_BIP	0x00000001	/* bootstrap in progress */
+#define STATE_RC	0x00000002	/* restart capable */
+#define STATE_PA	0x00000004	/* processor available to OS */
+#define STATE_PP	0x00000008	/* processor present */
+#define STATE_OH	0x00000010	/* operator halted */
+#define STATE_CV	0x00000020	/* context valid */
+#define STATE_PV	0x00000040	/* PALcode valid */
+#define STATE_PMV	0x00000080	/* PALcode memory valid */
+#define STATE_PL	0x00000100	/* PALcode loaded */
+#define STATE_HALT_MASK	0x00ff0000	/* Mask for Halt Requested field */
+#define STATE_DEFAULT	0x00000000	/* Default (no specific action) */
+#define STATE_SVRS_TERM	0x00010000	/* SAVE_TERM/RESTORE_TERM Exit */
+#define STATE_COLD_BOOT	0x00020000	/* Cold Bootstrap Requested */
+#define STATE_WARM_BOOT	0x00030000	/* Warm Bootstrap Requested */
+#define STATE_HALT	0x00040000	/* Remain halted (no restart) */
+
+
+#define SV_PF_RSVD	0x00000000	/* RESERVED */
+#define SV_RESERVED	0x00000000	/* All STS bits; zero for backward compat. */
+#define SV_MPCAP	0x00000001	/* MP capable */
+#define SV_PF_UNITED	0x00000020	/* United */
+#define SV_PF_SEPARATE	0x00000040	/* Separate */
+#define SV_PF_FULLBB	0x00000060	/* Full battery backup */
+#define SV_POWERFAIL	0x000000e0	/* Powerfail implementation */
+#define SV_PF_RESTART	0x00000100	/* Powerfail restart */
+
+#define SV_GRAPHICS	0x00000200	/* Embedded graphics processor */
+
+#define SV_STS_MASK	0x0000fc00	/* STS bits - system and I/O board   */
+#define SV_SANDPIPER	0x00000400	/* others define system platforms.   */
+#define SV_FLAMINGO	0x00000800	/* STS BIT SETTINGS */
+#define SV_HOTPINK	0x00000c00	/* STS BIT SETTINGS */
+#define SV_FLAMINGOPLUS	0x00001000	/* STS BIT SETTINGS */
+#define SV_ULTRA	0x00001400	/* STS BIT SETTINGS */
+#define SV_SANDPLUS	0x00001800	/* STS BIT SETTINGS */
+#define SV_SANDPIPER45	0x00001c00	/* STS BIT SETTINGS */
+#define SV_FLAMINGO45	0x00002000	/* STS BIT SETTINGS */
+
+#define SV_SABLE	0x00000400	/* STS BIT SETTINGS */
+
+#define SV_KN20AA	0x00000400	/* STS BIT SETTINGS */
+
+/*
+ * Values for the "console type" field in the CTB portion of the HWRPB
+ */
+#define CONS_NONE	0		/* no console present */
+#define CONS_SRVC	1		/* console is service processor */
+#define CONS_DZ		2		/* console is dz/dl VT device */
+#define CONS_GRPH	3		/* cons is graphics dev w/ dz/dl keybd*/
+#define CONS_REM	4		/* cons is remote, protocal enet/MOP */
+
+/*
+ * PALcode variants that we're interested in.
+ * Used as indices into the "palrev_avail" array in the per-cpu portion
+ * of the HWRPB.
+ */
+#define PALvar_reserved	0
+#define PALvar_OpenVMS	1
+#define PALvar_OSF1	2
+
+#include <sys/types.h>
+/*
+ * The Alpha restart parameter block, which is a page or 2 in low memory
+ */
+struct rpb {
+    struct rpb *rpb_selfref;	/* 000: physical self-reference */
+    long   rpb_string;		/* 008: contains string "HWRPB" */
+    long   rpb_vers;		/* 010: HWRPB version number */
+    u_long rpb_size;		/* 018: bytes in RPB perCPU CTB CRB MEMDSC */
+    u_long rpb_cpuid;		/* 020: primary cpu id */
+    u_long rpb_pagesize;	/* 028: page size in bytes */
+    u_long rpb_addrbits;	/* 030: number of phys addr bits */
+    u_long rpb_maxasn;		/* 038: max valid ASN */
+    char   rpb_ssn[16];		/* 040: system serial num: 10 ascii chars */
+    u_long rpb_systype;		/* 050: system type */
+    long   rpb_sysvar;		/* 058: system variation */
+    long   rpb_sysrev;		/* 060: system revision */
+    u_long rpb_clock;		/* 068: scaled interval clock intr freq */
+    u_long rpb_counter;		/* 070: cycle counter frequency */
+    u_long rpb_vptb;		/* 078: virtual page table base */
+    long   rpb_res1;		/* 080: reserved */
+    u_long rpb_trans_off;	/* 088: offset to translation buffer hint */
+    u_long rpb_numprocs;	/* 090: number of processor slots */
+    u_long rpb_slotsize;	/* 098: per-cpu slot size */
+    u_long rpb_percpu_off;	/* 0A0: offset to per_cpu slots */
+    u_long rpb_num_ctb;		/* 0A8: number of CTBs */
+    u_long rpb_ctb_size;	/* 0B0: bytes in largest CTB */
+    u_long rpb_ctb_off;		/* 0B8: offset to CTB (cons term block) */
+    u_long rpb_crb_off;		/* 0C0: offset to CRB (cons routine block) */
+    u_long rpb_mdt_off;		/* 0C8: offset to memory descriptor table */
+    u_long rpb_config_off;	/* 0D0: offset to config data block */
+    u_long rpb_fru_off;		/* 0D8: offset to FRU table */
+    void   (*rpb_saveterm)();	/* 0E0: virt addr of save term routine */
+    long   rpb_saveterm_pv;	/* 0E8: proc value for save term routine */
+    void   (*rpb_rstrterm)();	/* 0F0: virt addr of restore term routine */
+    long   rpb_rstrterm_pv;	/* 0F8: proc value for restore term routine */
+    void   (*rpb_restart)();	/* 100: virt addr of CPU restart routine */
+    long   rpb_restart_pv;	/* 108: proc value for CPU restart routine */
+    long   rpb_software;	/* 110: used to determine presence of kdebug */
+    long   rpb_hardware;	/* 118: reserved for hardware */
+    long   rpb_checksum;	/* 120: checksum of prior entries in rpb */
+    long   rpb_rxrdy;		/* 128: receive ready bitmask */
+    long   rpb_txrdy;		/* 130: transmit ready bitmask */
+    u_long rpb_dsr_off;		/* 138: Dynamic System Recog. offset */
+};
+
+#define rpb_kdebug rpb_software
+
+#define OSF_HWRPB_ADDR	((vm_offset_t)(-1L << 23))
+
+/*
+ * This is the format for the boot/restart HWPCB.  It must match the
+ * initial fields of the pcb structure as defined in pcb.h, but must
+ * additionally contain the appropriate amount of padding to line up
+ * with formats used by other palcode types.
+ */
+struct bootpcb {
+    long   rpb_ksp;		/* 000: kernel stack pointer */
+    long   rpb_usp;		/* 008: user stack pointer */
+    long   rpb_ptbr;		/* 010: page table base register */
+    int    rpb_cc;		/* 018: cycle counter */
+    int    rpb_asn;		/* 01C: address space number */
+    long   rpb_proc_uniq;	/* 020: proc/thread unique value */
+    long   rpb_fen;		/* 028: floating point enable */
+    long   rpb_palscr[2];	/* 030: pal scratch area */
+    long   rpb_pcbpad[8];	/* 040: padding for fixed size */
+};
+
+/*
+ * Inter-Console Communications Buffer
+ * Used for the primary processor to communcate with the console
+ * of secondary processors.
+ */
+struct iccb {
+    u_int       iccb_rxlen;     /* receive length in bytes      */
+    u_int       iccb_txlen;     /* transmit length in bytes     */
+    char        iccb_rxbuf[80]; /* receive buffer               */
+    char        iccb_txbuf[80]; /* transmit buffer              */
+};
+
+/*
+ * The per-cpu portion of the Alpha HWRPB.
+ * Note that the main portion of the HWRPB is of variable size,
+ * hence this must be a separate structure.
+ *
+ */
+struct rpb_percpu {
+    struct bootpcb rpb_pcb;	/* 000: boot/restart HWPCB */
+    long   rpb_state;		/* 080: per-cpu state bits */
+    long   rpb_palmem;		/* 088: palcode memory length */
+    long   rpb_palscratch;	/* 090: palcode scratch length */
+    long   rpb_palmem_addr;	/* 098: phys addr of palcode mem space */
+    long   rpb_palscratch_addr;	/* 0A0: phys addr of palcode scratch space */
+    long   rpb_palrev;		/* 0A8: PALcode rev required */
+    long   rpb_proctype;	/* 0B0: processor type */
+    long   rpb_procvar;		/* 0B8: processor variation */
+    long   rpb_procrev;		/* 0C0: processor revision */
+    char   rpb_procsn[16];	/* 0C8: proc serial num: 10 ascii chars */
+    long   rpb_logout;		/* 0D8: phys addr of logout area */
+    long   rpb_logout_len;	/* 0E0: length in bytes of logout area */
+    long   rpb_haltpb;		/* 0E8: halt pcb base */
+    long   rpb_haltpc;		/* 0F0: halt pc */
+    long   rpb_haltps;		/* 0F8: halt ps */
+    long   rpb_haltal;		/* 100: halt arg list (R25) */
+    long   rpb_haltra;		/* 108: halt return address (R26) */
+    long   rpb_haltpv;		/* 110: halt procedure value (R27) */
+    long   rpb_haltcode;	/* 118: reason for halt */
+    long   rpb_software;	/* 120: for software */
+    struct iccb rpb_iccb;       /* 128: inter-console communications buffer */
+    long   rpb_palrev_avail[16];/* 1D0: PALcode revs available */
+    long   rpb_pcrsvd[6];	/* 250: reserved for arch use */
+/* the dump stack grows from the end of the rpb page not to reach here */
+};
+
+/* The firmware revision is in the (unused) first entry of palrevs available */
+#define rpb_firmrev rpb_palrev_avail[0]
+
+/*
+ * The memory cluster descriptor.
+ */
+struct rpb_cluster {
+    long   rpb_pfn;		/* 000: starting PFN of this cluster */
+    long   rpb_pfncount;	/* 008: count of PFNs in this cluster */
+    long   rpb_pfntested;	/* 010: count of tested PFNs in cluster */
+    long   rpb_va;		/* 018: va of bitmap */
+    long   rpb_pa;		/* 020: pa of bitmap */
+    long   rpb_checksum;	/* 028: checksum of bitmap */
+    long   rpb_usage;		/* 030: usage of cluster */
+};
+#define CLUSTER_USAGE_OS	((long)0)
+#define CLUSTER_USAGE_PAL	((long)1)
+#define CLUSTER_USAGE_NVRAM	((long)2)
+
+/*
+ * The "memory descriptor table" portion of the HWRPB.
+ * Note that the main portion of the HWRPB is of variable size and there is a
+ * variable number of per-cpu slots, hence this must be a separate structure.
+ * Also note that the memory descriptor table contains a fixed portion plus
+ * a variable number of "memory cluster descriptors" (one for each "cluster"
+ * of memory).
+ */
+struct rpb_mdt {
+    long   rpb_checksum;	/* 000: checksum of entire mem desc table */
+    long   rpb_impaddr;		/* 008: PA of implementation dep info */
+    long   rpb_numcl;		/* 010: number of clusters */
+    struct rpb_cluster rpb_cluster[1];	/* first instance of a cluster */
+};
+
+/*
+ * The "Console Terminal Block" portion of the HWRPB, for serial line
+ * UART console device.
+ */
+struct ctb_tt {
+    long   ctb_type;		/* 000: console type */
+    long   ctb_unit;		/* 008: console unit */
+    long   ctb_resv;		/* 010: reserved */
+    long   ctb_length;		/* 018: byte length of device dep */
+                                /* portion */
+    long   ctb_csr;		/* 020: CSR Address */
+    long   ctb_tivec;		/* 028: <63>=tie; interrupt vector */
+    long   ctb_rivec;		/* 030: <63>=rie; interrupt vector */
+    long   ctb_baud;		/* 038: baud rate */
+    long   ctb_put_sts;		/* 040: PUTS callback extended status */
+    long   ctb_get_sts;		/* 048: GETS callback extended status */
+    long   ctb_rsvd[1];		/* 050: reserved for console use */
+};
+
+/*
+ * The "Console Terminal Block" portion of the HWRPB.
+ */
+struct rpb_ctb {
+    long   rpb_type;		/* 000: console type */
+    long   rpb_unit;		/* 008: console unit */
+    long   rpb_resv;		/* 010: reserved */
+    long   rpb_length;		/* 018: byte length of device dep portion */
+    long   rpb_first;		/* 000: first field of device dep portion */
+};
+
+/*
+ * The physical/virtual map for the console routine block.
+ */
+struct rpb_map {
+        long	rpb_virt;		/* virtual address for map entry */
+        long	rpb_phys;		/* phys address for map entry */
+        long	rpb_pgcount;		/* page count for map entry */
+};
+
+/*
+ * The "Console Routine Block" portion of the HWRPB.
+ * Note: the "offsets" are all relative to the start of the HWRPB (HWRPB_ADDR).
+ */
+struct rpb_crb {
+        long	rpb_va_disp;		/* va of call-back dispatch rtn */
+        long	rpb_pa_disp;		/* pa of call-back dispatch rtn */
+        long	rpb_va_fixup;		/* va of call-back fixup rtn */
+        long	rpb_pa_fixup;		/* pa of call-back fixup rtn */
+        long	rpb_num;		/* number of entries in phys/virt map */
+        long	rpb_mapped_pages;	/* Number of pages to be mapped */
+        struct	rpb_map rpb_map[1];	/* first instance of a map entry */
+};
+
+/*
+ * These macros define where within the HWRPB the CTB and CRB are located.
+ */
+#define CTB_SETUP ((struct rpb_ctb *) ((long)hwrpb_addr + 	\
+                        (long)(hwrpb_addr->rpb_ctb_off)))
+#define CRB_SETUP ((struct rpb_crb *) ((long)hwrpb_addr + 	\
+                        (long)(hwrpb_addr->rpb_crb_off)))
+
+/*
+ * The "Dynamic System Recognition" portion of the HWRPB.
+ * It is used to obtain the platform specific data need to allow
+ * the platform define the platform name, the platform SMM and LURT
+ * data for software licensing
+ */
+struct rpb_dsr {
+        long	rpb_smm;		/* SMM nubber used by LMF	*/
+        u_long	rpb_lurt_off;		/* offset to LURT table		*/
+        u_long	rpb_sysname_off;	/* offset to sysname char count	*/
+        int	lurt[10];		/* XXM has one LURT entry	*/
+};
diff --git a/system/alpha/h/server_t.h b/system/alpha/h/server_t.h
new file mode 100644
index 000000000..5775a9522
--- /dev/null
+++ b/system/alpha/h/server_t.h
@@ -0,0 +1,61 @@
+#ifndef	__SERVERTYPES_H_LOADED
+#define	__SERVERTYPES_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: server_t.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+/*
+ * This file contains named types used by the server.
+ * $Log: server_t.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/11/08  21:44:17  fdh
+ * Include lib.h
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/06/03  20:13:54  fdh
+ * Properly handle this header file when included multiple times.
+ *
+ * Revision 1.1  1994/03/09  12:48:33  berent
+ * Initial revision
+ *
+ */
+
+#include "lib.h"
+
+typedef ul address_value;
+typedef ul register_value;
+typedef ui instruction_value;
+
+#endif /* __SERVERTYPES_H_LOADED */
diff --git a/system/alpha/h/ssb.h b/system/alpha/h/ssb.h
new file mode 100644
index 000000000..057f2dca5
--- /dev/null
+++ b/system/alpha/h/ssb.h
@@ -0,0 +1,183 @@
+#ifndef __SSB_H_LOADED
+#define __SSB_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: ssb.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: ssb.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:16  fdh
+ * Initial revision
+ *
+ */
+
+
+
+/* ssbinit 						*/
+/* Set up SSB definitions				*/
+/* Last modified on 1/3/91 by L. Stewart		*/
+
+#define SSB_stcreset1  0x0800	/*  CR_DIR */
+#define SSB_stcreset2  0x3820	/* CR_CABEN | CR_AUTO | CR_DIR */
+                                        /*  |  CR_FIFOMR */
+
+#define SSB_TagCable	 0
+#define SSB_TagSlot	 3
+#define SSB_TagTVA	 2
+#define SSB_TagRFA	 1
+#define SSB_TagORF	 5
+#define SSB_TagStartTV	 4
+#define SSB_TagTVStat	 6
+#define SSB_TagLocalStat 7
+
+#define SSB_AdrLocalStat 0x4000
+#define SSB_AdrSRA 0x8000
+#define SSB_AdrSRB 0x8001
+
+#define SSB_LCRenable	0x1
+#define SSB_LCRclrstat	0x2
+#define SSB_LCRfifomr	0x4
+#define SSB_LCRreset	0x8
+#define SSB_LCRled	0x10
+
+#define SSB_LSTfifoff	 0x100
+#define SSB_LSTfifohf	 0x200
+#define SSB_LSTfifoef	 0x400
+#define SSB_LSTinst	 0x800
+#define SSB_LSTid	 0x1000
+#define SSB_LSTotherinst 0x2000
+#define SSB_LSTcnfg0	 0x4000
+#define SSB_LSTcnfg1     0x8000
+#define SSB_LSTnode	 0xf000
+
+#define SSB_CRrParityS	 0x01
+#define SSB_CRdataWP	 0x02
+#define SSB_CRadrWP	 0x04
+#define SSB_CRerrEnable	 0x08
+#define SSB_CRreset	 0x10
+#define SSB_CRdoConfig	 0x20
+#define SSB_CRnodeClock	 0x40
+
+#define SSB_SRAshared	 0x00000080
+#define SSB_SRAdirty	 0x00100000
+#define SSB_SRAnType	 0x80000000
+
+#define SSB_PSRinst	 0x001
+#define SSB_PSRmerror	 0x002
+#define SSB_PSRreset	 0x004
+#define SSB_PSRerror	 0x008
+#define SSB_PSRserror	 0x010
+#define SSB_PSRisr	 0x7e0
+
+struct SSB_lsrtype {
+        unsigned	sequence : 8;
+        unsigned	slot : 8;
+        unsigned	mix : 4;
+        unsigned	inst : 1;
+        unsigned	ef : 1;
+        unsigned	hf : 1;
+        unsigned	ff : 1;
+        unsigned	crpad : 3;
+        unsigned	crled : 1;
+        unsigned	crreset : 1;
+        unsigned	crfifomr : 1;
+        unsigned	crclrstat : 1;
+        unsigned	crenable : 1;
+};
+
+struct SSB_pstattype {
+        unsigned	pad : 21;
+        unsigned	isr : 6;
+        unsigned	serror : 1;
+        unsigned	error : 1;
+        unsigned	reset : 1;
+        unsigned	merror : 1;
+        unsigned	inst : 1;
+};
+
+struct SSB_sratype {
+        unsigned	nodeType : 1;
+        unsigned	p0stat: 11;
+        unsigned	dirty : 1;
+        unsigned	p1stat : 11;
+        unsigned	shared : 1;
+        unsigned	cr : 7;
+};
+
+struct SSB_srbtype {
+        unsigned	p1count : 8;
+        unsigned	p0count : 8;
+        unsigned	arbcount : 16;
+};
+
+extern int ssb_sequence;
+extern int ssb_localcr;
+extern int ssb_maincr;
+extern int ssb_port;
+extern int ssb_node;
+extern int ssb_config1;
+extern int ssb_config0;
+extern int ssb_lastsra;
+extern int ssb_lastsrb;
+extern int ssb_lastlsr;
+extern int ssb_lastieecc;
+extern struct SSB_lsrtype ssb_lsr;
+extern int ssb_mix;
+extern struct SSB_sratype ssb_sra;
+extern struct SSB_srbtype ssb_srb;
+extern int ssb_resid;
+extern struct SSB_pstattype ssb_portstatus;
+
+
+/* ssb routines */
+#define SSB_CR  SSB_stcreset2
+#define SSBCH   1020
+
+#define SSB_CABLE(x) (wfifo(x, SSB_TagCable))
+#define SSB_LDSLOT(x) (wfifo(x, SSB_TagSlot))
+#define SSB_LDTVA(x, w) (wfifo((x) | ((w) ? 0x80000000 : 0), SSB_TagTVA))
+#define SSB_LDRFA(a, c) (wfifo(((255 - c) << 16) + a, SSB_TagRFA))
+#define SSB_LDORF(x) (wfifo(x, SSB_TagORF))
+#define SSB_STARTTV(a, c, w) (wfifo(( (w << 15) | ((255 - c) << 16) | a), SSB_TagStartTV ))
+#define SSB_TVSTAT(x) (wfifo(x, SSB_TagTVStat))
+#define SSB_LOCALSTAT(x) (wfifo(x, SSB_TagLocalStat))
+
+#define SSB_CFF() ( STC_SETCR(tvp->crmask & ~STC_CRFIFOMR), \
+    STC_SETCR(tvp->crmask | STC_CRFIFOMR) )
+
+#endif /* __SSB_H_LOADED */
diff --git a/system/alpha/h/sys.h b/system/alpha/h/sys.h
new file mode 100644
index 000000000..cc72ec1e6
--- /dev/null
+++ b/system/alpha/h/sys.h
@@ -0,0 +1,253 @@
+#ifndef	__SYS_H_LOADED
+#define	__SYS_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: sys.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: sys.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:16  fdh
+ * Initial revision
+ *
+ */
+
+/*
+**++
+*****************************************************************************
+**									    *
+**  Copyright (c) 1992							    *
+**  by Digital Equipment Corporation, Maynard, Ma.			    *
+** 									    *
+**  This software is furnished under a license and may be used and  copied  *
+**  only  in  accordance  with  the  terms  of  such  license and with the  *
+**  inclusion of the above copyright notice.  This software or  any  other  *
+**  copies  thereof may not be provided or otherwise made available to any  *
+**  other person.  No title to and ownership of  the  software  is  hereby  *
+**  transferred.							    *
+** 									    *
+**  The information in this software is subject to change  without  notice  *
+**  and  should  not  be  construed  as  a commitment by Digital Equipment  *
+**  Corporation.							    *
+** 									    *
+**  Digital assumes no responsibility for the use or  reliability  of  its  *
+**  software on equipment which is not supplied by Digital.		    *
+**									    *
+*****************************************************************************
+**
+**  FACILITY:
+**
+**	sys.h
+**
+**  MODULE DESCRIPTION:
+**
+**      DECchip 21064 Evaluation and Development System (ED64)
+**	specific definitions.
+**
+**  CREATION DATE:  17-Nov-1992
+**
+**  DESIGN ISSUES:
+**
+**      {@tbs@}
+**
+**  [@optional module tags@]...
+**
+**  MODIFICATION HISTORY:
+**
+**      Who	When		What
+**	-----	-----------	---------------------------------------------
+**	ES	12-Jan-1993	Add SYS$K_HIER_CRE
+**	ES	14-Jan-1993	Add some impure area symbols
+**	ES	15-Jan-1993	Can't use # for comments on defines
+**	ES	20-Jan-1993	Put in intmask
+**	ES	27-Jan-1993	SYS$K_HIERW_CRE is covered by abox control
+**--
+*/
+
+/*
+**
+**  External cache (Bcache) definitions:
+**
+*/
+#define BC$M_PA_DIS	    0x000E  /* Cache only 1st quadrant of PA space */
+#define BC$M_SIZE	    0x2000  /* External cache size = 512K bytes */
+#define BC$M_WE_CTL4	    0x0000  /* External cache write control */
+#define BC$M_WE_CTL3	    0x0000  /* Write pulse on 3rd, 4th & 5th cycle */
+#define BC$M_WE_CTL2	    0x0001
+#define BC$M_WE_CTL1	    0xC000
+#define BC$M_WR_SPD	    0x0600  /* External cache write speed = 7 cycles */
+#define BC$M_RD_SPD	    0x0040  /* External cache read speed = 5 cycles */
+#define BC$M_ENA	    0x0001  /* External cache enable */
+
+/*
+**  We may want to move the BIU$M_INIT definitions to another module
+**  that contains user configurable options.
+*/
+#define BIU$M_INIT_47_32    BC$M_PA_DIS
+
+#define BIU$M_INIT_31_16    BC$M_SIZE	 | \
+                            BC$M_WE_CTL4 | \
+                            BC$M_WE_CTL3 | \
+                            BC$M_WE_CTL2
+
+#define BIU$M_INIT_15_00    BC$M_WE_CTL1 | \
+                            BC$M_WR_SPD	 | \
+                            BC$M_RD_SPD	 | \
+                            BC$M_ENA
+/*
+** Interrupt Mask
+** ED64 specific IRQ pins are:
+**               IRQ0            PIC     ipl <=2
+**               IRQ1            NMI     disabled
+**               IRQ2            RTC     ipl <= 4
+*/
+#define	SYS$M_HIGHINTMASK   0x00000008
+#define SYS$M_LOWINTMASK    0x080A0A0A
+
+/*
+**
+**  SCB offsets
+**
+*/
+#define	SCB$Q_PROCMCHK		0x0670   /* Offset for mchk */
+#define	SCB$Q_SYSERR		0x0620   /* Offset for sce */
+
+
+/*
+**
+**  Machine Check Rev level
+**
+*/
+#define	MCHK$K_REV		0x0001
+
+/*
+**
+**  Short logout frame
+**
+*/
+#define LAS$Q_BASE		0x0000	/* Base relative to logout area */
+
+#define	LAS$L_FRAME		0x0000
+#define	LAS$L_FLAG		0x0004
+#define	LAS$L_CPU		0x0008
+#define	LAS$L_SYS		0x000C
+#define	LAS$Q_MCHK_CODE		0x0010
+
+#define	LAS$Q_BIU_STAT		0x0018
+#define	LAS$Q_BIU_ADDR		0x0020
+#define	LAS$Q_DC_STAT		0x0028
+#define	LAS$Q_FILL_SYNDROME	0x0030
+#define	LAS$Q_FILL_ADDR		0x0038
+#define	LAS$Q_BC_TAG		0x0040
+
+#define	LAS$K_SIZE		0x0048	/* Frame size */
+
+/*
+**
+**  Long logout frame
+**
+*/
+#define LAF$Q_BASE		LAS$K_SIZE  /* Base relative to logout area */
+
+#define	LAF$L_FRAME		0x0000
+#define	LAF$L_FLAG		0x0004
+#define	LAF$L_CPU		0x0008
+#define	LAF$L_SYS		0x000C
+
+#define	LAF$Q_PT0		0x0010
+#define	LAF$Q_PT1		0x0018
+#define	LAF$Q_PT2		0x0020
+#define	LAF$Q_PT3		0x0028
+#define	LAF$Q_PT4		0x0030
+#define	LAF$Q_PT5		0x0038
+#define	LAF$Q_PT6		0x0040
+#define	LAF$Q_PT7		0x0048
+#define	LAF$Q_PT8		0x0050
+#define	LAF$Q_PT9		0x0058
+#define	LAF$Q_PT10		0x0060
+#define	LAF$Q_PT11		0x0068
+#define	LAF$Q_PT12		0x0070
+#define	LAF$Q_PT13		0x0078
+#define	LAF$Q_PT14		0x0080
+#define	LAF$Q_PT15		0x0088
+#define	LAF$Q_PT16		0x0090
+#define	LAF$Q_PT17		0x0098
+#define	LAF$Q_PT18		0x00A0
+#define	LAF$Q_PT19		0x00A8
+#define	LAF$Q_PT20		0x00B0
+#define	LAF$Q_PT21		0x00B8
+#define	LAF$Q_PT22		0x00C0
+#define	LAF$Q_PT23		0x00C8
+#define	LAF$Q_PT24		0x00D0
+#define	LAF$Q_PT25		0x00D8
+#define	LAF$Q_PT26		0x00E0
+#define	LAF$Q_PT27		0x00E8
+#define	LAF$Q_PT28		0x00F0
+#define	LAF$Q_PT29		0x00F8
+#define	LAF$Q_PT30		0x0100
+#define	LAF$Q_PT31		0x0108
+
+#define LAF$Q_EXC_ADDR		0x0110
+#define LAF$Q_PAL_BASE		0x0130
+#define LAF$Q_HIER		0x0138
+#define LAF$Q_HIRR		0x0140
+#define LAF$Q_MM_CSR		0x0148
+#define LAF$Q_DC_STAT		0x0150
+#define LAF$Q_DC_ADDR		0x0158
+#define LAF$Q_ABOX_CTL		0x0160
+#define LAF$Q_BIU_STAT		0x0168
+#define LAF$Q_BIU_ADDR		0x0170
+#define LAF$Q_BIU_CTL		0x0178
+#define LAF$Q_FILL_SYNDROME	0x0180
+#define LAF$Q_FILL_ADDR		0x0188
+#define LAF$Q_VA		0x0190
+#define LAF$Q_BC_TAG		0x0198
+
+#define LAF$K_SIZE		0x01A0	    /* Frame size */
+
+#define LAF$Q_SYS_BASE		0x01A0	    /* Currently no system stuff */
+
+/*
+**
+**  Impure Area Offset Definitions
+**
+*/
+#define IMP$Q_ABOX_CTL		0x0380
+#define IMP$Q_BIU_CTL		0x0388
+#define IMP$Q_LOGOUT_AREA	0x2000
+
+#endif				/* __SYS_H_LOADED */
diff --git a/system/alpha/h/system.h b/system/alpha/h/system.h
new file mode 100644
index 000000000..de35b4451
--- /dev/null
+++ b/system/alpha/h/system.h
@@ -0,0 +1,89 @@
+#ifndef __SYSTEM_H_LOADED
+#define __SYSTEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: system.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $;
+ */
+
+/*
+ * $Log: system.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/06/08  18:42:05  berc
+ * Initial revision
+ *
+ * Revision 1.10  1994/12/08  16:42:29  fdh
+ * Added includes for eb66p.h and eb64l.h
+ *
+ * Revision 1.9  1994/11/23  19:45:52  cruz
+ * Added eb164.h
+ *
+ * Revision 1.8  1994/11/08  21:44:50  fdh
+ * Removed special compiler definitions.  They now only
+ * appear in lib.h
+ *
+ * Revision 1.7  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.6  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.5  1994/06/17  19:34:01  fdh
+ * Clean-up...
+ *
+ * Revision 1.4  1994/03/16  00:12:31  fdh
+ * Use TRUE and FALSE defines for all environments.
+ *
+ * Revision 1.3  1994/01/19  10:22:28  rusling
+ * Ported to ALpha Windows NT.
+ *
+ * Revision 1.2  1993/11/22  13:17:13  rusling
+ * Merged with PCI/21040 changes.
+ *
+ * Revision 1.1  1993/11/22  11:44:09  rusling
+ * Initial revision
+ *
+ * Revision 1.1  1993/11/22  11:44:09  rusling
+ * Initial revision
+ *
+ */
+
+
+/*
+ * Per evaluation board include files
+ */
+#include "eb64.h"
+#include "eb66.h"
+#include "eb66p.h"
+#include "eb64p.h"
+#include "eb64l.h"
+#include "eb164.h"
+#include "xxm.h"
+
+#endif /* __SYSTEM_H_LOADED */
diff --git a/system/alpha/h/tftp.h b/system/alpha/h/tftp.h
new file mode 100644
index 000000000..7fd6b6ae4
--- /dev/null
+++ b/system/alpha/h/tftp.h
@@ -0,0 +1,87 @@
+#ifndef __TFTP_H_LOADED
+#define __TFTP_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: tftp.h,v 1.1.1.1 1997/10/30 23:27:17 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     TFTP protocol interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: tftp.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:17  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.1  1993/08/06  10:46:21  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+/* tftp_load - load a file from a remote host
+ *
+ * Arguments:
+ *     device_no       - device on which request should be sent
+ *     file_name       - name of file to be loaded. Null terminated;
+ *     server_addr     - server IP address
+ *     load_addr       - address of start of region into which the file should be loaded.
+ *
+ * Returned value:
+ *     TRUE   - tftp successful.
+ *     FALSE  - tftp failed.
+ */
+extern int tftp_load(int device_no,
+                      char file_name[128],
+                      ip_addr server_addr,
+                      unsigned char * load_addr);
+/* tftp_init_module - initialise the module
+ */
+extern void tftp_init_module(void);
+
+
+#endif /* __TFTP_H_LOADED */
diff --git a/system/alpha/h/tga.h b/system/alpha/h/tga.h
new file mode 100644
index 000000000..d3abb359a
--- /dev/null
+++ b/system/alpha/h/tga.h
@@ -0,0 +1,716 @@
+/*
+ * @DEC_COPYRIGHT@
+ */
+/*
+ * HISTORY
+ * $Log: tga.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1.9.2  1995/04/24  23:34:47  Jeff_Colburn
+ * 	Add support for shared interrupts, ISR's now have a return value
+ * 	of INTR_SERVICED or INTR_NOT_SERVICED. Changed return type from "void"
+ * 	to "int" for interrupt return type in "tga_info_t".
+ * 	[1995/04/24  23:24:12  Jeff_Colburn]
+ *
+ * Revision 1.1.7.2  1994/11/07  23:31:23  Jeff_Colburn
+ * 	Added defines for putting TGA in Copy mode to support console scrolling fix.
+ * 	[1994/10/26  22:32:00  Jeff_Colburn]
+ *
+ * Revision 1.1.5.5  1994/05/16  19:29:08  Monty_Brandenberg
+ * 	Add dma_map_info_t to the info struct.
+ * 	[1994/05/12  05:31:19  Monty_Brandenberg]
+ *
+ * Revision 1.1.5.4  1994/04/19  21:59:33  Stuart_Hollander
+ * 	merge agoshw2 bl5 to gold bl10
+ * 	Revision 1.1.2.4  1994/04/14  20:17:15  Monty_Brandenberg
+ * 	T32-88 Framebuffer offset was incorrect causing obscure z buffering
+ * 	problems in pex.
+ * 	[1994/04/14  19:17:10  Monty_Brandenberg]
+ *
+ * Revision 1.1.5.3  1994/04/11  12:58:27  Stuart_Hollander
+ * 	Revision 1.1.2.3  1994/02/28  16:53:52  Monty_Brandenberg
+ * 	Removed a few magic numbers from the code and made symbolics out of
+ * 	them.
+ * 	[1994/02/23  21:09:10  Monty_Brandenberg]
+ *
+ * 	Add header files we need to define structures.  Added two new ioctls
+ * 	to extract direct dma mapping info.  SFB+ and TGA ioctl structures
+ * 	are now incompatible.  Fixed truecolor index and private ioctl code.
+ * 	[1994/02/04  21:10:07  Monty_Brandenberg]
+ *
+ * 	Removed two interrupt sources as per spec.  Fixed the RAMDAC access
+ * 	macros to actually work.  Imagine.
+ * 	[1994/02/02  23:16:55  Monty_Brandenberg]
+ *
+ * 	Converted to use io_handles.  Needs work on DMA
+ * 	[1994/01/07  21:14:33  Monty_Brandenberg]
+ *
+ * 	Added support for 24-plane option using BT463 and custom cursor chip.
+ * 	Converted to fully prototyped functions.  Started conversion to
+ * 	io_handle structure.
+ * 	[1994/01/06  21:15:14  Monty_Brandenberg]
+ *
+ * Revision 1.1.5.2  1994/01/23  21:16:19  Stuart_Hollander
+ * 	merge from hw2 to goldbl8
+ * 	[1993/12/29  12:57:23  Stuart_Hollander]
+ *
+ * Revision 1.1.2.2  1993/12/21  13:42:28  Monty_Brandenberg
+ * 	Initial version of the TGA device driver.
+ * 	[1993/12/14  00:22:06  Monty_Brandenberg]
+ *
+ * $EndLog$
+ */
+/*
+ * @(#)$RCSfile: tga.h,v $ $Revision: 1.1.1.1 $ (DEC) $Date: 1997/10/30 23:27:18 $
+ */
+
+/************************************************************************
+ *									*
+ *			Copyright (c) 1993 by				*
+ *		Digital Equipment Corporation, Maynard, MA		*
+ *			All rights reserved.				*
+ *									*
+ *   This software is furnished under a license and may be used and	*
+ *   copied  only  in accordance with the terms of such license and	*
+ *   with the  inclusion  of  the  above  copyright  notice.   This	*
+ *   software  or  any  other copies thereof may not be provided or	*
+ *   otherwise made available to any other person.  No title to and	*
+ *   ownership of the software is hereby transferred.			*
+ *									*
+ *   The information in this software is subject to change  without	*
+ *   notice  and should not be construed as a commitment by Digital	*
+ *   Equipment Corporation.						*
+ *									*
+ *   Digital assumes no responsibility for the use  or  reliability	*
+ *   of its software on equipment which is not supplied by Digital.	*
+ *									*
+ ************************************************************************/
+
+/*
+ * RAMDAC is a trademark of Brooktree Corporation
+ */
+
+#ifndef TGA_DEFINED
+#define TGA_DEFINED
+
+/*
+ * Header files
+ */
+#if 0
+#include <sys/types.h>
+#include <sys/ioctl.h>
+#include <sys/workstation.h>
+#include <sys/inputdevice.h>
+#include <sys/wsdevice.h>
+#include <io/common/devdriver.h>
+#endif					/* 0 */
+
+/*
+ * Special offsets within the PCI configuration header
+ */
+#define TGA_CONFIG_PVRR_OFFSET		0x00000040
+#define TGA_CONFIG_PAER_OFFSET		0x00000044
+
+/*
+ * PAER values
+ */
+#define TGA_CONFIG_PAER_32MB		0x00000000
+#define TGA_CONFIG_PAER_64MB		0x00010000
+#define TGA_CONFIG_PAER_128MB		0x00030000
+
+/*
+ * Offsets within Memory Space
+ */
+#define TGA_ROM_OFFSET			0x000000
+#define TGA_ASIC_OFFSET			0x100000
+#define TGA_RAMDAC_SETUP_OFFSET		0x1000c0
+#define TGA_RAMDAC_DATA_OFFSET		0x1001f0
+#define TGA_XY_REG_OFFSET		0x100074
+#define TGA_VALID_REG_OFFSET		0x100070
+
+#define TGA_0_0_FB_OFFSET		0x00200000
+#define TGA_0_0_FB_SIZE			0x00200000
+#define TGA_0_1_FB_OFFSET		0x00400000
+#define TGA_0_1_FB_SIZE			0x00400000
+#define TGA_0_3_FB_OFFSET		0x00800000
+#define TGA_0_3_FB_SIZE			0x00800000
+#define TGA_1_3_FB_OFFSET		0x00800000
+#define TGA_1_3_FB_SIZE			0x00800000
+#define TGA_1_7_FB_OFFSET		0x01000000
+#define TGA_1_7_FB_SIZE			0x01000000
+#define TGA_INVALID_FB_OFFSET		0
+#define TGA_INVALID_FB_SIZE		0
+
+/*
+ * TGA card types
+ */
+#define TGA_TYPE_T801			0
+#define TGA_TYPE_T802			1
+#define TGA_TYPE_T822			2
+#define TGA_TYPE_T844			3
+#define TGA_TYPE_T3204			4
+#define TGA_TYPE_T3208			5
+#define TGA_TYPE_T3288			6
+#define TGA_TYPE_INVALID		7
+#define TGA_TYPE_NUM			8
+
+#ifndef NDEPTHS
+#define NDEPTHS 1			/* all current hardware just has one */
+#define NVISUALS 1
+#endif					/* NDEPTHS */
+
+typedef unsigned char tga_pix8_t;
+typedef unsigned int tga_pix32_t;
+typedef unsigned int tga_reg_t;
+
+/*
+ * Window tags definitions
+ */
+#define TGA_TRUECOLOR_WID_INDEX		0xc
+#define TGA_TRUECOLOR_WID_MASK		0xc0000000
+
+#if 0
+/*
+ * Device-private ioctls
+ */
+#define TGA_IOCTL_PRIVATE		_IOWR('w', (0|IOC_S), tga_ioc_t)
+#define TGA_IOC_LOAD_WINDOW_TAGS	0
+#define TGA_IOC_ENABLE_DMA_OPS		1
+#define TGA_IOC_SET_STEREO_MODE		2
+#define TGA_IOC_GET_STEREO_MODE		3
+#define TGA_IOC_GET_DIRECT_DMA_COUNT	4
+#define TGA_IOC_GET_DIRECT_DMA_INFO	5
+
+typedef struct {
+    char windex;
+    unsigned char low;
+    unsigned char mid;
+    unsigned char high;
+} tga_window_tag_cell_t;
+
+typedef struct {
+    short ncells;
+    short start;
+    tga_window_tag_cell_t *p_cells;
+} tga_ioc_window_tag_t;
+
+typedef struct {
+    vm_offset_t phys_base;
+    vm_offset_t bus_base;
+    vm_size_t map_size;
+} tga_dma_map_t;
+
+typedef struct {
+    int alloc_map_num;			/* input */
+    int actual_map_num;			/* output */
+    tga_dma_map_t *maps;		/* input & output */
+} tga_ioc_dma_info_t;
+
+typedef struct {
+    short screen;
+    short cmd;
+    union {
+        tga_ioc_window_tag_t window_tag;
+        unsigned int stereo_mode;
+#define TGA_IOC_STEREO_NONE		0
+#define TGA_IOC_STEREO_24		1
+
+int direct_dma_count;
+        tga_ioc_dma_info_t direct_dma_info;
+    } data;
+} tga_ioc_t;
+#endif					/* 0 */
+
+typedef struct {
+    unsigned deep : 1;
+    unsigned mbz0 : 1;
+    unsigned mask : 3;
+    unsigned block : 4;
+    unsigned col_size : 1;
+    unsigned sam_size : 1;
+    unsigned parity : 1;
+    unsigned write_en : 1;
+    unsigned ready : 1;
+    unsigned slow_dac : 1;
+    unsigned dma_size : 1;
+    unsigned sync_type : 1;
+    unsigned mbz1 : 15;
+} tga_deep_reg_t;
+
+#define TGA_DEEP_DEEP_8PLANE		0
+#define TGA_DEEP_DEEP_32PLANE		1
+
+#define TGA_DEEP_MASK_4MB		0x00
+#define TGA_DEEP_MASK_8MB		0x01
+#define TGA_DEEP_MASK_16MB		0x03
+#define TGA_DEEP_MASK_32MB		0x07
+
+#define TGA_DEEP_PARITY_ODD		0
+#define TGA_DEEP_PARITY_EVEN		1
+
+#define TGA_DEEP_READY_ON_8		0
+#define TGA_DEEP_READY_ON_2		1
+
+#define TGA_DEEP_DMA_64			0
+#define TGA_DEEP_DMA_128		1
+
+typedef struct {
+    unsigned s_wr_mask : 8;
+    unsigned s_rd_mask : 8;
+    unsigned s_test : 3;
+    unsigned s_fail : 3;
+    unsigned d_fail : 3;
+    unsigned d_pass : 3;
+    unsigned z_test : 3;
+    unsigned z : 1;
+} tga_stencil_mode_reg_t;
+
+#define TGA_SM_TEST_GEQ			0x00
+#define TGA_SM_TEST_TRUE		0x01
+#define TGA_SM_TEST_FALSE		0x02
+#define TGA_SM_TEST_LS			0x03
+#define TGA_SM_TEST_EQ			0x04
+#define TGA_SM_TEST_LEQ			0x05
+#define TGA_SM_TEST_GT			0x06
+#define TGA_SM_TEST_NEQ			0x07
+
+#define TGA_SM_RESULT_KEEP		0x00
+#define TGA_SM_RESULT_ZERO		0x01
+#define TGA_SM_RESULT_REPLACE		0x02
+#define TGA_SM_RESULT_INCR		0x03
+#define TGA_SM_RESULT_DECR		0x04
+#define TGA_SM_RESULT_INV		0x05
+
+#define TGA_SM_Z_REPLACE		0
+#define TGA_SM_Z_KEEP			1
+
+typedef struct {
+    unsigned mode : 8;
+    unsigned visual : 3;
+    unsigned rotate : 2;
+    unsigned line : 1;
+    unsigned z16 : 1;
+    unsigned cap_ends : 1;
+    unsigned mbz : 16;
+} tga_mode_reg_t;
+
+#define TGA_MODE_MODE_SIMPLE			0x00
+#define TGA_MODE_MODE_Z_SIMPLE			0x10
+#define TGA_MODE_MODE_OPA_STIP			0x01
+#define TGA_MODE_MODE_OPA_FILL			0x21
+#define TGA_MODE_MODE_TRA_STIP			0x05
+#define TGA_MODE_MODE_TRA_FILL			0x25
+#define TGA_MODE_MODE_TRA_BLK_STIP		0x0d
+#define TGA_MODE_MODE_TRA_BLK_FILL		0x2d
+#define TGA_MODE_MODE_OPA_LINE			0x02
+#define TGA_MODE_MODE_TRA_LINE			0x06
+#define TGA_MODE_MODE_CINT_TRA_LINE		0x0e
+#define TGA_MODE_MODE_CINT_TRA_DITH_LINE	0x2e
+#define TGA_MODE_MODE_Z_OPA_LINE		0x12
+#define TGA_MODE_MODE_Z_TRA_LINE		0x16
+#define TGA_MODE_MODE_Z_CINT_OPA_LINE		0x1a
+#define TGA_MODE_MODE_Z_SINT_OPA		0x5a
+#define TGA_MODE_MODE_Z_CINT_OPA_DITH_LINE	0x3a
+#define TGA_MODE_MODE_Z_CINT_TRA_LINE		0x1e
+#define TGA_MODE_MODE_Z_SINT_TRA		0x5e
+#define TGA_MODE_MODE_Z_CINT_TRA_DITH_LINE	0x3e
+#define TGA_MODE_MODE_COPY			0x07
+#define TGA_MODE_MODE_COPY24                    0x307
+#define TGA_MODE_MODE_DMA_READ			0x17
+#define TGA_MODE_MODE_DMA_READ_DITH		0x37
+#define TGA_MODE_MODE_DMA_WRITE			0x1f
+
+#define TGA_MODE_VISUAL_8_PACKED		0x00
+#define TGA_MODE_VISUAL_8_UNPACKED		0x01
+#define TGA_MODE_VISUAL_12_LOW			0x02
+#define TGA_MODE_VISUAL_12_HIGH			0x06
+#define TGA_MODE_VISUAL_24			0x03
+
+#define TGA_MODE_PM_IS_PERS			0x00800000
+#define TGA_MODE_ADDR_IS_NEW			0x00400000
+#define TGA_MODE_BRES3_IS_NEW			0x00200000
+#define TGA_MODE_COPY_WILL_DRAIN		0x00100000
+
+typedef struct {
+    unsigned opcode : 4;
+    unsigned mbz : 4;
+    unsigned visual : 2;
+    unsigned rotate : 2;
+} tga_raster_op_t;
+
+#define TGA_ROP_OP_CLEAR			0
+#define TGA_ROP_OP_AND				1
+#define TGA_ROP_OP_AND_REVERSE			2
+#define TGA_ROP_OP_COPY				3
+#define TGA_ROP_OP_COPY24                       0x303
+#define TGA_ROP_OP_AND_INVERTED			4
+#define TGA_ROP_OP_NOOP				5
+#define TGA_ROP_OP_XOR				6
+#define TGA_ROP_OP_OR				7
+#define TGA_ROP_OP_NOR				8
+#define TGA_ROP_OP_EQUIV			9
+#define TGA_ROP_OP_INVERT			10
+#define TGA_ROP_OP_OR_REVERSE			11
+#define TGA_ROP_OP_COPY_INVERTED		12
+#define TGA_ROP_OP_OR_INVERTED			13
+#define TGA_ROP_OP_NAND				14
+#define TGA_ROP_OP_SET				15
+
+#define TGA_ROP_VISUAL_8_PACKED			0x00
+#define TGA_ROP_VISUAL_8_UNPACKED		0x01
+#define TGA_ROP_VISUAL_12			0x02
+#define TGA_ROP_VISUAL_24			0x03
+
+#define TGA_INTR_VSYNC				0x00000001
+#define TGA_INTR_SHIFT_ADDR			0x00000002
+#define TGA_INTR_TIMER				0x00000010
+#define TGA_INTR_ALL				0x00000013
+#define TGA_INTR_ENABLE_SHIFT			16
+
+#define TGA_RAMDAC_INTERF_WRITE_SHIFT		0
+#define TGA_RAMDAC_INTERF_READ0_SHIFT		16
+#define TGA_RAMDAC_INTERF_READ1_SHIFT		24
+
+#define TGA_RAMDAC_485_READ			0x01
+#define TGA_RAMDAC_485_WRITE			0x00
+
+#define TGA_RAMDAC_485_ADDR_PAL_WRITE		0x00
+#define TGA_RAMDAC_485_DATA_PAL			0x02
+#define TGA_RAMDAC_485_PIXEL_MASK		0x04
+#define TGA_RAMDAC_485_ADDR_PAL_READ		0x06
+#define TGA_RAMDAC_485_ADDR_CUR_WRITE		0x08
+#define TGA_RAMDAC_485_DATA_CUR			0x0a
+#define TGA_RAMDAC_485_CMD_0			0x0c
+#define TGA_RAMDAC_485_ADDR_CUR_READ		0x0e
+#define TGA_RAMDAC_485_CMD_1			0x10
+#define TGA_RAMDAC_485_CMD_2			0x12
+#define TGA_RAMDAC_485_STATUS			0x14
+#define TGA_RAMDAC_485_CMD_3			0x14
+#define TGA_RAMDAC_485_CUR_RAM			0x16
+#define TGA_RAMDAC_485_CUR_LOW_X		0x18
+#define TGA_RAMDAC_485_CUR_HIGH_X		0x1a
+#define TGA_RAMDAC_485_CUR_LOW_Y		0x1c
+#define TGA_RAMDAC_485_CUR_HIGH_Y		0x1e
+
+#define TGA_RAMDAC_485_ADDR_EPSR_SHIFT		0
+#define TGA_RAMDAC_485_ADDR_EPDR_SHIFT		8
+
+#define TGA_RAMDAC_463_HEAD_MASK		0x01
+#define TGA_RAMDAC_463_READ			0x02
+#define TGA_RAMDAC_463_WRITE			0x00
+#define TGA_RAMDAC_463_ADDR_LOW			0x00
+#define TGA_RAMDAC_463_ADDR_HIGH		0x04
+#define TGA_RAMDAC_463_CMD_CURS			0x08
+#define TGA_RAMDAC_463_CMD_CMAP			0x0c
+
+#define TGA_RAMDAC_463_ADDR_EPSR_SHIFT		0
+#define TGA_RAMDAC_463_ADDR_EPDR_SHIFT		8
+
+#define TGA_RAMDAC_463_CURSOR_COLOR0		0x0100
+#define TGA_RAMDAC_463_CURSOR_COLOR1		0x0101
+#define TGA_RAMDAC_463_COMMAND_REG_0		0x0201
+#define TGA_RAMDAC_463_COMMAND_REG_1		0x0202
+#define TGA_RAMDAC_463_COMMAND_REG_2		0x0203
+#define TGA_RAMDAC_463_READ_MASK		0x0205
+#define TGA_RAMDAC_463_BLINK_MASK		0x0209
+#define TGA_RAMDAC_463_WINDOW_TYPE_TABLE	0x0300
+
+typedef union {
+    struct {
+        unsigned int pixels : 9;
+        unsigned int front_porch : 5;
+        unsigned int sync : 7;
+        unsigned int back_porch : 7;
+        unsigned int ignore : 3;
+        unsigned int odd : 1;
+    } horizontal_setup;
+    unsigned int h_setup;
+} tga_horizontal_setup_t;
+
+typedef union {
+    struct {
+        unsigned int scan_lines : 11;
+        unsigned int front_porch : 5;
+        unsigned int sync : 6;
+        unsigned int back_porch : 6;
+    } vertical_setup;
+    unsigned int v_setup;
+} tga_vertical_setup_t;
+
+typedef volatile struct {
+  tga_reg_t buffer[8];
+
+tga_reg_t foreground;
+tga_reg_t background;
+tga_reg_t planemask;
+tga_reg_t pixelmask;
+tga_reg_t mode;
+tga_reg_t rop;
+tga_reg_t shift;
+tga_reg_t address;
+
+tga_reg_t bres1;
+tga_reg_t bres2;
+tga_reg_t bres3;
+tga_reg_t brescont;
+tga_reg_t deep;
+tga_reg_t start;
+tga_reg_t stencil_mode;
+tga_reg_t pers_pixelmask;
+
+tga_reg_t cursor_base_address;
+tga_reg_t horizontal_setup;
+tga_reg_t vertical_setup;
+
+#define TGA_VERT_STEREO_EN		0x80000000
+tga_reg_t base_address;
+tga_reg_t video_valid;
+
+#define TGA_VIDEO_VALID_SCANNING	0x00000001
+#define TGA_VIDEO_VALID_BLANK		0x00000002
+#define TGA_VIDEO_VALID_CURSOR_ENABLE	0x00000004
+tga_reg_t cursor_xy;
+tga_reg_t video_shift_addr;
+tga_reg_t intr_status;
+
+tga_reg_t pixel_data;
+tga_reg_t red_incr;
+tga_reg_t green_incr;
+tga_reg_t blue_incr;
+tga_reg_t z_incr_low;
+tga_reg_t z_incr_high;
+tga_reg_t dma_address;
+tga_reg_t bres_width;
+
+tga_reg_t z_value_low;
+tga_reg_t z_value_high;
+tga_reg_t z_base_address;
+tga_reg_t address2;
+tga_reg_t red_value;
+tga_reg_t green_value;
+tga_reg_t blue_value;
+tga_reg_t _jnk12;
+
+tga_reg_t ramdac_setup;
+struct {
+    tga_reg_t junk;
+} _junk[8 * 2 - 1];
+
+struct {
+    tga_reg_t data;
+} slope_no_go[8];
+
+struct {
+    tga_reg_t data;
+} slope[8];
+
+tga_reg_t bm_color_0;
+tga_reg_t bm_color_1;
+tga_reg_t bm_color_2;
+tga_reg_t bm_color_3;
+tga_reg_t bm_color_4;
+tga_reg_t bm_color_5;
+tga_reg_t bm_color_6;
+tga_reg_t bm_color_7;
+
+tga_reg_t c64_src;
+tga_reg_t c64_dst;
+tga_reg_t c64_src2;
+tga_reg_t c64_dst2;
+tga_reg_t _jnk45;
+tga_reg_t _jnk46;
+tga_reg_t _jnk47;
+tga_reg_t _jnk48;
+
+struct {
+    tga_reg_t junk;
+} _junk2[8 * 3];
+
+tga_reg_t eprom_write;
+tga_reg_t _res0;
+tga_reg_t clock;
+tga_reg_t _res1;
+tga_reg_t ramdac;
+tga_reg_t _res2;
+tga_reg_t command_status;
+tga_reg_t command_status2;
+
+}
+ tga_rec_t, *tga_ptr_t;
+
+#if 0
+typedef struct {
+    ws_screen_descriptor screen;	/* MUST be first!!! */
+    ws_depth_descriptor depth[NDEPTHS];
+    ws_visual_descriptor visual[NVISUALS];
+    ws_cursor_functions cf;
+    ws_color_map_functions cmf;
+    ws_screen_functions sf;
+    int (*attach)();
+    int (*bootmsg)();
+    int (*map)();
+    int (*interrupt)();
+    int (*setup)();
+    vm_offset_t base;
+    tga_ptr_t asic;
+    vm_offset_t fb;
+    size_t fb_size;
+    unsigned int bt485_present;
+    unsigned int bits_per_pixel;
+    unsigned int core_size;
+    unsigned int paer_value;
+    tga_reg_t deep;
+    tga_reg_t head_mask;
+    tga_reg_t refresh_count;
+    tga_reg_t horizontal_setup;
+    tga_reg_t vertical_setup;
+    tga_reg_t base_address;
+    caddr_t info_area;
+    vm_offset_t virtual_dma_buffer;
+    vm_offset_t physical_dma_buffer;
+    int wt_min_dirty;
+    int wt_max_dirty;
+    int wt_dirty;
+    tga_window_tag_cell_t wt_cell[16];	/* magic number */
+    unsigned int stereo_mode;
+    io_handle_t io_handle;
+    dma_map_info_t p_map_info;
+} tga_info_t;
+
+#define TGA_USER_MAPPING_COUNT		4
+
+typedef struct {
+    vm_offset_t fb_alias_increment;
+    vm_offset_t option_base;
+    unsigned int planemask;
+    vm_offset_t virtual_dma_buffer;
+    vm_offset_t physical_dma_buffer;
+} tga_server_info_t;
+#endif					/* 0 */
+
+typedef struct {
+    unsigned char dirty_cell;
+    unsigned char red;			/* only need 8 bits */
+    unsigned char green;
+    unsigned char blue;
+} tga_bt485_color_cell_t;
+
+typedef struct {
+    volatile unsigned int *setup;
+    volatile unsigned int *data;
+    unsigned int head_mask;
+    short fb_xoffset;
+    short fb_yoffset;
+    short min_dirty;
+    short max_dirty;
+    caddr_t reset;
+    u_int mask;
+} tga_bt485_type_t;
+
+#if 0
+typedef struct {
+    volatile unsigned int *setup;
+    volatile unsigned int *data;
+    unsigned int head_mask;
+    short fb_xoffset;
+    short fb_yoffset;
+    short min_dirty;
+    short max_dirty;
+    caddr_t reset;
+    u_int mask;
+
+    /*************************************************************** fields
+     * above this line MUST match struct bt485type
+     * exactly!***************************************************************/
+    u_int unit;
+    char screen_on;
+    char on_off;
+    char dirty_cursor;
+    char dirty_colormap;
+    short x_hot;
+    short y_hot;
+    ws_color_cell cursor_fg;
+    ws_color_cell cursor_bg;
+    void (*enable_interrupt)();
+    u_long bits[256];
+    tga_bt485_color_cell_t cells[256];
+} tga_bt485_info_t;
+#endif					/* 0 */
+
+#define TGA_RAMDAC_463_WINDOW_TAG_COUNT	16
+#define TGA_RAMDAC_463_CMAP_ENTRY_COUNT	528
+
+typedef struct {
+    unsigned char dirty_cell;
+    unsigned char red;
+    unsigned char green;
+    unsigned char blue;
+} tga_bt463_color_cell_t;
+
+typedef struct {
+    unsigned char low_byte;
+    unsigned char middle_byte;
+    unsigned char high_byte;
+    unsigned char unused;
+} tga_bt463_wid_cell_t;
+
+typedef struct {
+    volatile unsigned int *setup;
+    volatile unsigned int *data;
+    unsigned int head_mask;
+    short fb_xoffset;
+    short fb_yoffset;
+} tga_bt463_type_t;
+
+#if 0
+typedef struct {
+    volatile unsigned int *setup;
+    volatile unsigned int *data;
+    unsigned int head_mask;
+    short fb_xoffset;
+    short fb_yoffset;
+    char type;
+    char screen_on;
+    char dirty_colormap;
+    char dirty_cursormap;
+    int unit;
+    void (*enable_interrupt)();
+    caddr_t cursor_closure;
+    ws_color_cell cursor_fg;
+    ws_color_cell cursor_bg;
+    short min_dirty;
+    short max_dirty;
+    tga_bt463_color_cell_t cells[TGA_RAMDAC_463_CMAP_ENTRY_COUNT];
+} tga_bt463_info_t;
+#endif					/* 0 */
+
+typedef struct {
+    volatile unsigned int *xy_reg;
+    volatile unsigned int *valid;
+    short fb_xoffset;
+    short fb_yoffset;
+} tga_curs_type_t;
+
+#if 0
+typedef struct {
+    volatile unsigned int *xy_reg;
+    volatile unsigned int *valid;
+    short fb_xoffset;
+    short fb_yoffset;
+    u_int unit;
+    char on_off;
+    char dirty_cursor;
+    char dirty_cursormap;
+    short x_hot;
+    short y_hot;
+    short last_row;
+    ws_color_cell cursor_fg;
+    ws_color_cell cursor_bg;
+    void (*enable_interrupt)();
+    unsigned int bits[256];
+} tga_curs_info_t;
+#endif					/* 0 */
+
+#endif					/* TGA_DEFINED */
+
diff --git a/system/alpha/h/tga_crystal.h b/system/alpha/h/tga_crystal.h
new file mode 100644
index 000000000..060c78e80
--- /dev/null
+++ b/system/alpha/h/tga_crystal.h
@@ -0,0 +1,760 @@
+#define OPTION_130  0
+#define OPTION_119  1
+#define OPTION_108  2
+#define OPTION_104  3
+#define OPTION_92   4
+#define OPTION_75   5
+#define OPTION_74   6
+#define OPTION_69   7
+#define OPTION_65   8
+#define OPTION_50   9
+#define OPTION_40  10
+#define OPTION_32  11
+#define OPTION_25  12
+#define OPTION_135 13
+#define OPTION_110 14
+
+#define PIXEL_BIAS 0
+
+struct isc_data {
+  unsigned char data[56];
+};
+
+
+typedef struct isc_data ISC;
+
+struct monitor_data {
+  int option;
+  int monitor_rows;
+  int monitor_columns;
+  int sold_freq;
+  int refresh_rate;
+  int v_scanlines;
+  int v_front_porch;
+  int v_sync;
+  int v_back_porch;
+  int d_pixels;
+  int h_pixels;
+  int h_front_porch;
+  int h_sync;
+  int h_back_porch;
+  int cursor_x;
+  int cursor_y;
+  ISC isc_data;
+};
+
+static struct monitor_data crystal_table[] =
+{
+{
+                                                /* 130.808 Mhz                  */
+OPTION_130,                                     /* Option number 1              */
+1024,                                           /* rows                         */
+1280,                                           /* columns                      */
+130,                                            /* 130.8 Mhz                    */
+72,                                             /* refresh rate                 */
+1024,                                           /* v scanlines                  */
+3,                                              /* v front porch                */
+3,                                              /* v sync                       */
+33,                                             /* v back porch                 */
+1280,                                           /* display pixels               */
+1280,                                           /* h pixels                     */
+32,                                             /* h front porch                */
+160,                                            /* h sync                       */
+224,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+1,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,0,0,0,0,1,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,1,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,1,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 119.84 Mhz                   */
+OPTION_119,                                     /* Option number 2              */
+1024,                                           /* rows                         */
+1280,                                           /* columns                      */
+119,                                            /* 119 Mhz                      */
+66,                                             /* refresh rate                 */
+1024,                                           /* v scanlines                  */
+3,                                              /* v front porch                */
+3,                                              /* v sync                       */
+33,                                             /* v back porch                 */
+1280,                                           /* display pixels               */
+1280,                                           /* h pixels                     */
+32,                                             /* h front porch                */
+160,                                            /* h sync                       */
+224,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,0,1,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,1,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,1,0,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 108.18 Mhz                   */
+OPTION_108,
+1024,                                           /* rows                         */
+1280,                                           /* columns                      */
+108,                                            /* 108 Mhz                      */
+60,                                             /* refresh rate                 */
+1024,                                           /* v scanlines                  */
+3,                                              /* v front porch                */
+3,                                              /* v sync                       */
+26,                                             /* v back porch                 */
+1280,                                           /* display pixels               */
+1280,                                           /* h pixels                     */
+44,                                             /* h front porch                */
+184,                                            /* h sync                       */
+200,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,1,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,0,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,0,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 104.00 Mhz                   */
+OPTION_104,
+900,                                            /* rows                         */
+1152,                                           /* columns                      */
+104,                                            /* 104 Mhz                      */
+72,                                             /* refresh rate                 */
+900,                                            /* v scanlines                  */
+6,                                              /* v front porch                */
+10,                                             /* v sync                       */
+44,                                             /* v back porch                 */
+1152,                                           /* display pixels               */
+1152,                                           /* h pixels                     */
+64,                                             /* h front porch                */
+112,                                            /* h sync                       */
+176,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,1,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,1,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,1,0,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 92.98 Mhz                    */
+OPTION_92,
+900,                                            /* rows                         */
+1152,                                           /* columns                      */
+92,                                             /* 92.98 Mhz                    */
+66,                                             /* refresh rate                 */
+900,                                            /* v scanlines                  */
+2,                                              /* v front porch                */
+4,                                              /* v sync                       */
+31,                                             /* v back porch                 */
+1152,                                           /* display pixels               */
+1152,                                           /* h pixels                     */
+20,                                             /* h front porch                */
+132,                                            /* h sync                       */
+200,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,0,1,1,0,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,0,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,1,1,0,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 75.00 Mhz                    */
+OPTION_75,
+768,                                            /* rows                         */
+1024,                                           /* columns                      */
+75,                                             /* 74 Mhz                       */
+70,                                             /* refresh rate                 */
+768,                                            /* v scanlines                  */
+3,                                              /* v front porch                */
+6,                                              /* v sync                       */
+29,                                             /* v back porch                 */
+1024,                                           /* display pixels               */
+1024,                                           /* h pixels                     */
+24,                                             /* h front porch                */
+136,                                            /* h sync                       */
+144,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,0,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,1,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,0,1,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 74.37 Mhz                    */
+OPTION_74,
+768,                                            /* rows                         */
+1024,                                           /* columns                      */
+74,                                             /* 74 Mhz                       */
+72,                                             /* refresh rate                 */
+768,                                            /* v scanlines                  */
+1,                                              /* v front porch                */
+6,                                              /* v sync                       */
+22,                                             /* v back porch                 */
+1024,                                           /* display pixels               */
+1024,                                           /* h pixels                     */
+16,                                             /* h front porch                */
+128,                                            /* h sync                       */
+128,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,1,1,1,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,0,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,1,0,0,0,1,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 69 Mhz DEC 72 Hz             */
+OPTION_69,                                      /* Option number 3              */
+864,                                            /* rows                         */
+1024+PIXEL_BIAS,                                /* columns                      */
+69,                                             /* 69.x Mhz                     */
+60,                                             /* refresh rate                 */
+864,                                            /* v scanlines                  */
+0,                                              /* v front porch                */
+3,                                              /* v sync                       */
+34,                                             /* v back porch                 */
+1024,                                           /* display pixels               */
+1024+PIXEL_BIAS,                                /* h pixels                     */
+12,                                             /* h front porch                */
+116,                                            /* h sync                       */
+128,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+{
+1,0,0,                                          /* 0:1    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,1,1,0,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,1,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,0,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 65 Mhz                       */
+OPTION_65,
+768,                                            /* rows                         */
+1024,                                           /* columns                      */
+65,                                             /* 65 Mhz                       */
+60,                                             /* refresh rate                 */
+768,                                            /* v scanlines                  */
+7,                                              /* v front porch                */
+9,                                              /* v sync                       */
+26,                                             /* v back porch                 */
+1024,                                           /* display pixels               */
+1024,                                           /* h pixels                     */
+56,                                             /* h front porch                */
+64,                                             /* h sync                       */
+200,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,1,0,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,0,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,0,1,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 50 Mhz ergo SVGA             */
+OPTION_50,
+600,                                            /* rows                         */
+800,                                            /* columns                      */
+50,                                             /* 50 Mhz                       */
+72,                                             /* refresh rate                 */
+600,                                            /* v scanlines                  */
+31,                                             /* v front porch                */
+6,                                              /* v sync                       */
+29,                                             /* v back porch                 */
+800 ,                                           /* display pixels               */
+800,                                            /* h pixels                     */
+56,                                             /* h front porch                */
+120,                                            /* h sync                       */
+64,                                             /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,0,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,0,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,1,1,1,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 40  Mhz SVGA                 */
+OPTION_40,
+600,                                            /* rows                         */
+800,                                            /* columns                      */
+40,                                             /* 36 Mhz                       */
+60,                                             /* refresh rate                 */
+600,                                            /* v scanlines                  */
+1,                                              /* v front porch                */
+4,                                              /* v sync                       */
+23,                                             /* v back porch                 */
+800,                                            /* display pixels               */
+800,                                            /* h pixels                     */
+40,                                             /* h front porch                */
+128,                                            /* h sync                       */
+88,                                             /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,1,1,1,0,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,0,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,0,0,0,1,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 31.5 Mhz ergo VGA            */
+OPTION_32,
+480,                                            /* rows                         */
+640,                                            /* columns                      */
+32,                                             /* 32 Mhz                       */
+72,                                             /* refresh rate                 */
+480,                                            /* v scanlines                  */
+9,                                              /* v front porch                */
+3,                                              /* v sync                       */
+28,                                             /* v back porch                 */
+640,                                            /* display pixels               */
+640,                                            /* h pixels                     */
+24,                                             /* h front porch                */
+40,                                             /* h sync                       */
+128,                                            /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+1,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,1,1,0,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,0,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,1,0,0,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                               /* 25.175 Mhz VGA                      */
+OPTION_25,                                      /* Option Information           */
+480,                                            /* rows                         */
+640,                                            /* columns                      */
+25,                                             /* 25.175 Mhz                   */
+60,                                             /* refresh rate                 */
+480,                                            /* v scanlines                  */
+10,                                             /* v front porch                */
+2,                                              /* v sync                       */
+33,                                             /* v back porch                 */
+640,                                            /* display pixels               */
+640,                                            /* h pixels                     */
+16,                                             /* h front porch                */
+96,                                             /* h sync                       */
+48,                                             /* h back porch                 */
+0,                                              /* cursor x placeholder         */
+0,                                              /* cursor y placeholder         */
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+1,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,0,0,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+1,0,0,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,1,1,1,1,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+ },
+{                                                /* 135 Mhz                  */
+OPTION_135,                        /* Option number D              */
+1024,                              /* rows                         */
+1280,                              /* columns                      */
+135,                               /* 135 Mhz                      */
+75,                                /* refresh rate                 */
+1024,                              /* v scanlines                  */
+1,                                 /* v front porch                */
+3,                                 /* v sync                       */
+38,                                /* v back porch                 */
+1280,                              /* display pixels               */
+1280,                              /* h pixels                     */
+16,                                /* h front porch                */
+144,                               /* h sync                       */
+248,                               /* h back porch                 */
+0,                                 /* cursor x placeholder         */
+0,                                 /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+1,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+0,0,1,0,1,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,1,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+1,0,1,1,0,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+},
+{                                                /* 110 Mhz                  */
+OPTION_110,                        /* Option number E              */
+1024,                              /* rows                         */
+1280,                              /* columns                      */
+110,                               /* 110 Mhz                      */
+60,                                /* refresh rate                 */
+1024,                              /* v scanlines                  */
+6,                                 /* v front porch                */
+7,                                 /* v sync                       */
+44,                                /* v back porch                 */
+1280,                              /* display pixels               */
+1280,                              /* h pixels                     */
+19,                                /* h front porch                */
+163,                               /* h sync                       */
+234,                               /* h back porch                 */
+0,                                 /* cursor x placeholder         */
+0,                                 /* cursor y placeholder         */
+
+                                                /* ISC serial load information         */
+
+{
+1,0,0,                                          /* 0:2    N1 modulus                   */
+0,0,                                            /* 3:4    set to zero                  */
+0,                                              /*   5    tristates PLL                */
+0,                                              /*   6    toggle for ramdac reset      */
+0,                                              /*   7 1  to pass reference frequency  */
+0,                                              /*   8 1  for N1 and N2 dividers       */
+0,                                              /*   9    VRAM shift clock enable      */
+0,                                              /*  10    External PLL feedback        */
+0,                                              /*  11    phase detect reset           */
+0,0,                                            /* 12:13  PLL post scaler bits         */
+0,                                              /* 14     aux clock differential       */
+0,                                              /* 15     auxen clock mode             */
+1,0,0,0,0,0,0,0,                                /* 16:23  N2 modulus                   */
+0,0,1,                                          /* 24:26  sets the gain of VCO         */
+0,                                              /* 27     bit 28 for N2                */
+0,1,                                            /* 28:29  sets gain of phase detector  */
+0,                                              /* 30     reserved                     */
+0,                                              /* 31     phase detector timing        */
+1,1,1,1,0,0,                                    /* 32:37  M counter bits               */
+0,                                              /* 38     reserved                     */
+0,                                              /* 39     doubles the modulus prescale */
+0,0,1,0,                                        /* 40:43  A counter                    */
+0,0,0,0,                                        /* 44:47  reserved                     */
+0,0,1,1,0,0,0,                                  /* 48:54  Reference divider            */
+0,                                              /* 55     reserved                     */
+}
+}
+};
diff --git a/system/alpha/h/uart.h b/system/alpha/h/uart.h
new file mode 100644
index 000000000..92ab972bb
--- /dev/null
+++ b/system/alpha/h/uart.h
@@ -0,0 +1,108 @@
+#ifndef __UART_H_LOADED
+#define __UART_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: uart.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $;
+ */
+
+/*
+ * $Log: uart.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/06/07  04:33:20  berc
+ * Initial revision
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:16  fdh
+ * Initial revision
+ *
+ */
+
+
+
+#include "kbdscan.h"
+
+#define	COM1	1
+#define	COM2	2
+#define	LPT	3
+#define	KBD	4
+#define	VGA	4
+#define	P8514	5
+#define TGA	6
+
+#ifdef XXM
+
+#include <xxm.h>
+
+#else /* XXM */
+
+#define com1Rbr	0x3f8
+#define com1Thr	0x3f8
+#define com1Ier	0x3f9
+#define com1Iir	0x3fa
+#define com1Lcr	0x3fb
+#define com1Mcr	0x3fc
+#define com1Lsr	0x3fd
+#define com1Msr	0x3fe
+#define com1Scr	0x3ff
+#define com1Dll	0x3f8
+#define com1Dlm	0x3f9
+
+#define com2Rbr	0x2f8
+#define com2Thr	0x2f8
+#define com2Ier	0x2f9
+#define com2Iir	0x2fa
+#define com2Lcr	0x2fb
+#define com2Mcr	0x2fc
+#define com2Lsr	0x2fd
+#define com2Msr	0x2fe
+#define com2Scr	0x2ff
+#define com2Dll	0x2f8
+#define com2Dlm	0x2f9
+
+#define	lptDr	0x0
+#define	lptSr	0x0
+#define	lptCr	0x0
+
+#define	lptSTB	0x01
+#define	lptAFD	0x02
+#define	lptnInit 0x04
+#define	lptSlct	0x08
+#define	lptIrq	0x10
+#define	lptDir	0x20
+
+#define	lptDly	100000
+#endif /* XXM */
+
+#endif /* __UART_H_LOADED */
diff --git a/system/alpha/h/udp.h b/system/alpha/h/udp.h
new file mode 100644
index 000000000..c7378a943
--- /dev/null
+++ b/system/alpha/h/udp.h
@@ -0,0 +1,197 @@
+#ifndef UDP_H_LOADED
+#define UDP_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ * $Id: udp.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $
+ */
+
+/*
+ * MODULE DESCRIPTION:
+ *
+ *     UDP protocol interface for EB64 monitor
+ *
+ * HISTORY:
+ *
+ * $Log: udp.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.5  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.4  1994/06/28  20:08:21  fdh
+ * Modified filenames and build precedure to fit into a FAT filesystem.
+ *
+ * Revision 1.3  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.2  1994/01/21  09:45:59  rusling
+ * Added #ifdef <filename>_H around the module.
+ * Additionally, any included files are not ifdef'd
+ * *before* they're included (ie address.h).
+ *
+ * Revision 1.1  1993/08/06  10:46:45  berent
+ * Initial revision
+ *
+ *
+ */
+
+#include "address.h"
+
+
+/* udp_init - initialise udp protocol module
+ *
+ * Argument:
+ *    device_no - device number on which udp should be enabled.
+ */
+extern void udp_init(int device_no);
+
+/*
+ * Prototype for packet processing functions
+ *
+ * Arguments to packet processing functions:
+ *     protocol_data - protocol data passed to module when protocol registered
+ *     device_no     - device on which packet was received;
+ *     packet        - packet, with UDP header removed;
+ *     size          - size of packet;
+ *     source_port   - source udp port of packet;
+ *     source_address- source ip address of packet;
+ *     frame_buffer  - original buffer containing packet;
+ *     balance_buffer- buffer returned to maintain buffer balance.
+ *
+ * DESCRIPTION:
+ *     The packet processing functions process a received protocol packet. To avoid
+ *     buffer shortages they are always passed the buffer containing the packet in
+ *     frame_buffer.  They must return either this buffer, or another buffer, in
+ *     balance buffer. The udp module will never access frame_buffer after
+ *     calling a packet processing function; and the protocol modules must not
+ *     access the returned balance_buffer after returning from this function.
+ *
+ */
+typedef void (* udp_packet_handler)(void * protocol_data,
+                                   int device_no,
+                                   unsigned char * packet,
+                                   int size,
+                                   udp_port source_port,
+                                   ip_addr source_address,
+                                   unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                                   unsigned char ** balance_buffer);
+
+/* udp_register_well_known_port - tells the udp module what to do with packets received for a particular
+ *                                well known port number.
+ *
+ * Arguments:
+ *
+ *    device_no             - device number on which port should be registered.
+ *    port                  - port to register.
+ *    processing_function   - function to process received packets; if NULL cancels registration of protocol.
+ *    protocol_data         - arbitrary data to be passed back when a packet is received
+ *
+ * Returned value:
+ *    TRUE   - protocol registered
+ *    FALSE  - unable to register protocol
+ */
+extern int udp_register_well_known_port(int device_no,
+                                        udp_port port,
+                                        udp_packet_handler processing_function,
+                                        void * protocol_data);
+
+/* udp_create_new_port - tells the udp module to create a new port; and what to do with data received
+ *                       on that port.  The created port number will be outside the well known port
+ *                       number range.
+ *
+ * Arguments:
+ *
+ *    device_no             - device number on which port should be created.
+ *    processing_function   - function to process received packets
+ *    protocol_data         - arbitrary data to be passed back when a packet is received
+ *    port                  - returned port number
+ *
+ * Returned value:
+ *    TRUE   - protocol registered
+ *    FALSE  - unable to register protocol
+ */
+extern int udp_create_port(int device_no,
+                           udp_packet_handler processing_function,
+                           void * protocol_data,
+                           udp_port port);
+
+/* udp_delete_port - deletes a previously created port
+ *
+ * Argument:
+ *    device_no   - device number on which port is registered.
+ *    port        - port to be deleted.
+ */
+extern void udp_delete_port(int device_no, udp_port port);
+
+/* udp_write - sends a packet on a UDP port
+ *
+ * Arguments:
+ *
+ *    device_no        - device on which to send the packet
+ *    packet           - pointer to data packet to be sent
+ *    destination_port - UDP port to which the packet should be sent
+ *    destination_addr - IP address to which the packet should be sent
+ *    source_port      - UDP source port
+ *    size             - size of packet
+ *    frame_buffer     - buffer containing packet
+ *    balance_buffer   - buffer returned to maintain buffer balance
+ *
+ * Return values:
+ *
+ *    TRUE  - send successfull
+ *    FALSE - Error occured
+ *
+ * DESCRIPTION:
+ *    This function writes an udp data packet to the device.  To maintain the caller's
+ *    pool of buffers the driver must give the caller an unused buffer (balance_buffer)
+ *    in return for the buffer containing the frame to be transmitted.
+ *
+ *    If the send succeeds then frame_buffer must not be accessed by the caller after this
+ *    call.  If the send can't be queued then frame_buffer will remain valid and
+ *    the returned value of balance_buffer is undefined and must not be used.
+ *
+ */
+extern int udp_write(int device_no,
+                     unsigned char * packet,
+                     udp_port destination_port,
+                     ip_addr destination_addr,
+                     udp_port source_port,
+                     int size,
+                     unsigned char frame_buffer[ETHER_BUFFER_SIZE],
+                     unsigned char ** balance_buffer);
+
+
+/* udp_data_offset - returns the offset at which udp data should be placed in a new ethernet frame
+ *
+ * Return value:
+ *    Offset.
+ */
+extern int udp_data_offset(void);
+
+#endif /* UDP_H_LOADED */
diff --git a/system/alpha/h/wga.h b/system/alpha/h/wga.h
new file mode 100644
index 000000000..e88b9aced
--- /dev/null
+++ b/system/alpha/h/wga.h
@@ -0,0 +1,160 @@
+#ifndef _WGA_H_LOADED
+#define _WGA_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: wga.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $;
+ */
+
+/*
+ * $Log: wga.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:17  fdh
+ * Initial revision
+ *
+ */
+
+
+
+/* ALU to MERGE translation table */
+extern unsigned char mergexlate[];
+
+/* Color Palette Registers */
+#define PALMASK		0x02EA
+#define PALREAD_ADDR	0x02EB
+#define PALWRITE_ADDR	0x02EC
+#define PALDATA		0x02ED
+
+/* Video Timing Registers */
+#define H_TOTAL		0x02E8 /* Horizontal Total */
+#define H_DISP		0x06E8 /* Horizontal Displayed */
+#define H_SYNC_START	0x0AE8 /* Horizontal Sync Start */
+#define H_SYNC_WID	0x0EE8 /* Horizontal Sync Width and Polarity */
+#define V_TOTAL		0x12E8 /* Vertical Total */
+#define V_DISP		0x16E8 /* Vertical Displayed */
+#define V_SYNC_START	0x1AE8 /* Vertical Sync Start */
+#define V_SYNC_WID	0x1EE8 /* Vertical Sync Width and Polarity */
+
+
+#define DISP_CNTL	0x22E8 /* Display Control */
+#define SUBSYS_CNTL	0x42E8 /* Subsystem Control */
+#define ADVFUNC_CNTL	0x4AE8 /* Advanced Function Control */
+#define SUBSYS_STAT	0x42E8 /* Subsystem Status */
+#define GP_STAT		0x9AE8 /* Graphics Processor Status */
+
+/* this block gets the 0x4000 bit turned on */
+#define CUR_Y		(0x82E8 | 0x0000)
+#define CUR_X		(0x86E8 | 0x0000)
+#define MULTIFUNC_CNTL	(0xBEE8 | 0x0000)
+#define ERR_TERM	(0x92E8 | 0x0000)
+#define DESTY_AXSTP	(0x8AE8 | 0x0000)
+#define DESTX_DIASTP	(0x8EE8 | 0x0000)
+#define MAJ_AXIS_PCNT	(0x96E8 | 0x0000)
+#define FG_COLOR	(0xA6E8 | 0x0000)
+#define BG_COLOR	(0xA2E8 | 0x0000)
+#define WR_MASK		(0xAAE8 | 0x0000)
+#define FG_MIX		(0xBAE8 | 0x0000)
+#define BG_MIX		(0xB6E8 | 0x0000)
+#define RD_MASK		(0xAEE8 | 0x0000)
+#define COLOR_CMP	(0xB2E8 | 0x0000)
+#define SHORT_STROKE	(0x9EE8 | 0x0000)
+#define CMD		(0x9AE8 | 0x0000)
+
+
+#define PIX_TRANS	0xE2E8
+
+#define EXT_FIFO_STAT	0x9AEE
+
+/************** Command Register (0x9AE8) bit definitions ***************/
+/*
+ * Bits 15-13 - Drawing Function Command
+ */
+#define CMD_NOOP	0x0000
+#define CMD_LINE	0x2000
+#define CMD_XRECT	0x4000
+#define CMD_YRECT	0x6000
+#define CMD_FRECT	0x8000
+#define CMD_OUTLINE	0xA000
+#define CMD_COPYRECT	0xC000
+/*
+ * Bit 12 - Word Byte Order
+ */
+#define CMD_LSBFIRST	0x1000
+/*
+ * Bit 9 - Bus Width
+ */
+#define CMD_WORDBUS	0x0200
+#define CMD_BYTEBUS	0x0000
+/*
+ * Bit 8 - Variable Data Select
+ */
+#define CMD_VDATA	0x0100
+#define CMD_FDATA	0x0000
+/*
+ * Bit 7 - Y Direction
+ */
+#define CMD_INCY	0x0080
+/*
+ * Bit 6 - Major Axis
+ */
+#define CMD_YMAJOR	0x0040
+/*
+ * Bit 5 - X Direction
+ */
+#define CMD_INCX	0x0020
+/*
+ * Bit 4 - Draw Enable
+ */
+#define CMD_DRAW	0x0010
+/*
+ * Bit 3 - Coded Direction / Short Stroke
+ */
+#define CMD_SHORTSTROKE	0x0008
+/*
+ * Bit 2 - Draw Last Pixel
+ */
+#define CMD_NOLASTPIXEL	0x0004
+/*
+ * Bit 1 - Plane Mode
+ */
+#define CMD_ACROSS	0x0002
+#define CMD_THROUGH	0x0000
+/*
+ * Bit 0 - Read/Write
+ */
+#define CMD_WRITE	0x0001
+#define CMD_READ	0x0000
+
+#endif /* _WGA_H_LOADED */
diff --git a/system/alpha/h/xlate.h b/system/alpha/h/xlate.h
new file mode 100644
index 000000000..f63d0bdfc
--- /dev/null
+++ b/system/alpha/h/xlate.h
@@ -0,0 +1,80 @@
+#ifndef __XLATE_H_LOADED
+#define __XLATE_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: xlate.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $;
+ */
+
+/*
+ * $Log: xlate.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.4  1994/08/05  20:13:47  fdh
+ * Updated Copyright header and RCS $Id: identifier.
+ *
+ * Revision 1.3  1994/06/21  14:56:47  rusling
+ * fixed up WNT compile warnings.
+ *
+ * Revision 1.2  1994/06/20  14:18:59  fdh
+ * Fixup header file preprocessor #include conditionals.
+ *
+ * Revision 1.1  1993/06/08  19:56:17  fdh
+ * Initial revision
+ *
+ */
+
+
+
+#include "kbdscan.h"
+
+#define MCTRL(x) ((x)&0x1f)
+
+#define ASCII		0
+#define SCROLL		1
+#define CAPS		2
+#define LSHIFT		3
+#define LCTRL		4
+#define RSHIFT		5
+#define RCTRL		6
+#define IGNORE		7
+#define	ALT		8
+#define	FUNCTION	9
+#define	NUMLOCK		10
+#define	NUMPAD		11
+#define	UNKNOWN		12
+
+typedef struct {
+        unsigned char	unshifted;
+        unsigned char	shifted;
+        unsigned char	char_type;
+} xlate_t;
+
+extern xlate_t xlate[];
+
+#endif /* __XLATE_H_LOADED */
diff --git a/system/alpha/h/xxm.h b/system/alpha/h/xxm.h
new file mode 100644
index 000000000..aad824435
--- /dev/null
+++ b/system/alpha/h/xxm.h
@@ -0,0 +1,233 @@
+#ifndef __XXM_H_LOADED
+#define __XXM_H_LOADED
+/*****************************************************************************
+
+Copyright © 1993, Digital Equipment Corporation, Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: xxm.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $;
+ */
+
+/*
+ * $Log: xxm.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.3  1996/04/15 16:28:36  berc
+ * adding PCI ifdefs
+ *
+ * Revision 1.1  1995/06/07  03:27:16  berc
+ * Initial revision
+ *
+ */
+
+#ifdef XXM
+
+#define KSEG ((ul)0xfffffc0000000000)
+#define PHYS_TO_KSEG(x)(((ul)x) | KSEG)
+#define KSEG_TO_PHYS(x)(((ul)x) & ~KSEG)
+
+#define BANNER "SRC XXX Debug Monitor - Se Habla Peligro"
+#define PROMPT "XXX> "
+
+/****************************************************************************
+ * Basic                                                                    *
+ ****************************************************************************/
+
+#define NEEDPCI
+/*#define NEEDDEBUGGER*/
+/*#define NO_ETHERNET*/
+/*#define NEEDWAVELAN*/
+#define NEEDDEPCM
+#define NEED21040
+/*#define TRACE_ENABLE*/
+
+/****************************************************************************
+ * System Address Space                                                     *
+ ****************************************************************************/
+
+#define MINIMUM_SYSTEM_MEMORY	0x4000000 /* 64MB */
+#define DMA_BUFF_BASE           (KSEG | (ul)0x3000000)	/* Ether buffers */
+#define AOUT_LOAD_ADDR		(KSEG | (ul)0x2000000)	/* Kernel image */
+
+/****************************************************************************
+ * PCI I/O Address Space                                                    *
+ ****************************************************************************/
+
+/*
+ * Allocate PCI IO space above the 10-bit ISA space
+ */
+#define PCI_IO_BASE                         0x0400
+/* 2 gig + 16mb for slot D + two 16 meg windows for the PCMCIA cards (if any) */
+#define PCI_MEM_BASE (1 << 31) + (3 * (1 << 24))
+/*
+ * Where does the SROM leave PCMCIA slot D?
+ */
+#define PCMCIA_SLOT_D_BASE                         0x0
+
+/*
+ * ROM definitions.
+ */
+#ifdef undef
+#define NEEDFLASHMEMORY
+#define INTEL_28F008SA
+#define ROMBASE 0xFFF80000
+#define ROMSIZE 0x100000
+#define ROMINC 0x1
+#endif
+
+/****************************************************************************
+ * PCI I/O Address Space Access                                             *
+ ****************************************************************************/
+
+/* XXM ADDRESS BIT DEFINITIONS
+ *
+ *  PCI Sparse Memory Space (2GB)
+ *
+ *  3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
+ *  9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ * |1|0|0| |A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|S|S|S|S|0| | |
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ *  | \_/  \________________________________________________________/ \_____/ |
+ *  |  |                 Address (pA[31] ==1, pA[30..02])                |   MBZ
+ *  |  +-Space identifier                                                |
+ *  +-- IO space, not cached                           Transfer Length --+
+ *
+ *
+ *  PCI Sparce Other Space (16MB)
+ *
+ *  3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
+ *  9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ * |1|0|1| | | | | |T|T|T|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|S|S|S|S|0| | |
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ *  | \_/           \___/ \_________________________________________/ \_____/ |
+ *  |  |              |       Address (pA[31..24] == 0 pA[23..02])       |   MBZ
+ *  |  +-Space        +x00 - memory, x01 - I/O x10 - Type0, x11 - Type1  |
+ *  +-- IO space, not cached                           Transfer Length --+
+ *
+ *
+ *  PCI Dense Memory Space (2GB)
+ *
+ *  3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
+ *  9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ * |1|1|0| | | | | | |A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A|A| | |
+ * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+ *  | \_/            \________________________________________________________/
+ *  |  |                         Address (pA[31] ==1, pA[30..02])
+ *  |  +-Space identifier
+ *  +-- IO space, not cached
+ *
+ */
+
+#define BYTE_ENABLE_SHIFT 5
+#define TRANSFER_LENGTH_SHIFT 3
+#define IO_MASK 0xffffff         /* IO mask is 24 bits */
+#define PCI_MEM   ((ul)0x400<<29)    /*    CPU Adr[39:29]=0x400 select PCI Mem.	*/
+#define PCI_IO	  ((ul)0x501<<29)    /*    CPU Adr[39:29]=0x501 select PCI I/O.	*/
+#define PCI_CFG0  ((ul)0x502<<29)    /*    CPU Adr[39:29]=0x502 select PCI Cfg.	*/
+#define PCI_CFG1  ((ul)0x503<<29)    /*    CPU Adr[39:29]=0x503 select PCI Cfg.	*/
+
+#define PCI_MEM_BITS(a)  ((PCI_MEM  >> BYTE_ENABLE_SHIFT) | a)
+#define PCI_IO_BITS(a)   ((PCI_IO   >> BYTE_ENABLE_SHIFT) | a)
+#define PCI_CFG0_BITS(a) ((PCI_CFG0 >> BYTE_ENABLE_SHIFT) | a)
+#define PCI_CFG1_BITS(a) ((PCI_CFG1 >> BYTE_ENABLE_SHIFT) | a)
+
+/****************************************************************************
+ * Slot D Physical Address Map                                              *
+ ****************************************************************************/
+
+#define SLOT_D_ROM                 PCI_MEM_BITS(0x000000)
+#define SLOT_D_AUDIO_RAM           PCI_MEM_BITS(0x100000)
+#define SLOT_D_KEYBOARD            PCI_MEM_BITS(0x120000)
+#define SLOT_D_AUDIO_CODEC         PCI_MEM_BITS(0x130000)
+#define SLOT_D_COM1                PCI_MEM_BITS(0x140000)
+#define SLOT_D_COM2                PCI_MEM_BITS(0x150000)
+#define SLOT_D_CLOCK_ADDR          PCI_MEM_BITS(0x160000)
+#define SLOT_D_CLOCK_DATA          PCI_MEM_BITS(0x170000)
+#define SLOT_D_PCI_ERROR_REGISTER  PCI_MEM_BITS(0x180000)
+#define SLOT_D_SCSI                PCI_MEM_BITS(0x190000)
+#define SLOT_D_AUDIO_PLAY_ADDR     PCI_MEM_BITS(0x1a0000)
+#define SLOT_D_AUDIO_PLAY_LIMIT    PCI_MEM_BITS(0x1b0000)
+#define SLOT_D_AUDIO_CAPTURE_ADDR  PCI_MEM_BITS(0x1c0000)
+#define SLOT_D_AUDIO_CAPTURE_LIMIT PCI_MEM_BITS(0x1d0000)
+#define SLOT_D_INTERRUPT_STATUS    PCI_MEM_BITS(0x1e0000)
+#define SLOT_D_INTERRUPT_ENABLE    PCI_MEM_BITS(0x1f0000)
+
+/****************************************************************************
+ * UART Definitions                                                         *
+ ****************************************************************************/
+
+#define com1Rbr	(SLOT_D_COM1 | (0x0 << 1))
+#define com1Thr (SLOT_D_COM1 | (0x0 << 1))
+#define com1Ier (SLOT_D_COM1 | (0x1 << 1))
+#define com1Iir (SLOT_D_COM1 | (0x2 << 1))
+#define com1Lcr (SLOT_D_COM1 | (0x3 << 1))
+#define com1Mcr (SLOT_D_COM1 | (0x4 << 1))
+#define com1Lsr (SLOT_D_COM1 | (0x5 << 1))
+#define com1Msr (SLOT_D_COM1 | (0x6 << 1))
+#define com1Scr (SLOT_D_COM1 | (0x7 << 1))
+#define com1Dll (SLOT_D_COM1 | (0x8 << 1))
+#define com1Dlm (SLOT_D_COM1 | (0x9 << 1))
+
+#define com2Rbr	(SLOT_D_COM2 | (0x0 << 1))
+#define com2Thr (SLOT_D_COM2 | (0x0 << 1))
+#define com2Ier (SLOT_D_COM2 | (0x1 << 1))
+#define com2Iir (SLOT_D_COM2 | (0x2 << 1))
+#define com2Lcr (SLOT_D_COM2 | (0x3 << 1))
+#define com2Mcr (SLOT_D_COM2 | (0x4 << 1))
+#define com2Lsr (SLOT_D_COM2 | (0x5 << 1))
+#define com2Msr (SLOT_D_COM2 | (0x6 << 1))
+#define com2Scr (SLOT_D_COM2 | (0x7 << 1))
+#define com2Dll (SLOT_D_COM2 | (0x8 << 1))
+#define com2Dlm (SLOT_D_COM2 | (0x9 << 1))
+
+#define	lptDr 0x0
+#define	lptSr 0x0
+#define	lptCr 0x0
+
+#define	lptSTB 0x0
+#define	lptAFD 0x0
+#define	lptnInit 0x0
+#define	lptSlct 0x0
+#define	lptIrq 0x0
+#define	lptDir 0x0
+
+#define	lptDly	100000
+
+#define RTCADDR SLOT_D_CLOCK_ADDR
+#define RTCDATA SLOT_D_CLOCK_DATA
+/* 114 bytes of NVRAM in the clock chip */
+#define RTCRAM 114
+#define ROMBASE SLOT_D_ROM
+#define ROMINC 2 /* Byte wide, with bytes in low half of 16-bit word */
+#define ROMSIZE (512 * 1024)
+
+/* Map 16MB of slot A space at offset 16MB of IO space */
+#define SLOT_A_IO_BASE		   PCI_IO_BITS(0x1000000)
+
+#endif /* XXM */
+#endif /* __XXM_H_LOADED */
diff --git a/system/alpha/h/xxmmem.h b/system/alpha/h/xxmmem.h
new file mode 100644
index 000000000..a4d3ff090
--- /dev/null
+++ b/system/alpha/h/xxmmem.h
@@ -0,0 +1,60 @@
+#ifndef __XXMMEM_H_LOADED
+#define __XXMMEM_H_LOADED
+/*****************************************************************************
+
+       Copyright © 1993, 1994 Digital Equipment Corporation,
+                       Maynard, Massachusetts.
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted, provided
+that the copyright notice and this permission notice appear in all copies
+of software and supporting documentation, and that the name of Digital not
+be used in advertising or publicity pertaining to distribution of the software
+without specific, written prior permission. Digital grants this permission
+provided that you prominently mark, as not part of the original, any
+modifications made to this software or documentation.
+
+Digital Equipment Corporation disclaims all warranties and/or guarantees
+with regard to this software, including all implied warranties of fitness for
+a particular purpose and merchantability, and makes no representations
+regarding the use of, or the results of the use of, the software and
+documentation in terms of correctness, accuracy, reliability, currentness or
+otherwise; and you rely on the software, documentation and results solely at
+your own risk.
+
+******************************************************************************/
+
+/*
+ *  $Id: xxmmem.h,v 1.1.1.1 1997/10/30 23:27:18 verghese Exp $;
+ */
+
+/*
+ * $Log: xxmmem.h,v $
+ * Revision 1.1.1.1  1997/10/30 23:27:18  verghese
+ * current 10/29/97
+ *
+ * Revision 1.1  1995/06/08  01:25:56  berc
+ * Initial revision
+ *
+ * Revision 1.2  1995/04/20  16:37:48  cruz
+ * Made some macro definition changes.
+ *
+ * Revision 1.1  1994/12/19  18:33:33  cruz
+ * Initial revision
+ *
+ *
+ */
+
+#ifdef XXM
+
+#include "system.h"
+#include "lib.h"
+
+#ifndef MAKEDEPEND
+#include "cserve.h"
+#endif
+
+#endif /* XXM */
+#endif /* __XXMMEM_H_LOADED */