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| author | Ali Saidi <saidi@eecs.umich.edu> | 2003-12-19 14:24:01 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2003-12-19 14:24:01 -0500 |
| commit | d7fba9784e99ca4465c9cc04b611cf309e637d33 (patch) | |
| tree | 50844ceea1c1d4fa12497139ef0aac01400187ff /system/alpha/palcode/ev5_impure.h | |
| parent | f6bfca014bc97f9cfa2c9ebc85bfcb091b709550 (diff) | |
| download | gem5-d7fba9784e99ca4465c9cc04b611cf309e637d33.tar.xz | |
The palcode will now build by simply typing make in this directory.
Most of the changes were to fix broken macros in platfrom_tlaser.s
palcode/Makefile:
Completly new makefile to build palcode
palcode/ev5_alpha_defs.h:
fixed a broken define
palcode/ev5_impure.h:
macro fixes
palcode/platform_srcmax.s:
manual macro expansion of broken macros... this file isn't needed to
build tlaser palcode
palcode/platform_tlaser.s:
lots of fixups to make the code assemble
Diffstat (limited to 'system/alpha/palcode/ev5_impure.h')
| -rw-r--r-- | system/alpha/palcode/ev5_impure.h | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/system/alpha/palcode/ev5_impure.h b/system/alpha/palcode/ev5_impure.h index 84d700c32..ffa910ce2 100644 --- a/system/alpha/palcode/ev5_impure.h +++ b/system/alpha/palcode/ev5_impure.h @@ -51,7 +51,7 @@ ** macros will auto-magically adjust the offsets accordingly. ** */ - +#if 0 #define SAVE_GPR(reg,offset,base) \ stq_p reg, ((offset-0x200)&0x3FF)(base) @@ -78,7 +78,38 @@ #define RESTORE_SHADOW(reg,offset,base)\ ldq_p reg, ((offset-CNS_Q_IPR)&0x3FF)(base) +#else +//#define SEXT10(X) (((X) & 0x200) ? ((X) | 0xfffffffffffffc00) : (X)) +#define SEXT10(X) ((X) & 0x3ff) +//#define SEXT10(X) (((X) << 55) >> 55) + +#define SAVE_GPR(reg,offset,base) \ + stq_p reg, (SEXT10(offset-0x200))(base) + +#define RESTORE_GPR(reg,offset,base) \ + ldq_p reg, (SEXT10(offset-0x200))(base) + + +#define SAVE_FPR(reg,offset,base) \ + stt reg, (SEXT10(offset-0x200))(base) + +#define RESTORE_FPR(reg,offset,base) \ + ldt reg, (SEXT10(offset-0x200))(base) +#define SAVE_IPR(reg,offset,base) \ + mfpr v0, reg; \ + stq_p v0, (SEXT10(offset-CNS_Q_IPR))(base) + +#define RESTORE_IPR(reg,offset,base) \ + ldq_p v0, (SEXT10(offset-CNS_Q_IPR))(base); \ + mtpr v0, reg + +#define SAVE_SHADOW(reg,offset,base) \ + stq_p reg, (SEXT10(offset-CNS_Q_IPR))(base) + +#define RESTORE_SHADOW(reg,offset,base)\ + ldq_p reg, (SEXT10(offset-CNS_Q_IPR))(base) +#endif /* orig Structure of the processor-specific impure area */ /* orig aggregate impure struct prefix "" tag ""; |