Basic cleanup pass to get rid of a few things that made the Python

configuration unnecessarily awkward.  Biggest changes are:

- External and internal object names now match in all cases.  The
macros still allow them to be different; the only reason I didn't
get rid of that is that the macros themselves should be going away
soon.  In the few conflicting cases, I sometimes renamed the C++ object
and sometimes renamed the config object.  The latter sets of substitions
are:

s/BaseBus/Bus/;
s/MemoryObject/FunctionalMemory/;
s/MemoryControl/MemoryController/;
s/FUPool/FuncUnitPool/;

- SamplingCPU is temporarily broken... we need to change the model
of how this works in the .ini file.  Having it as a CPU proxy is
really awkward.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/process.cc:
    Rename objects to match config name.
cpu/base_cpu.cc:
    Uncomment SimObject define since SamplingCPU no longer
    does this for us.
dev/ethertap.cc:
    Use unsigned instead of uint16_t for params.
kern/tru64/tru64_system.cc:
    Use unsigned instead of uint64_t for init_param param.
test/paramtest.cc:
    Fix old SimObjectParam.

--HG--
extra : convert_revision : 378ebbc6a71ad0694501d09979a44d111a59e8dc

1 files changed, 2 insertions, 2 deletions

diff --git a/test/paramtest.cc b/test/paramtest.cc
index d63a3aad4..ad0481a96 100644
--- a/test/paramtest.cc
+++ b/test/paramtest.cc
@@ -57,8 +57,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(ParamTest)
     VectorParam<string> vecstring;
     Param<bool> boolparam;
     VectorParam<bool> vecbool;
-    SimObjectParam<mem_hierarchy_obj *> memobj;
-    SimObjectVectorParam<mem_hierarchy_obj *> vecmemobj;
+    SimObjectParam<BaseMemory *> memobj;
+    SimObjectVectorParam<BaseMemory *> vecmemobj;
     SimpleEnumParam<Enum1Type> enum1;
     MappedEnumParam<Enum2Type> enum2;
     SimpleEnumVectorParam<Enum1Type> vecenum1;