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| author | Kevin Lim <ktlim@umich.edu> | 2006-05-16 13:48:05 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-05-16 13:48:05 -0400 |
| commit | bfa9cc2c3a7aa9003c145e6bda750edf18a01ea8 (patch) | |
| tree | ffbb04db8c0bfaa829261d3e9cfd1e4df2fc9e6c /test | |
| parent | 21df09cf7aa6bdec5de11904751d355e773a3168 (diff) | |
| download | gem5-bfa9cc2c3a7aa9003c145e6bda750edf18a01ea8.tar.xz | |
Add some flags for the upcoming checker.
arch/alpha/isa/decoder.isa:
Mark store conditionals as serializing. This is slightly higher over head than they truly have in the 264, but it's close. Normally they block any other instructions from entering the IQ until the IQ is empty. This is higher overhead because it waits until the ROB is empty.
Also mark RPCC as unverifiable. The checker will just grab the value from the instruction and assume it's correct.
cpu/static_inst.hh:
Add unverifiable flag, specifically for the CheckerCPU.
--HG--
extra : convert_revision : cbc34d1f2f5b07105d31d4bd8f19edae2cf8158e
Diffstat (limited to 'test')
0 files changed, 0 insertions, 0 deletions