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authorAndreas Hansson <andreas.hansson@arm.com>2012-09-21 11:48:14 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-09-21 11:48:14 -0400
commit6427342318a17468ec2bf8cb8a7618d4d195fba4 (patch)
tree189707056c6fe9f4bc4c764acb54d8d4a35e14fb /tests/SConscript
parent3b6a143ec577b74a3bc65b84d3fe0416a094b2d0 (diff)
downloadgem5-6427342318a17468ec2bf8cb8a7618d4d195fba4.tar.xz
SimpleDRAM: A basic SimpleDRAM regression
--HG-- rename : tests/configs/tgen-simple-mem.py => tests/configs/tgen-simple-dram.py rename : tests/quick/se/70.tgen/tgen-simple-mem.cfg => tests/quick/se/70.tgen/tgen-simple-dram.cfg rename : tests/quick/se/70.tgen/tgen-simple-mem.trc => tests/quick/se/70.tgen/tgen-simple-dram.trc
Diffstat (limited to 'tests/SConscript')
-rw-r--r--tests/SConscript3
1 files changed, 2 insertions, 1 deletions
diff --git a/tests/SConscript b/tests/SConscript
index 7ade8ffb6..9bf9e3aeb 100644
--- a/tests/SConscript
+++ b/tests/SConscript
@@ -315,7 +315,8 @@ if env['TARGET_ISA'] == 'x86':
configs += ['simple-atomic', 'simple-timing', 'o3-timing', 'memtest',
'simple-atomic-mp', 'simple-timing-mp', 'o3-timing-mp',
- 'inorder-timing', 'rubytest', 'tgen-simple-mem']
+ 'inorder-timing', 'rubytest', 'tgen-simple-mem',
+ 'tgen-simple-dram']
if env['PROTOCOL'] != 'None':
if env['PROTOCOL'] == 'MI_example':