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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:52 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:52 -0500
commit5fb00e1df6b2b7d9db472d0c25765263ed1b839f (patch)
tree2f94ca554d9f92d1fe737ed98931856e43b52f6a /tests/SConscript
parente09e9fa279dec86b171b5e3efeb7057fa0d21cc9 (diff)
downloadgem5-5fb00e1df6b2b7d9db472d0c25765263ed1b839f.tar.xz
tests: Add CPU switching tests
This changeset adds a set of tests that stress the CPU switching code. It adds the following test configurations: * tsunami-switcheroo-full -- Alpha system (atomic, timing, O3) * realview-switcheroo-atomic -- ARM system (atomic<->atomic) * realview-switcheroo-timing -- ARM system (timing<->timing) * realview-switcheroo-o3 -- ARM system (O3<->O3) * realview-switcheroo-full -- ARM system (atomic, timing, O3) Reference data is provided for the 10.linux-boot test case. All of the tests trigger a CPU switch once per millisecond during the boot process. The in-order CPU model was not included in any of the tests as it does not support CPU handover.
Diffstat (limited to 'tests/SConscript')
-rw-r--r--tests/SConscript9
1 files changed, 7 insertions, 2 deletions
diff --git a/tests/SConscript b/tests/SConscript
index ea65dad8f..2faa3216c 100644
--- a/tests/SConscript
+++ b/tests/SConscript
@@ -301,7 +301,8 @@ if env['TARGET_ISA'] == 'alpha':
'tsunami-simple-timing-dual',
'twosys-tsunami-simple-atomic',
'tsunami-o3', 'tsunami-o3-dual',
- 'tsunami-inorder']
+ 'tsunami-inorder',
+ 'tsunami-switcheroo-full']
if env['TARGET_ISA'] == 'sparc':
configs += ['t1000-simple-atomic',
't1000-simple-timing']
@@ -314,7 +315,11 @@ if env['TARGET_ISA'] == 'arm':
'realview-simple-timing-dual',
'realview-o3',
'realview-o3-checker',
- 'realview-o3-dual']
+ 'realview-o3-dual',
+ 'realview-switcheroo-atomic',
+ 'realview-switcheroo-timing',
+ 'realview-switcheroo-o3',
+ 'realview-switcheroo-full']
if env['TARGET_ISA'] == 'x86':
configs += ['pc-simple-atomic',
'pc-simple-timing',