Cache: add a response latency to the caches

In the current caches the hit latency is paid twice on a miss. This patch lets
a configurable response latency be set of the cache for the backward path.

1 files changed, 4 insertions, 2 deletions

diff --git a/tests/configs/inorder-timing.py b/tests/configs/inorder-timing.py
index 3e285af77..af7609e9f 100644
--- a/tests/configs/inorder-timing.py
+++ b/tests/configs/inorder-timing.py
@@ -33,7 +33,8 @@ m5.util.addToPath('../configs/common')
 class MyCache(BaseCache):
     assoc = 2
     block_size = 64
-    latency = '1ns'
+    hit_latency = '1ns'
+    response_latency = '1ns'
     mshrs = 10
     tgts_per_mshr = 5
 
@@ -43,7 +44,8 @@ class MyL1Cache(MyCache):
 cpu = InOrderCPU(cpu_id=0)
 cpu.addTwoLevelCacheHierarchy(MyL1Cache(size = '128kB'),
                               MyL1Cache(size = '256kB'),
-                              MyCache(size = '2MB', latency='10ns'))
+                              MyCache(size = '2MB', hit_latency='10ns',
+                                      response_latency='10ns'))
 
 cpu.clock = '2GHz'