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authorAndrew Bardsley <Andrew.Bardsley@arm.com>2014-07-23 16:09:05 -0500
committerAndrew Bardsley <Andrew.Bardsley@arm.com>2014-07-23 16:09:05 -0500
commit5d0b25ba3f82b6d563b3fabd3de71f3ceabb140d (patch)
tree0b8cdef424988f3486a9f2cebbb49f76b74ae8f9 /tests/configs/minor-timing-mp.py
parent0e8a90f06bd3db00f700891a33458353478cce76 (diff)
downloadgem5-5d0b25ba3f82b6d563b3fabd3de71f3ceabb140d.tar.xz
cpu: Minor CPU add regression tests for ARM and ALPHA
This patch adds regression tests results and test harnesses for the Minor CPU on ARM and ALPHA.
Diffstat (limited to 'tests/configs/minor-timing-mp.py')
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diff --git a/tests/configs/minor-timing-mp.py b/tests/configs/minor-timing-mp.py
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+# Copyright (c) 2013 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Hansson
+
+from m5.objects import *
+from base_config import *
+
+nb_cores = 4
+root = BaseSESystem(mem_mode='timing', mem_class=DDR3_1600_x64,
+ cpu_class=MinorCPU, num_cpus=nb_cores).create_root()