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authorAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:27 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:27 -0400
commita8480fe1c34db25ae8acb5f79d571bc924e0daeb (patch)
treec8c792eefae54e9c1599b371720dc5f8e9c9440a /tests/configs/rubytest-ruby.py
parentd5593f3c75c9d005b89788647a9383e791c9c2a2 (diff)
downloadgem5-a8480fe1c34db25ae8acb5f79d571bc924e0daeb.tar.xz
config: Move the memory instantiation outside FSConfig
This patch moves the instantiation of the memory controller outside FSConfig and instead relies on the mem_ranges to pass the information to the caller (e.g. fs.py or one of the regression scripts). The main motivation for this change is to expose the structural composition of the memory system and allow more tuning and configuration without adding a large number of options to the makeSystem functions. The patch updates the relevant example scripts to maintain the current functionality. As the order that ports are connected to the memory bus changes (in certain regresisons), some bus stats are shuffled around. For example, what used to be layer 0 is now layer 1. Going forward, options will be added to support the addition of multi-channel memory controllers.
Diffstat (limited to 'tests/configs/rubytest-ruby.py')
-rw-r--r--tests/configs/rubytest-ruby.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/tests/configs/rubytest-ruby.py b/tests/configs/rubytest-ruby.py
index 1553e29f4..d2809f2a2 100644
--- a/tests/configs/rubytest-ruby.py
+++ b/tests/configs/rubytest-ruby.py
@@ -80,6 +80,8 @@ tester = RubyTester(check_flush = check_flush, checks_to_complete = 100,
system = System(tester = tester, physmem = SimpleMemory(null = True),
clk_domain = SrcClockDomain(clock = options.sys_clock))
+system.mem_ranges = AddrRange('256MB')
+
Ruby.create_system(options, system)
# Create a separate clock domain for Ruby