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authorGabe Black <gblack@eecs.umich.edu>2006-10-09 18:19:35 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-09 18:19:35 -0400
commita23c6a719323f2ac74cadd3b04c84f3dc679c26e (patch)
tree73e081aa0b1868834e8cf4ec98ce5254c6b5192e /tests/configs/simple-timing-mp.py
parent187dcb18bfd87db63ad914d2ba04f0bd2dc0637d (diff)
parent727dea78c4b603a63d6c8bee10d317cb2905ffd4 (diff)
downloadgem5-a23c6a719323f2ac74cadd3b04c84f3dc679c26e.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : 8267487b935eaf11665841ace3a5c664751b53b0
Diffstat (limited to 'tests/configs/simple-timing-mp.py')
-rw-r--r--tests/configs/simple-timing-mp.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/configs/simple-timing-mp.py b/tests/configs/simple-timing-mp.py
index 9fc5f3874..8f9ab0dde 100644
--- a/tests/configs/simple-timing-mp.py
+++ b/tests/configs/simple-timing-mp.py
@@ -52,7 +52,7 @@ class L2(BaseCache):
write_buffers = 8
nb_cores = 4
-cpus = [ TimingSimpleCPU() for i in xrange(nb_cores) ]
+cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
# system simulated
system = System(cpu = cpus, physmem = PhysicalMemory(), membus =