summaryrefslogtreecommitdiff
path: root/tests/configs
diff options
context:
space:
mode:
authorNathan Binkert <binkertn@umich.edu>2007-03-06 11:13:43 -0800
committerNathan Binkert <binkertn@umich.edu>2007-03-06 11:13:43 -0800
commitd55b25cde6d2c072885a2c468d209fb18d6628e6 (patch)
tree391c4e66a69818a95037a5f2adccb2e8e0c84648 /tests/configs
parentf800fddcea850822efee031b9b904280639da4c6 (diff)
downloadgem5-d55b25cde6d2c072885a2c468d209fb18d6628e6.tar.xz
Move all of the parameters of the Root SimObject so they are
directly configured by python. Move stuff from root.(cc|hh) to core.(cc|hh) since it really belogs there now. In the process, simplify how ticks are used in the python code. --HG-- extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
Diffstat (limited to 'tests/configs')
-rw-r--r--tests/configs/t1000-simple-atomic.py4
-rw-r--r--tests/configs/tsunami-simple-atomic-dual.py6
-rw-r--r--tests/configs/tsunami-simple-atomic.py5
-rw-r--r--tests/configs/tsunami-simple-timing-dual.py5
-rw-r--r--tests/configs/tsunami-simple-timing.py5
5 files changed, 16 insertions, 9 deletions
diff --git a/tests/configs/t1000-simple-atomic.py b/tests/configs/t1000-simple-atomic.py
index 51745892a..6a078e715 100644
--- a/tests/configs/t1000-simple-atomic.py
+++ b/tests/configs/t1000-simple-atomic.py
@@ -36,4 +36,6 @@ system = FSConfig.makeSparcSystem('atomic')
system.cpu = cpu
cpu.connectMemPorts(system.membus)
-root = Root(clock = '2GHz', system = system)
+root = Root(system=system)
+
+m5.ticks.setGlobalFrequency('2GHz')
diff --git a/tests/configs/tsunami-simple-atomic-dual.py b/tests/configs/tsunami-simple-atomic-dual.py
index 4adb32868..7ed854f44 100644
--- a/tests/configs/tsunami-simple-atomic-dual.py
+++ b/tests/configs/tsunami-simple-atomic-dual.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -37,4 +37,6 @@ system.cpu = cpus
for c in cpus:
c.connectMemPorts(system.membus)
-root = Root(clock = '2GHz', system = system)
+root = Root(system=system)
+
+m5.ticks.setGlobalFrequency('2GHz')
diff --git a/tests/configs/tsunami-simple-atomic.py b/tests/configs/tsunami-simple-atomic.py
index 653df9bb0..4859f30cf 100644
--- a/tests/configs/tsunami-simple-atomic.py
+++ b/tests/configs/tsunami-simple-atomic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -36,4 +36,5 @@ system = FSConfig.makeLinuxAlphaSystem('atomic')
system.cpu = cpu
cpu.connectMemPorts(system.membus)
-root = Root(clock = '2GHz', system = system)
+root = Root(system=system)
+m5.ticks.setGlobalFrequency('2GHz')
diff --git a/tests/configs/tsunami-simple-timing-dual.py b/tests/configs/tsunami-simple-timing-dual.py
index bfd478969..0c8c3d523 100644
--- a/tests/configs/tsunami-simple-timing-dual.py
+++ b/tests/configs/tsunami-simple-timing-dual.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -37,4 +37,5 @@ system.cpu = cpus
for c in cpus:
c.connectMemPorts(system.membus)
-root = Root(clock = '2GHz', system = system)
+root = Root(system=system)
+m5.ticks.setGlobalFrequency('2GHz')
diff --git a/tests/configs/tsunami-simple-timing.py b/tests/configs/tsunami-simple-timing.py
index 59401c040..9f532e3ae 100644
--- a/tests/configs/tsunami-simple-timing.py
+++ b/tests/configs/tsunami-simple-timing.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006 The Regents of The University of Michigan
+# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -36,4 +36,5 @@ system = FSConfig.makeLinuxAlphaSystem('timing')
system.cpu = cpu
cpu.connectMemPorts(system.membus)
-root = Root(clock = '2GHz', system = system)
+root = Root(system=system)
+m5.ticks.setGlobalFrequency('2GHz')