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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-16 18:48:15 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-16 18:48:15 -0400 |
| commit | f3976f9cd98ef21ae643fbbc0c6ba3ec35df43bb (patch) | |
| tree | aee8692520309a0b9b14f9093f6839c432d1960a /tests/configs | |
| parent | df3af8018e5a252f7c4e8f52b872263c8ab375cc (diff) | |
| download | gem5-f3976f9cd98ef21ae643fbbc0c6ba3ec35df43bb.tar.xz | |
More regression updates.
Get rid of caches in simple-timing config for now.
tests/SConscript:
another line for diff to ignore
tests/configs/simple-timing.py:
turn off caches for now
tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout:
update for inst/tick rate (old one was debug?)
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
works now (no caches)
--HG--
extra : convert_revision : 472030f63297346976db6274a78235c93d4eef8e
Diffstat (limited to 'tests/configs')
| -rw-r--r-- | tests/configs/simple-timing.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/configs/simple-timing.py b/tests/configs/simple-timing.py index 823a8aec1..8be0c0b3b 100644 --- a/tests/configs/simple-timing.py +++ b/tests/configs/simple-timing.py @@ -37,8 +37,8 @@ class MyCache(BaseCache): tgts_per_mshr = 5 cpu = TimingSimpleCPU() -cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'), - MyCache(size = '2MB')) +#cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'), +# MyCache(size = '2MB')) system = System(cpu = cpu, physmem = PhysicalMemory(), |