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author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-06 11:11:42 -0500 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-06 11:11:42 -0500 |
commit | ddd179a4189d6f51f7be81567e1119aa67533dae (patch) | |
tree | 647c2b6b5a7a947e07c0639bd41b2df8fe3dd99e /tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt | |
parent | 46b56bb7b6ac2a5f069aa1f79279f46d0395eb15 (diff) | |
download | gem5-ddd179a4189d6f51f7be81567e1119aa67533dae.tar.xz |
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
Diffstat (limited to 'tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt')
-rw-r--r-- | tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt index c09103f51..8e02b536f 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt +++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt @@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 4206850 # Nu global.BPredUnit.condPredicted 70112297 # Number of conditional branches predicted global.BPredUnit.lookups 76039028 # Number of BP lookups global.BPredUnit.usedRAS 1692219 # Number of times the RAS was used to get a target. -host_inst_rate 225803 # Simulator instruction rate (inst/s) -host_mem_usage 201396 # Number of bytes of host memory used -host_seconds 2504.62 # Real time elapsed on the host -host_tick_rate 66707870 # Simulator tick rate (ticks/s) +host_inst_rate 204243 # Simulator instruction rate (inst/s) +host_mem_usage 202188 # Number of bytes of host memory used +host_seconds 2769.01 # Real time elapsed on the host +host_tick_rate 60338522 # Simulator tick rate (ticks/s) memdepunit.memDep.conflictingLoads 19292303 # Number of conflicting loads. memdepunit.memDep.conflictingStores 14732751 # Number of conflicting stores. memdepunit.memDep.insertedLoads 126977207 # Number of loads inserted to the mem dependence unit. |