Update stats for new single bad-address responder.

Mostly just config.ini updates, though the different response
latency for bad addresses caused very minor timing changes
in the O3 Linux boot tests.

3 files changed, 14 insertions, 17 deletions

diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
index a28c57257..96f36a5ca 100644
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
@@ -104,11 +104,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -277,11 +276,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -313,11 +311,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -356,12 +353,12 @@ type=ExeTracer
 [system.cpu.workload]
 type=LiveProcess
 cmd=gzip input.log 1
-cwd=build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing
+cwd=build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing
 egid=100
 env=
 errout=cerr
 euid=100
-executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/gzip
+executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout
index 45435b4fd..9ba264ef1 100755
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr 14 2009 23:40:03
-M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update
-M5 started Apr 14 2009 23:40:05
-M5 executing on phenom
-command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 17:09:58
+M5 executing on zizzer
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
index 5e89094d1..090a41f44 100644
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 252050                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 207828                       # Number of bytes of host memory used
-host_seconds                                  2243.81                       # Real time elapsed on the host
-host_tick_rate                               74461791                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 211142                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 204372                       # Number of bytes of host memory used
+host_seconds                                  2678.54                       # Real time elapsed on the host
+host_tick_rate                               62376647                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   565552443                       # Number of instructions simulated
 sim_seconds                                  0.167078                       # Number of seconds simulated