sparc: update long regressions

4 files changed, 28 insertions, 31 deletions

diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
index 0b3b6266f..215751210 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
@@ -61,7 +61,7 @@ type=ExeTracer
 [system.cpu.workload]
 type=LiveProcess
 cmd=gzip input.log 1
-cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
 egid=100
 env=
 errout=cerr
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr
index eabe42249..e45cd058f 100755
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
 hack: be nice to actually delete the event here
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
index 6bfdef722..98d918157 100755
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
@@ -1,14 +1,12 @@
-M5 Simulator System
+Redirecting stdout to build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic/simerr
+gem5 Simulator System.  http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
 
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:19:46
-M5 started Apr 19 2011 12:21:44
-M5 executing on maize
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+gem5 compiled Jun 12 2011 07:14:44
+gem5 started Jun 12 2011 07:15:22
+gem5 executing on zizzer
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 spec_init
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
index d5fea60de..920d55128 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
@@ -1,34 +1,34 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                4954155                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 197572                       # Number of bytes of host memory used
-host_seconds                                   300.66                       # Real time elapsed on the host
-host_tick_rate                             2477084432                       # Simulator tick rate (ticks/s)
-sim_freq                                 1000000000000                       # Frequency of simulated ticks
-sim_insts                                  1489523295                       # Number of instructions simulated
 sim_seconds                                  0.744764                       # Number of seconds simulated
 sim_ticks                                744764119000                       # Number of ticks simulated
-system.cpu.idle_fraction                            0                       # Percentage of idle cycles
-system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
+sim_freq                                 1000000000000                       # Frequency of simulated ticks
+host_inst_rate                                2563815                       # Simulator instruction rate (inst/s)
+host_tick_rate                             1281911834                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 220472                       # Number of bytes of host memory used
+host_seconds                                   580.98                       # Real time elapsed on the host
+sim_insts                                  1489523295                       # Number of instructions simulated
+system.cpu.workload.num_syscalls                   49                       # Number of system calls
 system.cpu.numCycles                       1489528239                       # number of cpu cycles simulated
-system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.num_busy_cycles                 1489528239                       # Number of busy cycles
-system.cpu.num_conditional_control_insts            0                       # number of instructions that are conditional controls
-system.cpu.num_fp_alu_accesses                8454127                       # Number of float alu accesses
-system.cpu.num_fp_insts                       8454127                       # number of float instructions
-system.cpu.num_fp_register_reads             16769332                       # number of times the floating registers were read
-system.cpu.num_fp_register_writes            10359244                       # number of times the floating registers were written
-system.cpu.num_func_calls                           0                       # number of times a function call or return occured
-system.cpu.num_idle_cycles                          0                       # Number of idle cycles
+system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.num_insts                       1489523295                       # Number of instructions executed
 system.cpu.num_int_alu_accesses            1319481298                       # Number of integer alu accesses
+system.cpu.num_fp_alu_accesses                8454127                       # Number of float alu accesses
+system.cpu.num_func_calls                     1207835                       # number of times a function call or return occured
+system.cpu.num_conditional_control_insts     78161763                       # number of instructions that are conditional controls
 system.cpu.num_int_insts                   1319481298                       # number of integer instructions
+system.cpu.num_fp_insts                       8454127                       # number of float instructions
 system.cpu.num_int_register_reads          2499743582                       # number of times the integer registers were read
 system.cpu.num_int_register_writes         1234411208                       # number of times the integer registers were written
-system.cpu.num_load_insts                   402515346                       # Number of load instructions
+system.cpu.num_fp_register_reads             16769332                       # number of times the floating registers were read
+system.cpu.num_fp_register_writes            10359244                       # number of times the floating registers were written
 system.cpu.num_mem_refs                     569365767                       # number of memory refs
+system.cpu.num_load_insts                   402515346                       # Number of load instructions
 system.cpu.num_store_insts                  166850421                       # Number of store instructions
-system.cpu.workload.num_syscalls                   49                       # Number of system calls
+system.cpu.num_idle_cycles                          0                       # Number of idle cycles
+system.cpu.num_busy_cycles                 1489528239                       # Number of busy cycles
+system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
+system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 
 ---------- End Simulation Statistics   ----------