summaryrefslogtreecommitdiff
path: root/tests/long/00.gzip/ref/sparc/linux
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:19:50 +0000
committerAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:19:50 +0000
commita17dbdf8834b84f05a8f5154a74ac819fe8adc7c (patch)
tree8761136c790b84e20d6df2e84207eca3c553984b /tests/long/00.gzip/ref/sparc/linux
parentbd55c9e2af7fd6c06af48a020c29cb33ba1ca3fc (diff)
downloadgem5-a17dbdf8834b84f05a8f5154a74ac819fe8adc7c.tar.xz
stats: Update stats for final tick and memory bandwidth patches
Diffstat (limited to 'tests/long/00.gzip/ref/sparc/linux')
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini10
-rwxr-xr-xtests/long/00.gzip/ref/sparc/linux/o3-timing/simout6
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt19
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini12
-rwxr-xr-xtests/long/00.gzip/ref/sparc/linux/simple-atomic/simout6
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt19
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini10
-rwxr-xr-xtests/long/00.gzip/ref/sparc/linux/simple-timing/simout6
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt19
9 files changed, 73 insertions, 34 deletions
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
index f1874f64f..dcba73ec2 100644
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=DerivO3CPU
@@ -477,7 +479,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -495,7 +497,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing
+cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing
egid=100
env=
errout=cerr
@@ -519,7 +521,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -529,5 +531,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
index df0fa130a..a835cbd79 100755
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 30 2011 17:14:16
-gem5 started Nov 30 2011 17:16:48
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 06:17:40
gem5 executing on zizzer
-command line: build/SPARC_SE/gem5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
index 8c5bfcb3c..e4d9fca07 100644
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.408816 # Number of seconds simulated
sim_ticks 408816360000 # Number of ticks simulated
+final_tick 408816360000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 252046 # Simulator instruction rate (inst/s)
-host_tick_rate 73306837 # Simulator tick rate (ticks/s)
-host_mem_usage 206388 # Number of bytes of host memory used
-host_seconds 5576.78 # Real time elapsed on the host
+host_inst_rate 175830 # Simulator instruction rate (inst/s)
+host_tick_rate 51139829 # Simulator tick rate (ticks/s)
+host_mem_usage 215728 # Number of bytes of host memory used
+host_seconds 7994.10 # Real time elapsed on the host
sim_insts 1405604152 # Number of instructions simulated
+system.physmem.bytes_read 6021376 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 81792 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 3792448 # Number of bytes written to this memory
+system.physmem.num_reads 94084 # Number of read requests responded to by this memory
+system.physmem.num_writes 59257 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 14728804 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 200070 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 9276654 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 24005458 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 49 # Number of system calls
system.cpu.numCycles 817632721 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
index 864c2771b..b52495d06 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -45,8 +47,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu.dtb]
type=SparcTLB
@@ -62,7 +64,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
egid=100
env=
errout=cerr
@@ -86,7 +88,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
@@ -96,5 +98,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
index 3eb09159b..d2df5cc09 100755
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 30 2011 17:14:16
-gem5 started Nov 30 2011 17:16:48
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 06:18:03
gem5 executing on zizzer
-command line: build/SPARC_SE/gem5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
index ae12e23e4..afe2bae4f 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.744764 # Number of seconds simulated
sim_ticks 744764119000 # Number of ticks simulated
+final_tick 744764119000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 4241689 # Simulator instruction rate (inst/s)
-host_tick_rate 2120851440 # Simulator tick rate (ticks/s)
-host_mem_usage 196528 # Number of bytes of host memory used
-host_seconds 351.16 # Real time elapsed on the host
+host_inst_rate 3773289 # Simulator instruction rate (inst/s)
+host_tick_rate 1886650577 # Simulator tick rate (ticks/s)
+host_mem_usage 205844 # Number of bytes of host memory used
+host_seconds 394.75 # Real time elapsed on the host
sim_insts 1489523295 # Number of instructions simulated
+system.physmem.bytes_read 7326269637 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 5940452044 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 614672063 # Number of bytes written to this memory
+system.physmem.num_reads 1887625855 # Number of read requests responded to by this memory
+system.physmem.num_writes 166846816 # Number of write requests responded to by this memory
+system.physmem.num_other 1326 # Number of other requests responded to by this memory
+system.physmem.bw_read 9837033566 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 7976286575 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 825324485 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 10662358051 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 49 # Number of system calls
system.cpu.numCycles 1489528239 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
index 6dbddf888..ea98a23a1 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=TimingSimpleCPU
@@ -147,7 +149,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -165,7 +167,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing
+cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing
egid=100
env=
errout=cerr
@@ -189,7 +191,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -199,5 +201,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout b/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout
index 4a77ef60d..b26fb3f41 100755
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 30 2011 17:14:16
-gem5 started Nov 30 2011 17:16:48
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 06:19:05
gem5 executing on zizzer
-command line: build/SPARC_SE/gem5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt
index d75fccee8..059312926 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 2.064259 # Number of seconds simulated
sim_ticks 2064258667000 # Number of ticks simulated
+final_tick 2064258667000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2284016 # Simulator instruction rate (inst/s)
-host_tick_rate 3165307188 # Simulator tick rate (ticks/s)
-host_mem_usage 205232 # Number of bytes of host memory used
-host_seconds 652.15 # Real time elapsed on the host
+host_inst_rate 1766930 # Simulator instruction rate (inst/s)
+host_tick_rate 2448703239 # Simulator tick rate (ticks/s)
+host_mem_usage 214556 # Number of bytes of host memory used
+host_seconds 843.00 # Real time elapsed on the host
sim_insts 1489523295 # Number of instructions simulated
+system.physmem.bytes_read 5909952 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 70592 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 3778240 # Number of bytes written to this memory
+system.physmem.num_reads 92343 # Number of read requests responded to by this memory
+system.physmem.num_writes 59035 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 2862990 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 34197 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 1830313 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 4693303 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 49 # Number of system calls
system.cpu.numCycles 4128517334 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started