Update statistics for the last three revisions

--HG--
extra : convert_revision : 117e2a40bd6e0867d013a3a6076fb758ac526d24

7 files changed, 29 insertions, 41 deletions

diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
index 0a81b23fb..c535b6427 100644
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect                4207318                       # Nu
 global.BPredUnit.condPredicted               70088985                       # Number of conditional branches predicted
 global.BPredUnit.lookups                     76017379                       # Number of BP lookups
 global.BPredUnit.usedRAS                      1692882                       # Number of times the RAS was used to get a target.
-host_inst_rate                                 211348                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 182448                       # Number of bytes of host memory used
-host_seconds                                  2675.93                       # Real time elapsed on the host
-host_tick_rate                               60738573                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 209676                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 200632                       # Number of bytes of host memory used
+host_seconds                                  2697.27                       # Real time elapsed on the host
+host_tick_rate                               60257939                       # Simulator tick rate (ticks/s)
 memdepunit.memDep.conflictingLoads           16721732                       # Number of conflicting loads.
 memdepunit.memDep.conflictingStores          11866335                       # Number of conflicting stores.
 memdepunit.memDep.insertedLoads             126743752                       # Number of loads inserted to the mem dependence unit.
@@ -157,7 +157,7 @@ system.cpu.fetch.SquashCycles                 4233156                       # Nu
 system.cpu.fetch.branchRate                  0.233854                       # Number of branch fetches per cycle
 system.cpu.fetch.icacheStallCycles           65923007                       # Number of cycles fetch is stalled on an Icache miss
 system.cpu.fetch.predictedBranches           67369318                       # Number of branches that fetch has predicted taken
-system.cpu.fetch.rate                        2.146836                       # Number of inst fetches per cycle
+system.cpu.fetch.rate                        2.146834                       # Number of inst fetches per cycle
 system.cpu.fetch.rateDist.start_dist                           # Number of instructions fetched each cycle (Total)
 system.cpu.fetch.rateDist.samples           325063615                      
 system.cpu.fetch.rateDist.min_value                 0                      
@@ -236,10 +236,10 @@ system.cpu.icache.tagsinuse                770.534444                       # Cy
 system.cpu.icache.total_refs                 65922018                       # Total number of references to valid blocks.
 system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.icache.writebacks                        0                       # number of writebacks
-system.cpu.idleCycles                          190397                       # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu.idleCycles                             278                       # Total number of cycles that the CPU has spent unscheduled due to idling
 system.cpu.iew.EXEC:branches                 67319692                       # Number of branches executed
 system.cpu.iew.EXEC:nop                      42991424                       # number of nop insts executed
-system.cpu.iew.EXEC:rate                     1.842347                       # Inst execution rate
+system.cpu.iew.EXEC:rate                     1.842345                       # Inst execution rate
 system.cpu.iew.EXEC:refs                    163918711                       # number of memory reference insts executed
 system.cpu.iew.EXEC:stores                   41167815                       # Number of stores executed
 system.cpu.iew.EXEC:swp                             0                       # number of swp insts executed
@@ -249,7 +249,7 @@ system.cpu.iew.WB:fanout                     0.805927                       # av
 system.cpu.iew.WB:penalized                         0                       # number of instrctions required to write to 'other' IQ
 system.cpu.iew.WB:penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
 system.cpu.iew.WB:producers                 395691865                       # num instructions producing a value
-system.cpu.iew.WB:rate                       1.832664                       # insts written-back per cycle
+system.cpu.iew.WB:rate                       1.832662                       # insts written-back per cycle
 system.cpu.iew.WB:sent                      596897738                       # cumulative count of insts sent to commit
 system.cpu.iew.branchMispredicts              4671822                       # Number of branch mispredicts detected at execute
 system.cpu.iew.iewBlockCycles                  211982                       # Number of cycles IEW is blocking
@@ -279,8 +279,8 @@ system.cpu.iew.lsq.thread.0.squashedStores      3229074                       #
 system.cpu.iew.memOrderViolationEvents          28955                       # Number of memory order violations
 system.cpu.iew.predictedNotTakenIncorrect       540642                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.predictedTakenIncorrect        4131180                       # Number of branches that were predicted taken incorrectly
-system.cpu.ipc                               1.739821                       # IPC: Instructions Per Cycle
-system.cpu.ipc_total                         1.739821                       # IPC: Total IPC of All Threads
+system.cpu.ipc                               1.739819                       # IPC: Instructions Per Cycle
+system.cpu.ipc_total                         1.739819                       # IPC: Total IPC of All Threads
 system.cpu.iq.ISSUE:FU_type_0               605296760                       # Type of FU issued
 system.cpu.iq.ISSUE:FU_type_0.start_dist
                       No_OpClass            0      0.00%            # Type of FU issued
@@ -331,7 +331,7 @@ system.cpu.iq.ISSUE:issued_per_cycle.min_value            0
 system.cpu.iq.ISSUE:issued_per_cycle.max_value            8                      
 system.cpu.iq.ISSUE:issued_per_cycle.end_dist
 
-system.cpu.iq.ISSUE:rate                     1.862087                       # Inst issue rate
+system.cpu.iq.ISSUE:rate                     1.862085                       # Inst issue rate
 system.cpu.iq.iqInstsAdded                  619382498                       # Number of instructions added to the IQ (excludes non-spec)
 system.cpu.iq.iqInstsIssued                 605296760                       # Number of instructions issued
 system.cpu.iq.iqNonSpecInstsAdded                  22                       # Number of non-speculative instructions added to the IQ
@@ -428,7 +428,7 @@ system.cpu.l2cache.tagsinuse              8150.643180                       # Cy
 system.cpu.l2cache.total_refs                   66110                       # Total number of references to valid blocks.
 system.cpu.l2cache.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
 system.cpu.l2cache.writebacks                       0                       # number of writebacks
-system.cpu.numCycles                        325063615                       # number of cpu cycles simulated
+system.cpu.numCycles                        325063893                       # number of cpu cycles simulated
 system.cpu.rename.RENAME:BlockCycles         11040699                       # Number of cycles rename is blocking
 system.cpu.rename.RENAME:CommittedMaps      463854889                       # Number of HB maps that are committed
 system.cpu.rename.RENAME:IQFullEvents        31586100                       # Number of times rename has blocked due to IQ full
diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
index b76b4e6c1..9e54c6441 100644
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1730291                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 181616                       # Number of bytes of host memory used
-host_seconds                                   347.84                       # Real time elapsed on the host
-host_tick_rate                             2208778962                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1400395                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 199872                       # Number of bytes of host memory used
+host_seconds                                   429.78                       # Real time elapsed on the host
+host_tick_rate                             1787654853                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   601856964                       # Number of instructions simulated
 sim_seconds                                  0.768293                       # Number of seconds simulated
@@ -245,7 +245,7 @@ system.cpu.l2cache.total_refs                   52084                       # To
 system.cpu.l2cache.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
 system.cpu.l2cache.writebacks                       0                       # number of writebacks
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.numCycles                     768292872000                       # number of cpu cycles simulated
+system.cpu.numCycles                       1536585744                       # number of cpu cycles simulated
 system.cpu.num_insts                        601856964                       # Number of instructions executed
 system.cpu.num_refs                         154866966                       # Number of memory references
 system.cpu.workload.PROG:num_syscalls              17                       # Number of system calls
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt b/tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt
index f737a8e3b..ae6ff07ca 100644
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect               84447535                       # Nu
 global.BPredUnit.condPredicted              256528366                       # Number of conditional branches predicted
 global.BPredUnit.lookups                    256528366                       # Number of BP lookups
 global.BPredUnit.usedRAS                            0                       # Number of times the RAS was used to get a target.
-host_inst_rate                                  94020                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 184848                       # Number of bytes of host memory used
-host_seconds                                 14950.16                       # Real time elapsed on the host
-host_tick_rate                               73409017                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 101903                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 202864                       # Number of bytes of host memory used
+host_seconds                                 13793.57                       # Real time elapsed on the host
+host_tick_rate                               79564409                       # Simulator tick rate (ticks/s)
 memdepunit.memDep.conflictingLoads          458856790                       # Number of conflicting loads.
 memdepunit.memDep.conflictingStores         141228058                       # Number of conflicting stores.
 memdepunit.memDep.insertedLoads             745627925                       # Number of loads inserted to the mem dependence unit.
@@ -229,7 +229,7 @@ system.cpu.icache.tagsinuse               1042.348080                       # Cy
 system.cpu.icache.total_refs                355014725                       # Total number of references to valid blocks.
 system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.icache.writebacks                        0                       # number of writebacks
-system.cpu.idleCycles                           94965                       # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu.idleCycles                             155                       # Total number of cycles that the CPU has spent unscheduled due to idling
 system.cpu.iew.EXEC:branches                128778452                       # Number of branches executed
 system.cpu.iew.EXEC:nop                     354384689                       # number of nop insts executed
 system.cpu.iew.EXEC:rate                     0.865881                       # Inst execution rate
@@ -242,7 +242,7 @@ system.cpu.iew.WB:fanout                     0.963032                       # av
 system.cpu.iew.WB:penalized                         0                       # number of instrctions required to write to 'other' IQ
 system.cpu.iew.WB:penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
 system.cpu.iew.WB:producers                1442442170                       # num instructions producing a value
-system.cpu.iew.WB:rate                       0.850638                       # insts written-back per cycle
+system.cpu.iew.WB:rate                       0.850637                       # insts written-back per cycle
 system.cpu.iew.WB:sent                     1877161076                       # cumulative count of insts sent to commit
 system.cpu.iew.branchMispredicts             91327681                       # Number of branch mispredicts detected at execute
 system.cpu.iew.iewBlockCycles                  454443                       # Number of cycles IEW is blocking
@@ -417,7 +417,7 @@ system.cpu.l2cache.tagsinuse              8527.413561                       # Cy
 system.cpu.l2cache.total_refs                   96715                       # Total number of references to valid blocks.
 system.cpu.l2cache.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
 system.cpu.l2cache.writebacks                       0                       # number of writebacks
-system.cpu.numCycles                       2194953627                       # number of cpu cycles simulated
+system.cpu.numCycles                       2194953782                       # number of cpu cycles simulated
 system.cpu.rename.RENAME:BlockCycles         13000888                       # Number of cycles rename is blocking
 system.cpu.rename.RENAME:CommittedMaps     1244771057                       # Number of HB maps that are committed
 system.cpu.rename.RENAME:FullRegisterEvents            9                       # Number of times there has been no free registers
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr
index 6fe2fe04f..70bd1351f 100644
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr
@@ -1,6 +1,2 @@
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0xb4000 length 0x10.
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0x0 length 0x0.
 warn: Entering event queue @ 0.  Starting simulation...
 warn: Ignoring request to flush register windows.
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
index 6fe2fe04f..70bd1351f 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
@@ -1,6 +1,2 @@
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0xb4000 length 0x10.
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0x0 length 0x0.
 warn: Entering event queue @ 0.  Starting simulation...
 warn: Ignoring request to flush register windows.
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt
index 2a33edee7..50e7d390e 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1120793                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 183848                       # Number of bytes of host memory used
-host_seconds                                  1328.98                       # Real time elapsed on the host
-host_tick_rate                             1558243449                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1001521                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 201940                       # Number of bytes of host memory used
+host_seconds                                  1487.25                       # Real time elapsed on the host
+host_tick_rate                             1392419330                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                  1489514761                       # Number of instructions simulated
 sim_seconds                                  2.070880                       # Number of seconds simulated
@@ -239,7 +239,7 @@ system.cpu.l2cache.total_refs                   62289                       # To
 system.cpu.l2cache.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
 system.cpu.l2cache.writebacks                       0                       # number of writebacks
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.numCycles                     2070879986000                       # number of cpu cycles simulated
+system.cpu.numCycles                       4141759972                       # number of cpu cycles simulated
 system.cpu.num_insts                       1489514761                       # Number of instructions executed
 system.cpu.num_refs                         569364430                       # Number of memory references
 system.cpu.workload.PROG:num_syscalls              19                       # Number of system calls
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr
index 6fe2fe04f..70bd1351f 100644
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr
@@ -1,6 +1,2 @@
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0xb4000 length 0x10.
-warn: More than two loadable segments in ELF object.
-warn: Ignoring segment @ 0x0 length 0x0.
 warn: Entering event queue @ 0.  Starting simulation...
 warn: Ignoring request to flush register windows.