tests: updates for stat name change

2 files changed, 16 insertions, 16 deletions

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
index 7cdd9066f..64f7ad077 100755
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
@@ -5,8 +5,8 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr 19 2011 13:41:05
-M5 started Apr 19 2011 13:41:08
+M5 compiled Apr 21 2011 12:05:49
+M5 started Apr 21 2011 15:19:16
 M5 executing on maize
 command line: build/ARM_FS/m5.fast -d build/ARM_FS/tests/fast/long/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM_FS/tests/fast/long/10.linux-boot/arm/linux/realview-o3
 Global frequency set at 1000000000000 ticks per second
diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
index 4fdec7dfb..f3579a27d 100644
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 182620                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 341656                       # Number of bytes of host memory used
-host_seconds                                   284.63                       # Real time elapsed on the host
-host_tick_rate                              290422658                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 112653                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 348660                       # Number of bytes of host memory used
+host_seconds                                   461.40                       # Real time elapsed on the host
+host_tick_rate                              179154205                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    51978682                       # Number of instructions simulated
 sim_seconds                                  0.082662                       # Number of seconds simulated
@@ -356,16 +356,16 @@ system.cpu.iew.iewIdleCycles                        0                       # Nu
 system.cpu.iew.iewLSQFullEvents                 45641                       # Number of times the LSQ has become full, causing a stall
 system.cpu.iew.iewSquashCycles                2568567                       # Number of cycles IEW is squashing
 system.cpu.iew.iewUnblockCycles                263948                       # Number of cycles IEW is unblocking
-system.cpu.iew.lsq.thread.0.blockedLoads            0                       # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread.0.cacheBlocked         8235                       # Number of times an access to memory failed due to the cache being blocked
-system.cpu.iew.lsq.thread.0.forwLoads          331109                       # Number of loads that had data forwarded from stores
-system.cpu.iew.lsq.thread.0.ignoredResponses         7560                       # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread.0.invAddrLoads            0                       # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread.0.invAddrSwpfs            0                       # Number of software prefetches ignored due to an invalid address
-system.cpu.iew.lsq.thread.0.memOrderViolation       280540                       # Number of memory ordering violations
-system.cpu.iew.lsq.thread.0.rescheduledLoads     17000484                       # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread.0.squashedLoads      3641022                       # Number of loads squashed
-system.cpu.iew.lsq.thread.0.squashedStores      1649637                       # Number of stores squashed
+system.cpu.iew.lsq.thread0.blockedLoads             0                       # Number of blocked loads due to partial load-store forwarding
+system.cpu.iew.lsq.thread0.cacheBlocked          8235                       # Number of times an access to memory failed due to the cache being blocked
+system.cpu.iew.lsq.thread0.forwLoads           331109                       # Number of loads that had data forwarded from stores
+system.cpu.iew.lsq.thread0.ignoredResponses         7560                       # Number of memory responses ignored because the instruction is squashed
+system.cpu.iew.lsq.thread0.invAddrLoads             0                       # Number of loads ignored due to an invalid address
+system.cpu.iew.lsq.thread0.invAddrSwpfs             0                       # Number of software prefetches ignored due to an invalid address
+system.cpu.iew.lsq.thread0.memOrderViolation       280540                       # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.rescheduledLoads     17000484                       # Number of loads that were rescheduled
+system.cpu.iew.lsq.thread0.squashedLoads      3641022                       # Number of loads squashed
+system.cpu.iew.lsq.thread0.squashedStores      1649637                       # Number of stores squashed
 system.cpu.iew.memOrderViolationEvents         280540                       # Number of memory order violations
 system.cpu.iew.predictedNotTakenIncorrect       186102                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.predictedTakenIncorrect         525140                       # Number of branches that were predicted taken incorrectly