diff options
| author | Nathan Binkert <nate@binkert.org> | 2011-04-19 18:45:23 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2011-04-19 18:45:23 -0700 |
| commit | 8c1563096c5aaf4123bf9ce5116aff3ce44dfd3b (patch) | |
| tree | 8caf62f25cfd5047cd4f2c0f357267be9d79d7c4 /tests/long/10.linux-boot/ref/arm | |
| parent | 63371c86648ed65a453a95aec80f326f15a9666d (diff) | |
| download | gem5-8c1563096c5aaf4123bf9ce5116aff3ce44dfd3b.tar.xz | |
tests: update stats for name changes
Diffstat (limited to 'tests/long/10.linux-boot/ref/arm')
4 files changed, 175 insertions, 175 deletions
diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini index 083bb5627..98177ee67 100644 --- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini +++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini @@ -11,7 +11,7 @@ children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview t boot_cpu_frequency=500 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0 init_param=0 -kernel=/chips/pd/randd/dist/binaries/vmlinux.arm +kernel=/dist/m5/system/binaries/vmlinux.arm load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=timing @@ -495,7 +495,7 @@ type=ExeTracer [system.diskmem] type=PhysicalMemory -file=/chips/pd/randd/dist/disks/ael-arm.ext2 +file=/dist/m5/system/disks/ael-arm.ext2 latency=30000 latency_var=0 null=false diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout index 83f702085..7cdd9066f 100755 --- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout +++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 4 2011 11:17:23 -M5 started Apr 4 2011 11:17:27 -M5 executing on u200439-lin.austin.arm.com -command line: build/ARM_FS/m5.opt -d build/ARM_FS/tests/opt/long/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM_FS/tests/opt/long/10.linux-boot/arm/linux/realview-o3 +M5 compiled Apr 19 2011 13:41:05 +M5 started Apr 19 2011 13:41:08 +M5 executing on maize +command line: build/ARM_FS/m5.fast -d build/ARM_FS/tests/fast/long/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM_FS/tests/fast/long/10.linux-boot/arm/linux/realview-o3 Global frequency set at 1000000000000 ticks per second -info: kernel located at: /chips/pd/randd/dist/binaries/vmlinux.arm +info: kernel located at: /dist/m5/system/binaries/vmlinux.arm info: Entering event queue @ 0. Starting simulation... Exiting @ tick 82662490500 because m5_exit instruction encountered diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt index edd79728c..4fdec7dfb 100644 --- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt +++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 92348 # Simulator instruction rate (inst/s) -host_mem_usage 389996 # Number of bytes of host memory used -host_seconds 562.86 # Real time elapsed on the host -host_tick_rate 146862568 # Simulator tick rate (ticks/s) +host_inst_rate 182620 # Simulator instruction rate (inst/s) +host_mem_usage 341656 # Number of bytes of host memory used +host_seconds 284.63 # Real time elapsed on the host +host_tick_rate 290422658 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 51978682 # Number of instructions simulated sim_seconds 0.082662 # Number of seconds simulated @@ -16,38 +16,38 @@ system.cpu.BPredUnit.condIncorrect 665245 # Nu system.cpu.BPredUnit.condPredicted 11246732 # Number of conditional branches predicted system.cpu.BPredUnit.lookups 13229511 # Number of BP lookups system.cpu.BPredUnit.usedRAS 787550 # Number of times the RAS was used to get a target. -system.cpu.commit.COM:branches 8445621 # Number of branches committed -system.cpu.commit.COM:bw_lim_events 801383 # number cycles where commit BW limit reached -system.cpu.commit.COM:bw_limited 0 # number of insts not committed due to BW limits -system.cpu.commit.COM:committed_per_cycle::samples 93507712 # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::mean 0.557193 # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::stdev 1.351787 # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::0 71892468 76.88% 76.88% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::1 10568988 11.30% 88.19% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::2 3427833 3.67% 91.85% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::3 1711600 1.83% 93.68% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::4 3527395 3.77% 97.46% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::5 741726 0.79% 98.25% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::6 541099 0.58% 98.83% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::7 295220 0.32% 99.14% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::8 801383 0.86% 100.00% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::min_value 0 # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle::total 93507712 # Number of insts commited each cycle -system.cpu.commit.COM:count 52101862 # Number of instructions committed -system.cpu.commit.COM:fp_insts 6017 # Number of committed floating point instructions. -system.cpu.commit.COM:function_calls 529734 # Number of function calls committed. -system.cpu.commit.COM:int_insts 42509491 # Number of committed integer instructions. -system.cpu.commit.COM:loads 9207015 # Number of loads committed -system.cpu.commit.COM:membars 3 # Number of memory barriers committed -system.cpu.commit.COM:refs 16293738 # Number of memory references committed -system.cpu.commit.COM:swp_count 0 # Number of s/w prefetches committed system.cpu.commit.branchMispredicts 641726 # The number of times a branch was mispredicted +system.cpu.commit.branches 8445621 # Number of branches committed +system.cpu.commit.bw_lim_events 801383 # number cycles where commit BW limit reached +system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.commit.commitCommittedInsts 52101862 # The number of committed instructions system.cpu.commit.commitNonSpecStalls 2963383 # The number of times commit has been forced to stall to communicate backwards system.cpu.commit.commitSquashedInsts 16147201 # The number of squashed insts skipped by commit +system.cpu.commit.committed_per_cycle::samples 93507712 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::mean 0.557193 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::stdev 1.351787 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::0 71892468 76.88% 76.88% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::1 10568988 11.30% 88.19% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::2 3427833 3.67% 91.85% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::3 1711600 1.83% 93.68% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::4 3527395 3.77% 97.46% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::5 741726 0.79% 98.25% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::6 541099 0.58% 98.83% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::7 295220 0.32% 99.14% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::8 801383 0.86% 100.00% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::total 93507712 # Number of insts commited each cycle +system.cpu.commit.count 52101862 # Number of instructions committed +system.cpu.commit.fp_insts 6017 # Number of committed floating point instructions. +system.cpu.commit.function_calls 529734 # Number of function calls committed. +system.cpu.commit.int_insts 42509491 # Number of committed integer instructions. +system.cpu.commit.loads 9207015 # Number of loads committed +system.cpu.commit.membars 3 # Number of memory barriers committed +system.cpu.commit.refs 16293738 # Number of memory references committed +system.cpu.commit.swp_count 0 # Number of s/w prefetches committed system.cpu.committedInsts 51978682 # Number of Instructions Simulated system.cpu.committedInsts_total 51978682 # Number of Instructions Simulated system.cpu.cpi 3.180631 # CPI: Cycles Per Instruction @@ -148,8 +148,8 @@ system.cpu.dcache.demand_mshr_misses 419458 # nu system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.occ_%::0 0.999513 # Average percentage of cache occupancy system.cpu.dcache.occ_blocks::0 511.750765 # Average occupied blocks per context +system.cpu.dcache.occ_percent::0 0.999513 # Average percentage of cache occupancy system.cpu.dcache.overall_accesses::0 16095916 # number of overall (read+write) accesses system.cpu.dcache.overall_accesses::1 0 # number of overall (read+write) accesses system.cpu.dcache.overall_accesses::total 16095916 # number of overall (read+write) accesses @@ -183,15 +183,15 @@ system.cpu.dcache.tagsinuse 511.750765 # Cy system.cpu.dcache.total_refs 13775411 # Total number of references to valid blocks. system.cpu.dcache.warmup_cycle 48224000 # Cycle when the warmup percentage was hit. system.cpu.dcache.writebacks 391506 # number of writebacks -system.cpu.decode.DECODE:BlockedCycles 53936622 # Number of cycles decode is blocked -system.cpu.decode.DECODE:BranchMispred 70601 # Number of times decode detected a branch misprediction -system.cpu.decode.DECODE:BranchResolved 1224137 # Number of times decode resolved a branch -system.cpu.decode.DECODE:DecodedInsts 76419738 # Number of instructions handled by decode -system.cpu.decode.DECODE:IdleCycles 23948605 # Number of cycles decode is idle -system.cpu.decode.DECODE:RunCycles 14435253 # Number of cycles decode is running -system.cpu.decode.DECODE:SquashCycles 2568567 # Number of cycles decode is squashing -system.cpu.decode.DECODE:SquashedInsts 235986 # Number of squashed instructions handled by decode -system.cpu.decode.DECODE:UnblockCycles 1187204 # Number of cycles decode is unblocking +system.cpu.decode.BlockedCycles 53936622 # Number of cycles decode is blocked +system.cpu.decode.BranchMispred 70601 # Number of times decode detected a branch misprediction +system.cpu.decode.BranchResolved 1224137 # Number of times decode resolved a branch +system.cpu.decode.DecodedInsts 76419738 # Number of instructions handled by decode +system.cpu.decode.IdleCycles 23948605 # Number of cycles decode is idle +system.cpu.decode.RunCycles 14435253 # Number of cycles decode is running +system.cpu.decode.SquashCycles 2568567 # Number of cycles decode is squashing +system.cpu.decode.SquashedInsts 235986 # Number of squashed instructions handled by decode +system.cpu.decode.UnblockCycles 1187204 # Number of cycles decode is unblocking system.cpu.dtb.accesses 35246983 # DTB accesses system.cpu.dtb.align_faults 1461 # Number of TLB faults due to alignment restrictions system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions @@ -299,8 +299,8 @@ system.cpu.icache.demand_mshr_misses 502982 # nu system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.occ_%::0 0.970025 # Average percentage of cache occupancy system.cpu.icache.occ_blocks::0 496.652768 # Average occupied blocks per context +system.cpu.icache.occ_percent::0 0.970025 # Average percentage of cache occupancy system.cpu.icache.overall_accesses::0 6553557 # number of overall (read+write) accesses system.cpu.icache.overall_accesses::1 0 # number of overall (read+write) accesses system.cpu.icache.overall_accesses::total 6553557 # number of overall (read+write) accesses @@ -335,21 +335,13 @@ system.cpu.icache.total_refs 6005950 # To system.cpu.icache.warmup_cycle 6210686000 # Cycle when the warmup percentage was hit. system.cpu.icache.writebacks 41369 # number of writebacks system.cpu.idleCycles 69248731 # Total number of cycles that the CPU has spent unscheduled due to idling -system.cpu.iew.EXEC:branches 10230019 # Number of branches executed -system.cpu.iew.EXEC:nop 166886 # number of nop insts executed -system.cpu.iew.EXEC:rate 0.475904 # Inst execution rate -system.cpu.iew.EXEC:refs 35985354 # number of memory reference insts executed -system.cpu.iew.EXEC:stores 7801149 # Number of stores executed -system.cpu.iew.EXEC:swp 0 # number of swp insts executed -system.cpu.iew.WB:consumers 62345618 # num instructions consuming a value -system.cpu.iew.WB:count 60884415 # cumulative count of insts written-back -system.cpu.iew.WB:fanout 0.509768 # average fanout of values written-back -system.cpu.iew.WB:penalized 0 # number of instrctions required to write to 'other' IQ -system.cpu.iew.WB:penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ -system.cpu.iew.WB:producers 31781773 # num instructions producing a value -system.cpu.iew.WB:rate 0.368271 # insts written-back per cycle -system.cpu.iew.WB:sent 78152559 # cumulative count of insts sent to commit system.cpu.iew.branchMispredicts 711242 # Number of branch mispredicts detected at execute +system.cpu.iew.exec_branches 10230019 # Number of branches executed +system.cpu.iew.exec_nop 166886 # number of nop insts executed +system.cpu.iew.exec_rate 0.475904 # Inst execution rate +system.cpu.iew.exec_refs 35985354 # number of memory reference insts executed +system.cpu.iew.exec_stores 7801149 # Number of stores executed +system.cpu.iew.exec_swp 0 # number of swp insts executed system.cpu.iew.iewBlockCycles 21406073 # Number of cycles IEW is blocking system.cpu.iew.iewDispLoadInsts 12848037 # Number of dispatched load instructions system.cpu.iew.iewDispNonSpecInsts 4002488 # Number of dispatched non-speculative instructions @@ -377,103 +369,93 @@ system.cpu.iew.lsq.thread.0.squashedStores 1649637 # system.cpu.iew.memOrderViolationEvents 280540 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 186102 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 525140 # Number of branches that were predicted taken incorrectly +system.cpu.iew.wb_consumers 62345618 # num instructions consuming a value +system.cpu.iew.wb_count 60884415 # cumulative count of insts written-back +system.cpu.iew.wb_fanout 0.509768 # average fanout of values written-back +system.cpu.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ +system.cpu.iew.wb_penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ +system.cpu.iew.wb_producers 31781773 # num instructions producing a value +system.cpu.iew.wb_rate 0.368271 # insts written-back per cycle +system.cpu.iew.wb_sent 78152559 # cumulative count of insts sent to commit system.cpu.int_regfile_reads 182840055 # number of integer regfile reads system.cpu.int_regfile_writes 43911822 # number of integer regfile writes system.cpu.ipc 0.314403 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.314403 # IPC: Total IPC of All Threads -system.cpu.iq.ISSUE:FU_type_0::No_OpClass 2393207 3.00% 3.00% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::IntAlu 40767716 51.13% 54.13% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::IntMult 71906 0.09% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::IntDiv 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatAdd 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatCmp 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatCvt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatMult 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatDiv 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::FloatSqrt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdAdd 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdAddAcc 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdAlu 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdCmp 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdCvt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdMisc 10 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdMult 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdMultAcc 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdShift 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdShiftAcc 6 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdSqrt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatAdd 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatAlu 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatCmp 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatCvt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatDiv 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatMisc 895 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatMult 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatMultAcc 6 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::SimdFloatSqrt 0 0.00% 54.22% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::MemRead 28538408 35.79% 90.01% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::MemWrite 7966700 9.99% 100.00% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued -system.cpu.iq.ISSUE:FU_type_0::total 79738854 # Type of FU issued -system.cpu.iq.ISSUE:fu_busy_cnt 4821847 # FU busy when requested -system.cpu.iq.ISSUE:fu_busy_rate 0.060470 # FU busy rate (busy events/executed inst) -system.cpu.iq.ISSUE:fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::IntAlu 5252 0.11% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::IntMult 1 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::IntDiv 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatAdd 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatCmp 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatCvt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatMult 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatDiv 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::FloatSqrt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdAdd 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdAddAcc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdAlu 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdCmp 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdCvt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdMisc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdMult 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdMultAcc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdShift 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdShiftAcc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdSqrt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatAdd 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatAlu 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatCmp 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatCvt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatDiv 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatMisc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatMult 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatMultAcc 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::SimdFloatSqrt 0 0.00% 0.11% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::MemRead 4503965 93.41% 93.52% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::MemWrite 312629 6.48% 100.00% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available -system.cpu.iq.ISSUE:fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available -system.cpu.iq.ISSUE:issued_per_cycle::samples 96076251 # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::mean 0.829954 # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::stdev 1.379344 # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::0 59918658 62.37% 62.37% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::1 16598524 17.28% 79.64% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::2 7253913 7.55% 87.19% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::3 4126106 4.29% 91.49% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::4 5947858 6.19% 97.68% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::5 1304063 1.36% 99.04% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::6 619735 0.65% 99.68% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::7 235123 0.24% 99.92% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::8 72271 0.08% 100.00% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle -system.cpu.iq.ISSUE:issued_per_cycle::total 96076251 # Number of insts issued each cycle -system.cpu.iq.ISSUE:rate 0.482316 # Inst issue rate +system.cpu.iq.FU_type_0::No_OpClass 2393207 3.00% 3.00% # Type of FU issued +system.cpu.iq.FU_type_0::IntAlu 40767716 51.13% 54.13% # Type of FU issued +system.cpu.iq.FU_type_0::IntMult 71906 0.09% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::IntDiv 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatMult 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMisc 10 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMult 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdShift 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdShiftAcc 6 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMisc 895 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMultAcc 6 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 54.22% # Type of FU issued +system.cpu.iq.FU_type_0::MemRead 28538408 35.79% 90.01% # Type of FU issued +system.cpu.iq.FU_type_0::MemWrite 7966700 9.99% 100.00% # Type of FU issued +system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued +system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued +system.cpu.iq.FU_type_0::total 79738854 # Type of FU issued system.cpu.iq.fp_alu_accesses 8555 # Number of floating point alu accesses system.cpu.iq.fp_inst_queue_reads 16356 # Number of floating instruction queue reads system.cpu.iq.fp_inst_queue_wakeup_accesses 6330 # Number of floating instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_writes 9324 # Number of floating instruction queue writes +system.cpu.iq.fu_busy_cnt 4821847 # FU busy when requested +system.cpu.iq.fu_busy_rate 0.060470 # FU busy rate (busy events/executed inst) +system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available +system.cpu.iq.fu_full::IntAlu 5252 0.11% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::IntMult 1 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::IntDiv 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatAdd 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatCmp 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatCvt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatMult 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatDiv 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatSqrt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAdd 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAlu 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdCmp 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdCvt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMisc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMult 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdShift 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdSqrt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 0.11% # attempts to use FU when none available +system.cpu.iq.fu_full::MemRead 4503965 93.41% 93.52% # attempts to use FU when none available +system.cpu.iq.fu_full::MemWrite 312629 6.48% 100.00% # attempts to use FU when none available +system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available +system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available system.cpu.iq.int_alu_accesses 82158939 # Number of integer alu accesses system.cpu.iq.int_inst_queue_reads 260560114 # Number of integer instruction queue reads system.cpu.iq.int_inst_queue_wakeup_accesses 60878085 # Number of integer instruction queue wakeup accesses @@ -485,6 +467,24 @@ system.cpu.iq.iqSquashedInstsExamined 17660461 # Nu system.cpu.iq.iqSquashedInstsIssued 127886 # Number of squashed instructions issued system.cpu.iq.iqSquashedNonSpecRemoved 1069030 # Number of squashed non-spec instructions that were removed system.cpu.iq.iqSquashedOperandsExamined 22275203 # Number of squashed operands that are examined and possibly removed from graph +system.cpu.iq.issued_per_cycle::samples 96076251 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::mean 0.829954 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::stdev 1.379344 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::0 59918658 62.37% 62.37% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::1 16598524 17.28% 79.64% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::2 7253913 7.55% 87.19% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::3 4126106 4.29% 91.49% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::4 5947858 6.19% 97.68% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::5 1304063 1.36% 99.04% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::6 619735 0.65% 99.68% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::7 235123 0.24% 99.92% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::8 72271 0.08% 100.00% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::total 96076251 # Number of insts issued each cycle +system.cpu.iq.rate 0.482316 # Inst issue rate system.cpu.itb.accesses 6566505 # DTB accesses system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions @@ -517,25 +517,25 @@ system.cpu.misc_regfile_writes 505947 # nu system.cpu.numCycles 165324982 # number of cpu cycles simulated system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.rename.RENAME:BlockCycles 33112132 # Number of cycles rename is blocking -system.cpu.rename.RENAME:CommittedMaps 36741742 # Number of HB maps that are committed -system.cpu.rename.RENAME:IQFullEvents 775024 # Number of times rename has blocked due to IQ full -system.cpu.rename.RENAME:IdleCycles 25585942 # Number of cycles rename is idle -system.cpu.rename.RENAME:LSQFullEvents 2464411 # Number of times rename has blocked due to LSQ full -system.cpu.rename.RENAME:ROBFullEvents 439406 # Number of times rename has blocked due to ROB full -system.cpu.rename.RENAME:RenameLookups 190546426 # Number of register rename lookups that rename has made -system.cpu.rename.RENAME:RenamedInsts 73652077 # Number of instructions processed by rename -system.cpu.rename.RENAME:RenamedOperands 53332963 # Number of destination operands rename has renamed -system.cpu.rename.RENAME:RunCycles 13017560 # Number of cycles rename is running -system.cpu.rename.RENAME:SquashCycles 2568567 # Number of cycles rename is squashing -system.cpu.rename.RENAME:UnblockCycles 5444932 # Number of cycles rename is unblocking -system.cpu.rename.RENAME:UndoneMaps 16591220 # Number of HB maps that are undone due to squashing -system.cpu.rename.RENAME:fp_rename_lookups 49319 # Number of floating rename lookups -system.cpu.rename.RENAME:int_rename_lookups 190497107 # Number of integer rename lookups -system.cpu.rename.RENAME:serializeStallCycles 16347118 # count of cycles rename stalled for serializing inst -system.cpu.rename.RENAME:serializingInsts 812559 # count of serializing insts renamed -system.cpu.rename.RENAME:skidInsts 14268469 # count of insts added to the skid buffer -system.cpu.rename.RENAME:tempSerializingInsts 662925 # count of temporary serializing insts renamed +system.cpu.rename.BlockCycles 33112132 # Number of cycles rename is blocking +system.cpu.rename.CommittedMaps 36741742 # Number of HB maps that are committed +system.cpu.rename.IQFullEvents 775024 # Number of times rename has blocked due to IQ full +system.cpu.rename.IdleCycles 25585942 # Number of cycles rename is idle +system.cpu.rename.LSQFullEvents 2464411 # Number of times rename has blocked due to LSQ full +system.cpu.rename.ROBFullEvents 439406 # Number of times rename has blocked due to ROB full +system.cpu.rename.RenameLookups 190546426 # Number of register rename lookups that rename has made +system.cpu.rename.RenamedInsts 73652077 # Number of instructions processed by rename +system.cpu.rename.RenamedOperands 53332963 # Number of destination operands rename has renamed +system.cpu.rename.RunCycles 13017560 # Number of cycles rename is running +system.cpu.rename.SquashCycles 2568567 # Number of cycles rename is squashing +system.cpu.rename.UnblockCycles 5444932 # Number of cycles rename is unblocking +system.cpu.rename.UndoneMaps 16591220 # Number of HB maps that are undone due to squashing +system.cpu.rename.fp_rename_lookups 49319 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 190497107 # Number of integer rename lookups +system.cpu.rename.serializeStallCycles 16347118 # count of cycles rename stalled for serializing inst +system.cpu.rename.serializingInsts 812559 # count of serializing insts renamed +system.cpu.rename.skidInsts 14268469 # count of insts added to the skid buffer +system.cpu.rename.tempSerializingInsts 662925 # count of temporary serializing insts renamed system.cpu.rob.rob_reads 160015001 # The number of ROB reads system.cpu.rob.rob_writes 139111158 # The number of ROB writes system.cpu.timesIdled 1092841 # Number of times that the entire CPU went into an idle state and unscheduled itself @@ -705,10 +705,10 @@ system.l2c.demand_mshr_misses 128445 # nu system.l2c.fast_writes 0 # number of fast writes performed system.l2c.mshr_cap_events 0 # number of times MSHR cap was activated system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate -system.l2c.occ_%::0 0.099470 # Average percentage of cache occupancy -system.l2c.occ_%::1 0.481649 # Average percentage of cache occupancy system.l2c.occ_blocks::0 6518.840874 # Average occupied blocks per context system.l2c.occ_blocks::1 31565.358061 # Average occupied blocks per context +system.l2c.occ_percent::0 0.099470 # Average percentage of cache occupancy +system.l2c.occ_percent::1 0.481649 # Average percentage of cache occupancy system.l2c.overall_accesses::0 923785 # number of overall (read+write) accesses system.l2c.overall_accesses::1 102462 # number of overall (read+write) accesses system.l2c.overall_accesses::total 1026247 # number of overall (read+write) accesses diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/status b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/status index cffda2d37..f27ebe211 100644 --- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/status +++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/status @@ -1 +1 @@ -build/ARM_FS/tests/opt/long/10.linux-boot/arm/linux/realview-o3 FAILED! +build/ARM_FS/tests/fast/long/10.linux-boot/arm/linux/realview-o3 FAILED! |