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authorNathan Binkert <nate@binkert.org>2009-03-07 14:30:55 -0800
committerNathan Binkert <nate@binkert.org>2009-03-07 14:30:55 -0800
commit5cf060576623f3681b497c46934fb4fe6f8853a6 (patch)
treee9b005046f2118e537528178da5f935dc55dc5c1 /tests/long/10.linux-boot
parentac7bda0212a22d86d9e24665998f294b96869680 (diff)
downloadgem5-5cf060576623f3681b497c46934fb4fe6f8853a6.tar.xz
tests: update tests because of changes in stat names and in the stats package
Diffstat (limited to 'tests/long/10.linux-boot')
-rwxr-xr-xtests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout10
-rw-r--r--tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt120
-rwxr-xr-xtests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout10
-rw-r--r--tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt64
4 files changed, 105 insertions, 99 deletions
diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
index 1910760d1..a6115dc06 100755
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 16 2009 00:15:24
-M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase
-M5 started Feb 16 2009 00:44:44
-M5 executing on zizzer
-command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3-dual -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3-dual
+M5 compiled Mar 6 2009 18:15:39
+M5 revision c619bb0f8f4f 6005 default qtip stats_duplicates.diff tip
+M5 started Mar 6 2009 18:15:43
+M5 executing on maize
+command line: /n/blue/z/binkert/build/work/build/ALPHA_FS/m5.fast -d /n/blue/z/binkert/build/work/build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3-dual -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3-dual
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /dist/m5/system/binaries/vmlinux
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
index dcbc52710..a35446ce7 100644
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
@@ -1,37 +1,21 @@
---------- Begin Simulation Statistics ----------
-global.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-global.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-global.BPredUnit.BTBHits 4976196 # Number of BTB hits
-global.BPredUnit.BTBHits 2271370 # Number of BTB hits
-global.BPredUnit.BTBLookups 9270308 # Number of BTB lookups
-global.BPredUnit.BTBLookups 5052293 # Number of BTB lookups
-global.BPredUnit.RASInCorrect 24350 # Number of incorrect RAS predictions.
-global.BPredUnit.RASInCorrect 16405 # Number of incorrect RAS predictions.
-global.BPredUnit.condIncorrect 550496 # Number of conditional branches incorrect
-global.BPredUnit.condIncorrect 327507 # Number of conditional branches incorrect
-global.BPredUnit.condPredicted 8475186 # Number of conditional branches predicted
-global.BPredUnit.condPredicted 4551940 # Number of conditional branches predicted
-global.BPredUnit.lookups 10093436 # Number of BP lookups
-global.BPredUnit.lookups 5538388 # Number of BP lookups
-global.BPredUnit.usedRAS 690374 # Number of times the RAS was used to get a target.
-global.BPredUnit.usedRAS 417429 # Number of times the RAS was used to get a target.
-host_inst_rate 133092 # Simulator instruction rate (inst/s)
-host_mem_usage 294856 # Number of bytes of host memory used
-host_seconds 422.19 # Real time elapsed on the host
-host_tick_rate 4518571306 # Simulator tick rate (ticks/s)
-memdepunit.memDep.conflictingLoads 2050532 # Number of conflicting loads.
-memdepunit.memDep.conflictingLoads 906322 # Number of conflicting loads.
-memdepunit.memDep.conflictingStores 1832540 # Number of conflicting stores.
-memdepunit.memDep.conflictingStores 817104 # Number of conflicting stores.
-memdepunit.memDep.insertedLoads 7553751 # Number of loads inserted to the mem dependence unit.
-memdepunit.memDep.insertedLoads 4247428 # Number of loads inserted to the mem dependence unit.
-memdepunit.memDep.insertedStores 4835994 # Number of stores inserted to the mem dependence unit.
-memdepunit.memDep.insertedStores 2557361 # Number of stores inserted to the mem dependence unit.
+host_inst_rate 195579 # Simulator instruction rate (inst/s)
+host_mem_usage 296668 # Number of bytes of host memory used
+host_seconds 287.30 # Real time elapsed on the host
+host_tick_rate 6640015618 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 56190549 # Number of instructions simulated
sim_seconds 1.907705 # Number of seconds simulated
sim_ticks 1907705384500 # Number of ticks simulated
+system.cpu0.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
+system.cpu0.BPredUnit.BTBHits 4976196 # Number of BTB hits
+system.cpu0.BPredUnit.BTBLookups 9270308 # Number of BTB lookups
+system.cpu0.BPredUnit.RASInCorrect 24350 # Number of incorrect RAS predictions.
+system.cpu0.BPredUnit.condIncorrect 550496 # Number of conditional branches incorrect
+system.cpu0.BPredUnit.condPredicted 8475186 # Number of conditional branches predicted
+system.cpu0.BPredUnit.lookups 10093436 # Number of BP lookups
+system.cpu0.BPredUnit.usedRAS 690374 # Number of times the RAS was used to get a target.
system.cpu0.commit.COM:branches 5979895 # Number of branches committed
system.cpu0.commit.COM:bw_lim_events 670394 # number cycles where commit BW limit reached
system.cpu0.commit.COM:bw_limited 0 # number of insts not committed due to BW limits
@@ -334,21 +318,23 @@ system.cpu0.iq.ISSUE:fu_full.start_dist
IprAccess 0 0.00% # attempts to use FU when none available
InstPrefetch 0 0.00% # attempts to use FU when none available
system.cpu0.iq.ISSUE:fu_full.end_dist
-system.cpu0.iq.ISSUE:issued_per_cycle.start_dist # Number of insts issued each cycle
-system.cpu0.iq.ISSUE:issued_per_cycle.samples 70526789
-system.cpu0.iq.ISSUE:issued_per_cycle.min_value 0
- 0 49764698 7056.14%
- 1 10507711 1489.89%
- 2 4625293 655.82%
- 3 2839060 402.55%
- 4 1729945 245.29%
- 5 663621 94.09%
- 6 315226 44.70%
- 7 67152 9.52%
- 8 14083 2.00%
-system.cpu0.iq.ISSUE:issued_per_cycle.max_value 8
-system.cpu0.iq.ISSUE:issued_per_cycle.end_dist
-
+system.cpu0.iq.ISSUE:issued_per_cycle::samples 70526789
+system.cpu0.iq.ISSUE:issued_per_cycle::min_value 0
+system.cpu0.iq.ISSUE:issued_per_cycle::underflows 0 0.00%
+system.cpu0.iq.ISSUE:issued_per_cycle::0-1 49764698 70.56%
+system.cpu0.iq.ISSUE:issued_per_cycle::1-2 10507711 14.90%
+system.cpu0.iq.ISSUE:issued_per_cycle::2-3 4625293 6.56%
+system.cpu0.iq.ISSUE:issued_per_cycle::3-4 2839060 4.03%
+system.cpu0.iq.ISSUE:issued_per_cycle::4-5 1729945 2.45%
+system.cpu0.iq.ISSUE:issued_per_cycle::5-6 663621 0.94%
+system.cpu0.iq.ISSUE:issued_per_cycle::6-7 315226 0.45%
+system.cpu0.iq.ISSUE:issued_per_cycle::7-8 67152 0.10%
+system.cpu0.iq.ISSUE:issued_per_cycle::8 14083 0.02%
+system.cpu0.iq.ISSUE:issued_per_cycle::overflows 0 0.00%
+system.cpu0.iq.ISSUE:issued_per_cycle::total 70526789
+system.cpu0.iq.ISSUE:issued_per_cycle::max_value 8
+system.cpu0.iq.ISSUE:issued_per_cycle::mean 0.581161
+system.cpu0.iq.ISSUE:issued_per_cycle::stdev 1.133095
system.cpu0.iq.ISSUE:rate 0.406210 # Inst issue rate
system.cpu0.iq.iqInstsAdded 42280485 # Number of instructions added to the IQ (excludes non-spec)
system.cpu0.iq.iqInstsIssued 40987446 # Number of instructions issued
@@ -449,6 +435,10 @@ system.cpu0.kern.syscall_98 2 0.90% 97.75% # nu
system.cpu0.kern.syscall_132 1 0.45% 98.20% # number of syscalls executed
system.cpu0.kern.syscall_144 2 0.90% 99.10% # number of syscalls executed
system.cpu0.kern.syscall_147 2 0.90% 100.00% # number of syscalls executed
+system.cpu0.memDep0.conflictingLoads 2050532 # Number of conflicting loads.
+system.cpu0.memDep0.conflictingStores 1832540 # Number of conflicting stores.
+system.cpu0.memDep0.insertedLoads 7553751 # Number of loads inserted to the mem dependence unit.
+system.cpu0.memDep0.insertedStores 4835994 # Number of stores inserted to the mem dependence unit.
system.cpu0.numCycles 100902021 # number of cpu cycles simulated
system.cpu0.rename.RENAME:BlockCycles 10627682 # Number of cycles rename is blocking
system.cpu0.rename.RENAME:CommittedMaps 27337911 # Number of HB maps that are committed
@@ -468,6 +458,14 @@ system.cpu0.rename.RENAME:serializingInsts 1163461 #
system.cpu0.rename.RENAME:skidInsts 8536821 # count of insts added to the skid buffer
system.cpu0.rename.RENAME:tempSerializingInsts 181475 # count of temporary serializing insts renamed
system.cpu0.timesIdled 904725 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu1.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
+system.cpu1.BPredUnit.BTBHits 2271370 # Number of BTB hits
+system.cpu1.BPredUnit.BTBLookups 5052293 # Number of BTB lookups
+system.cpu1.BPredUnit.RASInCorrect 16405 # Number of incorrect RAS predictions.
+system.cpu1.BPredUnit.condIncorrect 327507 # Number of conditional branches incorrect
+system.cpu1.BPredUnit.condPredicted 4551940 # Number of conditional branches predicted
+system.cpu1.BPredUnit.lookups 5538388 # Number of BP lookups
+system.cpu1.BPredUnit.usedRAS 417429 # Number of times the RAS was used to get a target.
system.cpu1.commit.COM:branches 2947825 # Number of branches committed
system.cpu1.commit.COM:bw_lim_events 401526 # number cycles where commit BW limit reached
system.cpu1.commit.COM:bw_limited 0 # number of insts not committed due to BW limits
@@ -770,21 +768,23 @@ system.cpu1.iq.ISSUE:fu_full.start_dist
IprAccess 0 0.00% # attempts to use FU when none available
InstPrefetch 0 0.00% # attempts to use FU when none available
system.cpu1.iq.ISSUE:fu_full.end_dist
-system.cpu1.iq.ISSUE:issued_per_cycle.start_dist # Number of insts issued each cycle
-system.cpu1.iq.ISSUE:issued_per_cycle.samples 38118977
-system.cpu1.iq.ISSUE:issued_per_cycle.min_value 0
- 0 28405823 7451.88%
- 1 4664380 1223.64%
- 2 1989669 521.96%
- 3 1362790 357.51%
- 4 979073 256.85%
- 5 465618 122.15%
- 6 186895 49.03%
- 7 52286 13.72%
- 8 12443 3.26%
-system.cpu1.iq.ISSUE:issued_per_cycle.max_value 8
-system.cpu1.iq.ISSUE:issued_per_cycle.end_dist
-
+system.cpu1.iq.ISSUE:issued_per_cycle::samples 38118977
+system.cpu1.iq.ISSUE:issued_per_cycle::min_value 0
+system.cpu1.iq.ISSUE:issued_per_cycle::underflows 0 0.00%
+system.cpu1.iq.ISSUE:issued_per_cycle::0-1 28405823 74.52%
+system.cpu1.iq.ISSUE:issued_per_cycle::1-2 4664380 12.24%
+system.cpu1.iq.ISSUE:issued_per_cycle::2-3 1989669 5.22%
+system.cpu1.iq.ISSUE:issued_per_cycle::3-4 1362790 3.58%
+system.cpu1.iq.ISSUE:issued_per_cycle::4-5 979073 2.57%
+system.cpu1.iq.ISSUE:issued_per_cycle::5-6 465618 1.22%
+system.cpu1.iq.ISSUE:issued_per_cycle::6-7 186895 0.49%
+system.cpu1.iq.ISSUE:issued_per_cycle::7-8 52286 0.14%
+system.cpu1.iq.ISSUE:issued_per_cycle::8 12443 0.03%
+system.cpu1.iq.ISSUE:issued_per_cycle::overflows 0 0.00%
+system.cpu1.iq.ISSUE:issued_per_cycle::total 38118977
+system.cpu1.iq.ISSUE:issued_per_cycle::max_value 8
+system.cpu1.iq.ISSUE:issued_per_cycle::mean 0.539453
+system.cpu1.iq.ISSUE:issued_per_cycle::stdev 1.158806
system.cpu1.iq.ISSUE:rate 0.479953 # Inst issue rate
system.cpu1.iq.iqInstsAdded 21283894 # Number of instructions added to the IQ (excludes non-spec)
system.cpu1.iq.iqInstsIssued 20563386 # Number of instructions issued
@@ -864,6 +864,10 @@ system.cpu1.kern.syscall_59 1 0.96% 57.69% # nu
system.cpu1.kern.syscall_71 31 29.81% 87.50% # number of syscalls executed
system.cpu1.kern.syscall_74 10 9.62% 97.12% # number of syscalls executed
system.cpu1.kern.syscall_132 3 2.88% 100.00% # number of syscalls executed
+system.cpu1.memDep0.conflictingLoads 906322 # Number of conflicting loads.
+system.cpu1.memDep0.conflictingStores 817104 # Number of conflicting stores.
+system.cpu1.memDep0.insertedLoads 4247428 # Number of loads inserted to the mem dependence unit.
+system.cpu1.memDep0.insertedStores 2557361 # Number of stores inserted to the mem dependence unit.
system.cpu1.numCycles 42844582 # number of cpu cycles simulated
system.cpu1.rename.RENAME:BlockCycles 3655834 # Number of cycles rename is blocking
system.cpu1.rename.RENAME:CommittedMaps 13191652 # Number of HB maps that are committed
diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
index c6712a23b..139f5f740 100755
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 16 2009 00:15:24
-M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase
-M5 started Feb 16 2009 00:42:11
-M5 executing on zizzer
-command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3 -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3
+M5 compiled Mar 6 2009 18:15:39
+M5 revision c619bb0f8f4f 6005 default qtip stats_duplicates.diff tip
+M5 started Mar 6 2009 18:15:42
+M5 executing on maize
+command line: /n/blue/z/binkert/build/work/build/ALPHA_FS/m5.fast -d /n/blue/z/binkert/build/work/build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3 -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /dist/m5/system/binaries/vmlinux
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
index 37990c73f..4534484ec 100644
--- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
+++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
@@ -1,25 +1,21 @@
---------- Begin Simulation Statistics ----------
-global.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-global.BPredUnit.BTBHits 6937900 # Number of BTB hits
-global.BPredUnit.BTBLookups 13339861 # Number of BTB lookups
-global.BPredUnit.RASInCorrect 41537 # Number of incorrect RAS predictions.
-global.BPredUnit.condIncorrect 828629 # Number of conditional branches incorrect
-global.BPredUnit.condPredicted 12132448 # Number of conditional branches predicted
-global.BPredUnit.lookups 14570242 # Number of BP lookups
-global.BPredUnit.usedRAS 1034900 # Number of times the RAS was used to get a target.
-host_inst_rate 209657 # Simulator instruction rate (inst/s)
-host_mem_usage 292968 # Number of bytes of host memory used
-host_seconds 253.23 # Real time elapsed on the host
-host_tick_rate 7374290880 # Simulator tick rate (ticks/s)
-memdepunit.memDep.conflictingLoads 3083644 # Number of conflicting loads.
-memdepunit.memDep.conflictingStores 2877472 # Number of conflicting stores.
-memdepunit.memDep.insertedLoads 11055097 # Number of loads inserted to the mem dependence unit.
-memdepunit.memDep.insertedStores 7027136 # Number of stores inserted to the mem dependence unit.
+host_inst_rate 203131 # Simulator instruction rate (inst/s)
+host_mem_usage 294692 # Number of bytes of host memory used
+host_seconds 261.36 # Real time elapsed on the host
+host_tick_rate 7144744614 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 53090630 # Number of instructions simulated
sim_seconds 1.867363 # Number of seconds simulated
sim_ticks 1867363148500 # Number of ticks simulated
+system.cpu.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
+system.cpu.BPredUnit.BTBHits 6937900 # Number of BTB hits
+system.cpu.BPredUnit.BTBLookups 13339861 # Number of BTB lookups
+system.cpu.BPredUnit.RASInCorrect 41537 # Number of incorrect RAS predictions.
+system.cpu.BPredUnit.condIncorrect 828629 # Number of conditional branches incorrect
+system.cpu.BPredUnit.condPredicted 12132448 # Number of conditional branches predicted
+system.cpu.BPredUnit.lookups 14570242 # Number of BP lookups
+system.cpu.BPredUnit.usedRAS 1034900 # Number of times the RAS was used to get a target.
system.cpu.commit.COM:branches 8461943 # Number of branches committed
system.cpu.commit.COM:bw_lim_events 974606 # number cycles where commit BW limit reached
system.cpu.commit.COM:bw_limited 0 # number of insts not committed due to BW limits
@@ -322,21 +318,23 @@ system.cpu.iq.ISSUE:fu_full.start_dist
IprAccess 0 0.00% # attempts to use FU when none available
InstPrefetch 0 0.00% # attempts to use FU when none available
system.cpu.iq.ISSUE:fu_full.end_dist
-system.cpu.iq.ISSUE:issued_per_cycle.start_dist # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle.samples 102267931
-system.cpu.iq.ISSUE:issued_per_cycle.min_value 0
- 0 73151138 7152.89%
- 1 14628619 1430.42%
- 2 6419666 627.73%
- 3 3934330 384.71%
- 4 2528894 247.28%
- 5 1032607 100.97%
- 6 444582 43.47%
- 7 106443 10.41%
- 8 21652 2.12%
-system.cpu.iq.ISSUE:issued_per_cycle.max_value 8
-system.cpu.iq.ISSUE:issued_per_cycle.end_dist
-
+system.cpu.iq.ISSUE:issued_per_cycle::samples 102267931
+system.cpu.iq.ISSUE:issued_per_cycle::min_value 0
+system.cpu.iq.ISSUE:issued_per_cycle::underflows 0 0.00%
+system.cpu.iq.ISSUE:issued_per_cycle::0-1 73151138 71.53%
+system.cpu.iq.ISSUE:issued_per_cycle::1-2 14628619 14.30%
+system.cpu.iq.ISSUE:issued_per_cycle::2-3 6419666 6.28%
+system.cpu.iq.ISSUE:issued_per_cycle::3-4 3934330 3.85%
+system.cpu.iq.ISSUE:issued_per_cycle::4-5 2528894 2.47%
+system.cpu.iq.ISSUE:issued_per_cycle::5-6 1032607 1.01%
+system.cpu.iq.ISSUE:issued_per_cycle::6-7 444582 0.43%
+system.cpu.iq.ISSUE:issued_per_cycle::7-8 106443 0.10%
+system.cpu.iq.ISSUE:issued_per_cycle::8 21652 0.02%
+system.cpu.iq.ISSUE:issued_per_cycle::overflows 0 0.00%
+system.cpu.iq.ISSUE:issued_per_cycle::total 102267931
+system.cpu.iq.ISSUE:issued_per_cycle::max_value 8
+system.cpu.iq.ISSUE:issued_per_cycle::mean 0.568461
+system.cpu.iq.ISSUE:issued_per_cycle::stdev 1.134174
system.cpu.iq.ISSUE:rate 0.424355 # Inst issue rate
system.cpu.iq.iqInstsAdded 60200389 # Number of instructions added to the IQ (excludes non-spec)
system.cpu.iq.iqInstsIssued 58135361 # Number of instructions issued
@@ -433,6 +431,10 @@ system.cpu.kern.syscall_98 2 0.61% 97.55% # nu
system.cpu.kern.syscall_132 4 1.23% 98.77% # number of syscalls executed
system.cpu.kern.syscall_144 2 0.61% 99.39% # number of syscalls executed
system.cpu.kern.syscall_147 2 0.61% 100.00% # number of syscalls executed
+system.cpu.memDep0.conflictingLoads 3083644 # Number of conflicting loads.
+system.cpu.memDep0.conflictingStores 2877472 # Number of conflicting stores.
+system.cpu.memDep0.insertedLoads 11055097 # Number of loads inserted to the mem dependence unit.
+system.cpu.memDep0.insertedStores 7027136 # Number of stores inserted to the mem dependence unit.
system.cpu.numCycles 136996939 # number of cpu cycles simulated
system.cpu.rename.RENAME:BlockCycles 14276861 # Number of cycles rename is blocking
system.cpu.rename.RENAME:CommittedMaps 38259280 # Number of HB maps that are committed