summaryrefslogtreecommitdiff
path: root/tests/long/10.mcf/ref/arm/linux/simple-timing/simout
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:19:50 +0000
committerAli Saidi <Ali.Saidi@ARM.com>2012-01-25 17:19:50 +0000
commita17dbdf8834b84f05a8f5154a74ac819fe8adc7c (patch)
tree8761136c790b84e20d6df2e84207eca3c553984b /tests/long/10.mcf/ref/arm/linux/simple-timing/simout
parentbd55c9e2af7fd6c06af48a020c29cb33ba1ca3fc (diff)
downloadgem5-a17dbdf8834b84f05a8f5154a74ac819fe8adc7c.tar.xz
stats: Update stats for final tick and memory bandwidth patches
Diffstat (limited to 'tests/long/10.mcf/ref/arm/linux/simple-timing/simout')
-rwxr-xr-xtests/long/10.mcf/ref/arm/linux/simple-timing/simout16
1 files changed, 6 insertions, 10 deletions
diff --git a/tests/long/10.mcf/ref/arm/linux/simple-timing/simout b/tests/long/10.mcf/ref/arm/linux/simple-timing/simout
index ce41a8bab..959967602 100755
--- a/tests/long/10.mcf/ref/arm/linux/simple-timing/simout
+++ b/tests/long/10.mcf/ref/arm/linux/simple-timing/simout
@@ -1,14 +1,10 @@
-M5 Simulator System
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:47:10
-M5 started Apr 19 2011 12:51:14
-M5 executing on maize
-command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/10.mcf/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/10.mcf/arm/linux/simple-timing
+gem5 compiled Jan 23 2012 04:16:21
+gem5 started Jan 23 2012 08:48:15
+gem5 executing on zizzer
+command line: build/ARM_SE/gem5.opt -d build/ARM_SE/tests/opt/long/10.mcf/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/opt/long/10.mcf/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...