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authorSteve Reinhardt <stever@gmail.com>2009-04-22 01:55:52 -0400
committerSteve Reinhardt <stever@gmail.com>2009-04-22 01:55:52 -0400
commit7b40c36fbd1c348e5ef43231325923aae1cd0809 (patch)
treeb1d142d10229a7ca68eff864aa9aae672230e41a /tests/long/10.mcf/ref/sparc
parent6629d9b2bc58a885bfebce1517fd12483497b6e4 (diff)
downloadgem5-7b40c36fbd1c348e5ef43231325923aae1cd0809.tar.xz
Update stats for new single bad-address responder.
Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
Diffstat (limited to 'tests/long/10.mcf/ref/sparc')
-rwxr-xr-xtests/long/10.mcf/ref/sparc/linux/simple-atomic/simout8
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt8
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini9
-rwxr-xr-xtests/long/10.mcf/ref/sparc/linux/simple-timing/simout8
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt8
5 files changed, 19 insertions, 22 deletions
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
index 772ffba43..529f20a79 100755
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr 8 2009 12:30:33
-M5 executing on maize
+M5 compiled Apr 21 2009 18:04:32
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 18:06:05
+M5 executing on zizzer
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
index b6a29a98d..ce9766cbc 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 3425998 # Simulator instruction rate (inst/s)
-host_mem_usage 331732 # Number of bytes of host memory used
-host_seconds 71.17 # Real time elapsed on the host
-host_tick_rate 1717182841 # Simulator tick rate (ticks/s)
+host_inst_rate 2430508 # Simulator instruction rate (inst/s)
+host_mem_usage 329972 # Number of bytes of host memory used
+host_seconds 100.32 # Real time elapsed on the host
+host_tick_rate 1218223693 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 243835278 # Number of instructions simulated
sim_seconds 0.122216 # Number of seconds simulated
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
index ee3e7a244..676b1ef8d 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
@@ -40,11 +40,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -76,11 +75,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -112,11 +110,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=10000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
index 3e2f8211c..2fa26b5da 100755
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr 8 2009 12:30:42
-M5 executing on maize
+M5 compiled Apr 21 2009 18:04:32
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 18:10:11
+M5 executing on zizzer
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
index 1ac5ddac3..aab215cd0 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1860125 # Simulator instruction rate (inst/s)
-host_mem_usage 339272 # Number of bytes of host memory used
-host_seconds 131.09 # Real time elapsed on the host
-host_tick_rate 2795388911 # Simulator tick rate (ticks/s)
+host_inst_rate 1286984 # Simulator instruction rate (inst/s)
+host_mem_usage 337604 # Number of bytes of host memory used
+host_seconds 189.46 # Real time elapsed on the host
+host_tick_rate 1934075040 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 243835278 # Number of instructions simulated
sim_seconds 0.366435 # Number of seconds simulated