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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-11-17 22:53:56 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-11-17 22:53:56 -0600 |
| commit | f171a29118e1d80c04c72d2fb5f024fed4fb62af (patch) | |
| tree | a34064039d4da925b6cdcf4548fb22ebfa04fda2 /tests/long/10.mcf/ref/x86/linux/o3-timing/simout | |
| parent | f3b4d10a05d902f34ccd3bee7154b46ee8320fb6 (diff) | |
| download | gem5-f171a29118e1d80c04c72d2fb5f024fed4fb62af.tar.xz | |
Regression: Update statistics for x86 long regression tests
This patch updates reference statistics for the regression tests. This
update was necessitated by a recent change in behavior of some instructions
in the x86 architecture.
Diffstat (limited to 'tests/long/10.mcf/ref/x86/linux/o3-timing/simout')
| -rwxr-xr-x | tests/long/10.mcf/ref/x86/linux/o3-timing/simout | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout index d1aeffbca..f9ce22b4b 100755 --- a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout +++ b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout @@ -3,10 +3,11 @@ Redirecting stderr to build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing/sim gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 20 2011 13:24:14 -gem5 started Aug 20 2011 13:24:28 -gem5 executing on zizzer +gem5 compiled Nov 16 2011 11:08:03 +gem5 started Nov 17 2011 13:09:16 +gem5 executing on ribera.cs.wisc.edu command line: build/X86_SE/gem5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing +tests Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -25,4 +26,4 @@ simplex iterations : 2663 flow value : 3080014995 checksum : 68389 optimal -Exiting @ tick 70374234500 because target called exit() +Exiting @ tick 70312944500 because target called exit() |