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author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-10 09:59:01 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-10 09:59:01 -0600 |
commit | a5a2b9ecbdeeefcfa8d5a5d116c385cdf59e0256 (patch) | |
tree | 0d018e4f474bb9dd45bffad990de8e753114e6c2 /tests/long/10.mcf/ref/x86/linux/o3-timing/simout | |
parent | acbc03ae464b027fe93dca3a0bc796ef63f53113 (diff) | |
download | gem5-a5a2b9ecbdeeefcfa8d5a5d116c385cdf59e0256.tar.xz |
X86 Regressions: Update stats due to fence instruction
Diffstat (limited to 'tests/long/10.mcf/ref/x86/linux/o3-timing/simout')
-rwxr-xr-x | tests/long/10.mcf/ref/x86/linux/o3-timing/simout | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout index f9ce22b4b..5b6f3a1bd 100755 --- a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout +++ b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout @@ -3,11 +3,10 @@ Redirecting stderr to build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing/sim gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Nov 16 2011 11:08:03 -gem5 started Nov 17 2011 13:09:16 +gem5 compiled Jan 9 2012 14:18:02 +gem5 started Jan 9 2012 14:29:08 gem5 executing on ribera.cs.wisc.edu command line: build/X86_SE/gem5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing -tests Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... |