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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
| commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
| tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/10.mcf/ref/x86/linux/simple-timing | |
| parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
| download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz | |
Stats: Re update stats.
Diffstat (limited to 'tests/long/10.mcf/ref/x86/linux/simple-timing')
| -rw-r--r-- | tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini | 9 | ||||
| -rwxr-xr-x | tests/long/10.mcf/ref/x86/linux/simple-timing/simout | 8 | ||||
| -rw-r--r-- | tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt | 26 |
3 files changed, 33 insertions, 10 deletions
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini index 217d838ce..12f3ad44d 100644 --- a/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini @@ -10,6 +10,13 @@ type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=TimingSimpleCPU @@ -154,7 +161,7 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=mcf mcf.in -cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing +cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing egid=100 env= errout=cerr diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/simout b/tests/long/10.mcf/ref/x86/linux/simple-timing/simout index 68ecd8732..0b92276cc 100755 --- a/tests/long/10.mcf/ref/x86/linux/simple-timing/simout +++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Jan 31 2011 14:03:49 -M5 revision aa283c8952a9 7880 default qtip stupdstats.patch tip -M5 started Jan 31 2011 14:03:51 +M5 compiled Feb 7 2011 02:32:07 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 02:32:12 M5 executing on burrito -command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing +command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt index 7c84c26e1..cf6f03e98 100644 --- a/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 734335 # Simulator instruction rate (inst/s) -host_mem_usage 362052 # Number of bytes of host memory used -host_seconds 378.84 # Real time elapsed on the host -host_tick_rate 976703915 # Simulator tick rate (ticks/s) +host_inst_rate 424375 # Simulator instruction rate (inst/s) +host_mem_usage 365728 # Number of bytes of host memory used +host_seconds 655.54 # Real time elapsed on the host +host_tick_rate 564440982 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 278192520 # Number of instructions simulated sim_seconds 0.370011 # Number of seconds simulated @@ -200,8 +200,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 29460 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 740021680 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 740021680 # Number of busy cycles +system.cpu.num_conditional_control_insts 18628012 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 40 # Number of float alu accesses +system.cpu.num_fp_insts 40 # number of float instructions +system.cpu.num_fp_register_reads 40 # number of times the floating registers were read +system.cpu.num_fp_register_writes 26 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 278192520 # Number of instructions executed -system.cpu.num_refs 122219139 # Number of memory references +system.cpu.num_int_alu_accesses 278186228 # Number of integer alu accesses +system.cpu.num_int_insts 278186228 # number of integer instructions +system.cpu.num_int_register_reads 855210512 # number of times the integer registers were read +system.cpu.num_int_register_writes 248344166 # number of times the integer registers were written +system.cpu.num_load_insts 90779388 # Number of load instructions +system.cpu.num_mem_refs 122219139 # number of memory refs +system.cpu.num_store_insts 31439751 # Number of store instructions system.cpu.workload.PROG:num_syscalls 444 # Number of system calls ---------- End Simulation Statistics ---------- |