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authorGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
committerGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
commit0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch)
tree96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/20.parser/ref/arm/linux
parent1b64bfa933745294667158d0ce22180780b2a22e (diff)
downloadgem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz
Stats: Re update stats.
Diffstat (limited to 'tests/long/20.parser/ref/arm/linux')
-rw-r--r--tests/long/20.parser/ref/arm/linux/o3-timing/config.ini15
-rwxr-xr-xtests/long/20.parser/ref/arm/linux/o3-timing/simout8
-rw-r--r--tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt30
-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini17
-rwxr-xr-xtests/long/20.parser/ref/arm/linux/simple-atomic/simout10
-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt26
-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-timing/config.ini17
-rwxr-xr-xtests/long/20.parser/ref/arm/linux/simple-timing/simerr2
-rwxr-xr-xtests/long/20.parser/ref/arm/linux/simple-timing/simout10
-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt26
10 files changed, 122 insertions, 39 deletions
diff --git a/tests/long/20.parser/ref/arm/linux/o3-timing/config.ini b/tests/long/20.parser/ref/arm/linux/o3-timing/config.ini
index 5f7dcc6cf..92faf41fb 100644
--- a/tests/long/20.parser/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/20.parser/ref/arm/linux/o3-timing/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=DerivO3CPU
@@ -484,9 +493,9 @@ egid=100
env=
errout=cerr
euid=100
-executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/parser
+executable=/dist/m5/cpu2000/binaries/arm/linux/parser
gid=100
-input=/chips/pd/randd/dist/cpu2000/data/parser/mdred/input/parser.in
+input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/20.parser/ref/arm/linux/o3-timing/simout b/tests/long/20.parser/ref/arm/linux/o3-timing/simout
index 7fcfd6a75..b1ee33712 100755
--- a/tests/long/20.parser/ref/arm/linux/o3-timing/simout
+++ b/tests/long/20.parser/ref/arm/linux/o3-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jan 11 2011 18:16:01
-M5 revision b39a8457b332 7816 default ext/o3_regressions.patch qtip tip
-M5 started Jan 12 2011 03:20:30
-M5 executing on u200439-lin.austin.arm.com
+M5 compiled Feb 7 2011 01:56:16
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 01:56:25
+M5 executing on burrito
command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/20.parser/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/long/20.parser/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt b/tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt
index b9adedb70..5862f2750 100644
--- a/tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 95936 # Simulator instruction rate (inst/s)
-host_mem_usage 255716 # Number of bytes of host memory used
-host_seconds 5851.87 # Real time elapsed on the host
-host_tick_rate 62464794 # Simulator tick rate (ticks/s)
+host_inst_rate 89247 # Simulator instruction rate (inst/s)
+host_mem_usage 242220 # Number of bytes of host memory used
+host_seconds 6290.45 # Real time elapsed on the host
+host_tick_rate 58109668 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 561403855 # Number of instructions simulated
sim_seconds 0.365536 # Number of seconds simulated
@@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0
system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle
system.cpu.commit.COM:committed_per_cycle::total 660408748 # Number of insts commited each cycle
system.cpu.commit.COM:count 561403855 # Number of instructions committed
+system.cpu.commit.COM:fp_insts 16 # Number of committed floating point instructions.
+system.cpu.commit.COM:function_calls 0 # Number of function calls committed.
+system.cpu.commit.COM:int_insts 464140463 # Number of committed integer instructions.
system.cpu.commit.COM:loads 128127024 # Number of loads committed
system.cpu.commit.COM:membars 0 # Number of memory barriers committed
system.cpu.commit.COM:refs 184987501 # Number of memory references committed
@@ -171,6 +174,7 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu
system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::total 726668486 # Number of instructions fetched each cycle (Total)
+system.cpu.fp_regfile_reads 16 # number of floating regfile reads
system.cpu.icache.ReadReq_accesses 122785155 # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_avg_miss_latency 13335.070892 # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency 9658.160050 # average ReadReq mshr miss latency
@@ -270,6 +274,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 83223254 #
system.cpu.iew.memOrderViolationEvents 352056 # Number of memory order violations
system.cpu.iew.predictedNotTakenIncorrect 15636111 # Number of branches that were predicted not taken incorrectly
system.cpu.iew.predictedTakenIncorrect 14467473 # Number of branches that were predicted taken incorrectly
+system.cpu.int_regfile_reads 1624866525 # number of integer regfile reads
+system.cpu.int_regfile_writes 504061562 # number of integer regfile writes
system.cpu.ipc 0.767919 # IPC: Instructions Per Cycle
system.cpu.ipc_total 0.767919 # IPC: Total IPC of All Threads
system.cpu.iq.ISSUE:FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued
@@ -361,6 +367,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0
system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle
system.cpu.iq.ISSUE:issued_per_cycle::total 726668486 # Number of insts issued each cycle
system.cpu.iq.ISSUE:rate 1.039903 # Inst issue rate
+system.cpu.iq.fp_alu_accesses 140 # Number of floating point alu accesses
+system.cpu.iq.fp_inst_queue_reads 276 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_wakeup_accesses 16 # Number of floating instruction queue wakeup accesses
+system.cpu.iq.fp_inst_queue_writes 652 # Number of floating instruction queue writes
+system.cpu.iq.int_alu_accesses 771704903 # Number of integer alu accesses
+system.cpu.iq.int_inst_queue_reads 2266614625 # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_wakeup_accesses 674936607 # Number of integer instruction queue wakeup accesses
+system.cpu.iq.int_inst_queue_writes 1350317509 # Number of integer instruction queue writes
system.cpu.iq.iqInstsAdded 960829595 # Number of instructions added to the IQ (excludes non-spec)
system.cpu.iq.iqInstsIssued 760243815 # Number of instructions issued
system.cpu.iq.iqNonSpecInstsAdded 162257 # Number of non-speculative instructions added to the IQ
@@ -465,7 +479,11 @@ system.cpu.memDep0.conflictingLoads 60170710 # Nu
system.cpu.memDep0.conflictingStores 74734099 # Number of conflicting stores.
system.cpu.memDep0.insertedLoads 200154824 # Number of loads inserted to the mem dependence unit.
system.cpu.memDep0.insertedStores 140083731 # Number of stores inserted to the mem dependence unit.
+system.cpu.misc_regfile_reads 1169165868 # number of misc regfile reads
+system.cpu.misc_regfile_writes 344748 # number of misc regfile writes
system.cpu.numCycles 731071595 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.rename.RENAME:BlockCycles 7125233 # Number of cycles rename is blocking
system.cpu.rename.RENAME:CommittedMaps 435368498 # Number of HB maps that are committed
system.cpu.rename.RENAME:IQFullEvents 5221350 # Number of times rename has blocked due to IQ full
@@ -479,10 +497,14 @@ system.cpu.rename.RENAME:RunCycles 326862324 # Nu
system.cpu.rename.RENAME:SquashCycles 66259738 # Number of cycles rename is squashing
system.cpu.rename.RENAME:UnblockCycles 15428382 # Number of cycles rename is unblocking
system.cpu.rename.RENAME:UndoneMaps 278321764 # Number of HB maps that are undone due to squashing
+system.cpu.rename.RENAME:fp_rename_lookups 2110 # Number of floating rename lookups
+system.cpu.rename.RENAME:int_rename_lookups 2644674034 # Number of integer rename lookups
system.cpu.rename.RENAME:serializeStallCycles 1706138 # count of cycles rename stalled for serializing inst
system.cpu.rename.RENAME:serializingInsts 233255 # count of serializing insts renamed
system.cpu.rename.RENAME:skidInsts 48704887 # count of insts added to the skid buffer
system.cpu.rename.RENAME:tempSerializingInsts 185624 # count of temporary serializing insts renamed
+system.cpu.rob.rob_reads 1617861624 # The number of ROB reads
+system.cpu.rob.rob_writes 1988299741 # The number of ROB writes
system.cpu.timesIdled 93433 # Number of times that the entire CPU went into an idle state and unscheduled itself
system.cpu.workload.PROG:num_syscalls 548 # Number of system calls
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini b/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
index 8f051c01c..8b55eca4f 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=AtomicSimpleCPU
@@ -52,14 +61,14 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=parser 2.1.dict -batch
-cwd=build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-atomic
+cwd=build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-atomic
egid=100
env=
errout=cerr
euid=100
-executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/parser
+executable=/dist/m5/cpu2000/binaries/arm/linux/parser
gid=100
-input=/chips/pd/randd/dist/cpu2000/data/parser/mdred/input/parser.in
+input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/simout b/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
index e187e6939..c27562976 100755
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Oct 11 2010 18:37:23
-M5 revision c4e3d74d9a68 7726 default ext/mp_boot.patch qtip tip
-M5 started Oct 11 2010 18:37:50
-M5 executing on aus-bc3-b4
-command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-atomic
+M5 compiled Feb 7 2011 01:56:16
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 01:56:25
+M5 executing on burrito
+command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt b/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
index 3d8390b34..0871fb1fa 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2845430 # Simulator instruction rate (inst/s)
-host_mem_usage 257528 # Number of bytes of host memory used
-host_seconds 197.30 # Real time elapsed on the host
-host_tick_rate 1448130657 # Simulator tick rate (ticks/s)
+host_inst_rate 1052675 # Simulator instruction rate (inst/s)
+host_mem_usage 232888 # Number of bytes of host memory used
+host_seconds 533.31 # Real time elapsed on the host
+host_tick_rate 535740490 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 561403855 # Number of instructions simulated
sim_seconds 0.285717 # Number of seconds simulated
@@ -53,8 +53,24 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 571433624 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 571433624 # Number of busy cycles
+system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
+system.cpu.num_fp_insts 16 # number of float instructions
+system.cpu.num_fp_register_reads 16 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 561403855 # Number of instructions executed
-system.cpu.num_refs 184987503 # Number of memory references
+system.cpu.num_int_alu_accesses 464140465 # Number of integer alu accesses
+system.cpu.num_int_insts 464140465 # number of integer instructions
+system.cpu.num_int_register_reads 1370673061 # number of times the integer registers were read
+system.cpu.num_int_register_writes 415936275 # number of times the integer registers were written
+system.cpu.num_load_insts 128127024 # Number of load instructions
+system.cpu.num_mem_refs 184987503 # number of memory refs
+system.cpu.num_store_insts 56860479 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 548 # Number of system calls
---------- End Simulation Statistics ----------
diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini b/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini
index 2acf6aa8b..9596a7281 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini
+++ b/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=TimingSimpleCPU
@@ -152,14 +161,14 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=parser 2.1.dict -batch
-cwd=build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing
+cwd=build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing
egid=100
env=
errout=cerr
euid=100
-executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/parser
+executable=/dist/m5/cpu2000/binaries/arm/linux/parser
gid=100
-input=/chips/pd/randd/dist/cpu2000/data/parser/mdred/input/parser.in
+input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/simerr b/tests/long/20.parser/ref/arm/linux/simple-timing/simerr
index eabe42249..cdafa164c 100755
--- a/tests/long/20.parser/ref/arm/linux/simple-timing/simerr
+++ b/tests/long/20.parser/ref/arm/linux/simple-timing/simerr
@@ -1,3 +1,5 @@
warn: Sockets disabled, not accepting gdb connections
For more information see: http://www.m5sim.org/warn/d946bea6
+warn: Complete acc isn't called on normal stores in O3.
+For more information see: http://www.m5sim.org/warn/138d8573
hack: be nice to actually delete the event here
diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/simout b/tests/long/20.parser/ref/arm/linux/simple-timing/simout
index 76b9031da..db8a10df5 100755
--- a/tests/long/20.parser/ref/arm/linux/simple-timing/simout
+++ b/tests/long/20.parser/ref/arm/linux/simple-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Oct 11 2010 18:37:23
-M5 revision c4e3d74d9a68 7726 default ext/mp_boot.patch qtip tip
-M5 started Oct 11 2010 19:30:07
-M5 executing on aus-bc3-b4
-command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing
+M5 compiled Feb 7 2011 01:56:16
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 02:00:20
+M5 executing on burrito
+command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt b/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt
index d49ea7a07..5187afa41 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 698342 # Simulator instruction rate (inst/s)
-host_mem_usage 265248 # Number of bytes of host memory used
-host_seconds 801.14 # Real time elapsed on the host
-host_tick_rate 898558125 # Simulator tick rate (ticks/s)
+host_inst_rate 427899 # Simulator instruction rate (inst/s)
+host_mem_usage 240600 # Number of bytes of host memory used
+host_seconds 1307.48 # Real time elapsed on the host
+host_tick_rate 550579326 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 559470527 # Number of instructions simulated
sim_seconds 0.719872 # Number of seconds simulated
@@ -242,8 +242,24 @@ system.cpu.l2cache.warmup_cycle 510281834000 # Cy
system.cpu.l2cache.writebacks 172310 # number of writebacks
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 1439744848 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 1439744848 # Number of busy cycles
+system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
+system.cpu.num_fp_insts 16 # number of float instructions
+system.cpu.num_fp_register_reads 16 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 559470527 # Number of instructions executed
-system.cpu.num_refs 184987503 # Number of memory references
+system.cpu.num_int_alu_accesses 464140465 # Number of integer alu accesses
+system.cpu.num_int_insts 464140465 # number of integer instructions
+system.cpu.num_int_register_reads 1497198689 # number of times the integer registers were read
+system.cpu.num_int_register_writes 415939738 # number of times the integer registers were written
+system.cpu.num_load_insts 128127024 # Number of load instructions
+system.cpu.num_mem_refs 184987503 # number of memory refs
+system.cpu.num_store_insts 56860479 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 548 # Number of system calls
---------- End Simulation Statistics ----------