summaryrefslogtreecommitdiff
path: root/tests/long/30.eon/ref/alpha
diff options
context:
space:
mode:
authorLisa Hsu <hsul@eecs.umich.edu>2008-11-06 11:11:42 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2008-11-06 11:11:42 -0500
commitddd179a4189d6f51f7be81567e1119aa67533dae (patch)
tree647c2b6b5a7a947e07c0639bd41b2df8fe3dd99e /tests/long/30.eon/ref/alpha
parent46b56bb7b6ac2a5f069aa1f79279f46d0395eb15 (diff)
downloadgem5-ddd179a4189d6f51f7be81567e1119aa67533dae.tar.xz
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
Diffstat (limited to 'tests/long/30.eon/ref/alpha')
-rw-r--r--tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini9
-rw-r--r--tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt8
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/o3-timing/stderr1
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/o3-timing/stdout11
-rw-r--r--tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt8
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr1
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout11
-rw-r--r--tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini9
-rw-r--r--tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt8
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/simple-timing/stderr1
-rwxr-xr-xtests/long/30.eon/ref/alpha/tru64/simple-timing/stdout11
11 files changed, 30 insertions, 48 deletions
diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini b/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
index 67cb70d64..206ca6cd4 100644
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
@@ -104,7 +104,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=1000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -122,8 +121,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=262144
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=20
trace_addr=0
@@ -281,7 +278,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=1000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -299,8 +295,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=131072
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=20
trace_addr=0
@@ -321,7 +315,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=1000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -339,8 +332,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=2097152
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=5
trace_addr=0
diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt b/tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt
index ec7c6b89a..756f9cdc8 100644
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 5781170 # Nu
global.BPredUnit.condPredicted 35418150 # Number of conditional branches predicted
global.BPredUnit.lookups 62209737 # Number of BP lookups
global.BPredUnit.usedRAS 12344504 # Number of times the RAS was used to get a target.
-host_inst_rate 169173 # Simulator instruction rate (inst/s)
-host_mem_usage 208828 # Number of bytes of host memory used
-host_seconds 2220.07 # Real time elapsed on the host
-host_tick_rate 60807494 # Simulator tick rate (ticks/s)
+host_inst_rate 185748 # Simulator instruction rate (inst/s)
+host_mem_usage 209620 # Number of bytes of host memory used
+host_seconds 2021.96 # Real time elapsed on the host
+host_tick_rate 66765374 # Simulator tick rate (ticks/s)
memdepunit.memDep.conflictingLoads 73961217 # Number of conflicting loads.
memdepunit.memDep.conflictingStores 54131405 # Number of conflicting stores.
memdepunit.memDep.insertedLoads 124841223 # Number of loads inserted to the mem dependence unit.
diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr
index b72d69553..19732539d 100755
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr
@@ -1,5 +1,4 @@
warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0. Starting simulation...
warn: Increasing stack size by one page.
getting pixel output filename pixels_out.cook
opening control file chair.control.cook
diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
index ce9f5b7a4..e6ff44d85 100755
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
@@ -5,12 +5,13 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:14:55
-M5 executing on piton
+M5 compiled Nov 5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov 5 2008 18:33:01
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/o3-timing -re --stdout-file stdout --stderr-file stderr tests/run.py long/30.eon/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
Eon, Version 1.1
OO-style eon Time= 0.133333
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt
index e32cacf16..651cb243c 100644
--- a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2526947 # Simulator instruction rate (inst/s)
-host_mem_usage 181828 # Number of bytes of host memory used
-host_seconds 157.77 # Real time elapsed on the host
-host_tick_rate 1263471125 # Simulator tick rate (ticks/s)
+host_inst_rate 3323718 # Simulator instruction rate (inst/s)
+host_mem_usage 201288 # Number of bytes of host memory used
+host_seconds 119.95 # Real time elapsed on the host
+host_tick_rate 1661856596 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 398664595 # Number of instructions simulated
sim_seconds 0.199332 # Number of seconds simulated
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr
index b72d69553..19732539d 100755
--- a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr
@@ -1,5 +1,4 @@
warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0. Starting simulation...
warn: Increasing stack size by one page.
getting pixel output filename pixels_out.cook
opening control file chair.control.cook
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
index 0c68e7560..913be9f23 100755
--- a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
@@ -5,12 +5,13 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:59
-M5 executing on piton
+M5 compiled Nov 5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov 5 2008 19:13:17
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/simple-atomic -re --stdout-file stdout --stderr-file stderr tests/run.py long/30.eon/alpha/tru64/simple-atomic
Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
Eon, Version 1.1
OO-style eon Time= 0.183333
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini b/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
index a0f5ff1cc..5e43f3356 100644
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
@@ -40,7 +40,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=1000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -58,8 +57,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=262144
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=5
trace_addr=0
@@ -80,7 +77,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=1000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -98,8 +94,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=131072
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=5
trace_addr=0
@@ -120,7 +114,6 @@ block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=10000
-lifo=false
max_miss_count=0
mem_side_filter_ranges=
mshrs=10
@@ -138,8 +131,6 @@ prefetcher_size=100
prioritizeRequests=false
repl=Null
size=2097152
-split=false
-split_size=0
subblock_size=0
tgts_per_mshr=5
trace_addr=0
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt b/tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt
index 193a2e752..3ff76c5f4 100644
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1657758 # Simulator instruction rate (inst/s)
-host_mem_usage 207956 # Number of bytes of host memory used
-host_seconds 240.48 # Real time elapsed on the host
-host_tick_rate 2359203743 # Simulator tick rate (ticks/s)
+host_inst_rate 1753697 # Simulator instruction rate (inst/s)
+host_mem_usage 208744 # Number of bytes of host memory used
+host_seconds 227.33 # Real time elapsed on the host
+host_tick_rate 2495737915 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 398664609 # Number of instructions simulated
sim_seconds 0.567352 # Number of seconds simulated
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr
index b72d69553..19732539d 100755
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr
@@ -1,5 +1,4 @@
warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0. Starting simulation...
warn: Increasing stack size by one page.
getting pixel output filename pixels_out.cook
opening control file chair.control.cook
diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
index 6317641d5..caf805d08 100755
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
@@ -5,12 +5,13 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:19:23
-M5 executing on piton
+M5 compiled Nov 5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov 5 2008 18:58:04
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py long/30.eon/alpha/tru64/simple-timing
Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
Eon, Version 1.1
OO-style eon Time= 0.566667