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author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-15 14:04:05 -0600 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-15 14:04:05 -0600 |
commit | 371110fb0a8b5c687682c8ce1e1445eee1d3a7bc (patch) | |
tree | 9610ca973c18ed1270fba72f8040c8edf140d62d /tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr | |
parent | 005892719047c3b4b383d9aeeeb481039518f661 (diff) | |
download | gem5-371110fb0a8b5c687682c8ce1e1445eee1d3a7bc.tar.xz |
Regressions: Update regressions for SIMD opclass changes
Diffstat (limited to 'tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr')
-rwxr-xr-x | tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr index 1fdd222af..abaf1cb79 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr @@ -1,5 +1,11 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba warn: ignoring syscall sigprocmask(0, 1, ...) For more information see: http://www.m5sim.org/warn/5c5b547f warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) |