diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
| commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
| tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/40.perlbmk/ref | |
| parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
| download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz | |
Stats: Re update stats.
Diffstat (limited to 'tests/long/40.perlbmk/ref')
21 files changed, 249 insertions, 71 deletions
diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini index cbf5155cb..be2448eae 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=DerivO3CPU diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout index 7d9e000fc..79d6b4e40 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Jan 17 2011 16:24:53 -M5 revision f72d94f8c275 7839 default qtip tip outgoing.patch qbase -M5 started Jan 17 2011 16:24:57 -M5 executing on zizzer +M5 compiled Feb 7 2011 01:47:18 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:47:38 +M5 executing on burrito command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt index 63c7a2e36..375e28f85 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 156459 # Simulator instruction rate (inst/s) -host_mem_usage 213156 # Number of bytes of host memory used -host_seconds 11651.86 # Real time elapsed on the host -host_tick_rate 60063670 # Simulator tick rate (ticks/s) +host_inst_rate 179836 # Simulator instruction rate (inst/s) +host_mem_usage 233568 # Number of bytes of host memory used +host_seconds 10137.27 # Real time elapsed on the host +host_tick_rate 69037678 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1823043370 # Number of instructions simulated sim_seconds 0.699854 # Number of seconds simulated @@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle::total 1301001982 # Number of insts commited each cycle system.cpu.commit.COM:count 2008987604 # Number of instructions committed +system.cpu.commit.COM:fp_insts 71824891 # Number of committed floating point instructions. +system.cpu.commit.COM:function_calls 39955347 # Number of function calls committed. +system.cpu.commit.COM:int_insts 1778941351 # Number of committed integer instructions. system.cpu.commit.COM:loads 511070026 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed system.cpu.commit.COM:refs 721864922 # Number of memory references committed @@ -171,6 +174,8 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::total 1399572740 # Number of instructions fetched each cycle (Total) +system.cpu.fp_regfile_reads 79145201 # number of floating regfile reads +system.cpu.fp_regfile_writes 52656290 # number of floating regfile writes system.cpu.icache.ReadReq_accesses 346350693 # number of ReadReq accesses(hits+misses) system.cpu.icache.ReadReq_avg_miss_latency 15859.786377 # average ReadReq miss latency system.cpu.icache.ReadReq_avg_mshr_miss_latency 11646.165644 # average ReadReq mshr miss latency @@ -270,6 +275,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 92047647 # system.cpu.iew.memOrderViolationEvents 3569 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 787992 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 30086110 # Number of branches that were predicted taken incorrectly +system.cpu.int_regfile_reads 2538504149 # number of integer regfile reads +system.cpu.int_regfile_writes 1455287800 # number of integer regfile writes system.cpu.ipc 1.302446 # IPC: Instructions Per Cycle system.cpu.ipc_total 1.302446 # IPC: Total IPC of All Threads system.cpu.iq.ISSUE:FU_type_0::No_OpClass 2752 0.00% 0.00% # Type of FU issued @@ -361,6 +368,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle system.cpu.iq.ISSUE:issued_per_cycle::total 1399572740 # Number of insts issued each cycle system.cpu.iq.ISSUE:rate 1.488357 # Inst issue rate +system.cpu.iq.fp_alu_accesses 76224315 # Number of floating point alu accesses +system.cpu.iq.fp_inst_queue_reads 150190709 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_wakeup_accesses 73940522 # Number of floating instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_writes 77634670 # Number of floating instruction queue writes +system.cpu.iq.int_alu_accesses 2044010329 # Number of integer alu accesses +system.cpu.iq.int_inst_queue_reads 5465284170 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_wakeup_accesses 1924287563 # Number of integer instruction queue wakeup accesses +system.cpu.iq.int_inst_queue_writes 2854317928 # Number of integer instruction queue writes system.cpu.iq.iqInstsAdded 2377509698 # Number of instructions added to the IQ (excludes non-spec) system.cpu.iq.iqInstsIssued 2083264453 # Number of instructions issued system.cpu.iq.iqNonSpecInstsAdded 67 # Number of non-speculative instructions added to the IQ @@ -457,7 +472,11 @@ system.cpu.memDep0.conflictingLoads 118268475 # Nu system.cpu.memDep0.conflictingStores 21018090 # Number of conflicting stores. system.cpu.memDep0.insertedLoads 651766159 # Number of loads inserted to the mem dependence unit. system.cpu.memDep0.insertedStores 302842543 # Number of stores inserted to the mem dependence unit. +system.cpu.misc_regfile_reads 1 # number of misc regfile reads +system.cpu.misc_regfile_writes 1 # number of misc regfile writes system.cpu.numCycles 1399707092 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.rename.RENAME:BlockCycles 19659094 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 1384969070 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 672257 # Number of times rename has blocked due to IQ full @@ -471,10 +490,14 @@ system.cpu.rename.RENAME:RunCycles 542782008 # Nu system.cpu.rename.RENAME:SquashCycles 98570758 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 13186877 # Number of cycles rename is unblocking system.cpu.rename.RENAME:UndoneMaps 495793350 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:fp_rename_lookups 113413742 # Number of floating rename lookups +system.cpu.rename.RENAME:int_rename_lookups 3181273204 # Number of integer rename lookups system.cpu.rename.RENAME:serializeStallCycles 21539 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 2826 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 26818332 # count of insts added to the skid buffer system.cpu.rename.RENAME:tempSerializingInsts 73 # count of temporary serializing insts renamed +system.cpu.rob.rob_reads 3921848396 # The number of ROB reads +system.cpu.rob.rob_writes 5489856325 # The number of ROB writes system.cpu.timesIdled 3665 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu.workload.PROG:num_syscalls 39 # Number of system calls diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini index 233f88432..f80631f28 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=AtomicSimpleCPU @@ -57,7 +66,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/cpu2000/binaries/alpha/tru64/perlbmk +executable=/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr index 1fdd222af..abaf1cb79 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr @@ -1,5 +1,11 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba warn: ignoring syscall sigprocmask(0, 1, ...) For more information see: http://www.m5sim.org/warn/5c5b547f warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout index 7fa3cc9e1..b7ecd550d 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout @@ -1,5 +1,3 @@ -Redirecting stdout to build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-atomic/simout -Redirecting stderr to build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-atomic/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -7,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Nov 2 2010 21:30:55 -M5 revision 0af3760102ec+ 7713+ default qtip ext/alpha_prefetch.patch tip -M5 started Nov 2 2010 21:59:54 -M5 executing on aus-bc2-b15 +M5 compiled Feb 7 2011 01:47:18 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:47:37 +M5 executing on burrito command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt index c5afc67b3..855c5964e 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 5515431 # Simulator instruction rate (inst/s) -host_mem_usage 238276 # Number of bytes of host memory used -host_seconds 364.25 # Real time elapsed on the host -host_tick_rate 2758309260 # Simulator tick rate (ticks/s) +host_inst_rate 1477901 # Simulator instruction rate (inst/s) +host_mem_usage 224424 # Number of bytes of host memory used +host_seconds 1359.35 # Real time elapsed on the host +host_tick_rate 739109964 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2008987605 # Number of instructions simulated sim_seconds 1.004711 # Number of seconds simulated @@ -43,8 +43,24 @@ system.cpu.itb.write_hits 0 # DT system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 2009421175 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 2009421175 # Number of busy cycles +system.cpu.num_conditional_control_insts 172959296 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 71831671 # Number of float alu accesses +system.cpu.num_fp_insts 71831671 # number of float instructions +system.cpu.num_fp_register_reads 77066699 # number of times the floating registers were read +system.cpu.num_fp_register_writes 52280770 # number of times the floating registers were written +system.cpu.num_func_calls 79910682 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 2008987605 # Number of instructions executed -system.cpu.num_refs 722298387 # Number of memory references +system.cpu.num_int_alu_accesses 1779374816 # Number of integer alu accesses +system.cpu.num_int_insts 1779374816 # number of integer instructions +system.cpu.num_int_register_reads 2314712013 # number of times the integer registers were read +system.cpu.num_int_register_writes 1332688300 # number of times the integer registers were written +system.cpu.num_load_insts 511488910 # Number of load instructions +system.cpu.num_mem_refs 722298387 # number of memory refs +system.cpu.num_store_insts 210809477 # Number of store instructions system.cpu.workload.PROG:num_syscalls 39 # Number of system calls ---------- End Simulation Statistics ---------- diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini index f0aef1670..9be1cb679 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=TimingSimpleCPU @@ -157,7 +166,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/cpu2000/binaries/alpha/tru64/perlbmk +executable=/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr index 1fdd222af..abaf1cb79 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr @@ -1,5 +1,11 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba +warn: Prefetch instrutions is Alpha do not do anything +For more information see: http://www.m5sim.org/warn/3e0eccba warn: ignoring syscall sigprocmask(0, 1, ...) For more information see: http://www.m5sim.org/warn/5c5b547f warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout index fcac3af61..03731b56d 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout @@ -1,5 +1,3 @@ -Redirecting stdout to build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-timing/simout -Redirecting stderr to build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-timing/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -7,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Nov 2 2010 21:30:55 -M5 revision 0af3760102ec+ 7713+ default qtip ext/alpha_prefetch.patch tip -M5 started Nov 2 2010 22:06:01 -M5 executing on aus-bc2-b15 +M5 compiled Feb 7 2011 01:47:18 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:47:38 +M5 executing on burrito command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt index 0d35bbf18..c88cbd8f6 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2134538 # Simulator instruction rate (inst/s) -host_mem_usage 246068 # Number of bytes of host memory used -host_seconds 941.18 # Real time elapsed on the host -host_tick_rate 2989292617 # Simulator tick rate (ticks/s) +host_inst_rate 584935 # Simulator instruction rate (inst/s) +host_mem_usage 232204 # Number of bytes of host memory used +host_seconds 3434.55 # Real time elapsed on the host +host_tick_rate 819166202 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2008987605 # Number of instructions simulated sim_seconds 2.813468 # Number of seconds simulated @@ -232,8 +232,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 66898 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 5626935684 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 5626935684 # Number of busy cycles +system.cpu.num_conditional_control_insts 172959296 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 71831671 # Number of float alu accesses +system.cpu.num_fp_insts 71831671 # number of float instructions +system.cpu.num_fp_register_reads 77066699 # number of times the floating registers were read +system.cpu.num_fp_register_writes 52280770 # number of times the floating registers were written +system.cpu.num_func_calls 79910682 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 2008987605 # Number of instructions executed -system.cpu.num_refs 722298387 # Number of memory references +system.cpu.num_int_alu_accesses 1779374816 # Number of integer alu accesses +system.cpu.num_int_insts 1779374816 # number of integer instructions +system.cpu.num_int_register_reads 2314712013 # number of times the integer registers were read +system.cpu.num_int_register_writes 1332688300 # number of times the integer registers were written +system.cpu.num_load_insts 511488910 # Number of load instructions +system.cpu.num_mem_refs 722298387 # number of memory refs +system.cpu.num_store_insts 210809477 # Number of store instructions system.cpu.workload.PROG:num_syscalls 39 # Number of system calls ---------- End Simulation Statistics ---------- diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini index 0ccefb2ad..3820d828c 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=DerivO3CPU @@ -484,7 +493,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout index 32de132ae..ddea5239d 100755 --- a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Jan 11 2011 18:16:01 -M5 revision b39a8457b332 7816 default ext/o3_regressions.patch qtip tip -M5 started Jan 12 2011 03:34:31 -M5 executing on u200439-lin.austin.arm.com +M5 compiled Feb 7 2011 01:56:16 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 02:00:50 +M5 executing on burrito command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt index 46557403f..a1dda945d 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 126560 # Simulator instruction rate (inst/s) -host_mem_usage 258084 # Number of bytes of host memory used -host_seconds 14568.38 # Real time elapsed on the host -host_tick_rate 75985562 # Simulator tick rate (ticks/s) +host_inst_rate 139604 # Simulator instruction rate (inst/s) +host_mem_usage 244852 # Number of bytes of host memory used +host_seconds 13207.13 # Real time elapsed on the host +host_tick_rate 83817309 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1843766922 # Number of instructions simulated sim_seconds 1.106986 # Number of seconds simulated @@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle::total 2026425019 # Number of insts commited each cycle system.cpu.commit.COM:count 1843766922 # Number of instructions committed +system.cpu.commit.COM:fp_insts 52289415 # Number of committed floating point instructions. +system.cpu.commit.COM:function_calls 0 # Number of function calls committed. +system.cpu.commit.COM:int_insts 1619025870 # Number of committed integer instructions. system.cpu.commit.COM:loads 631405848 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed system.cpu.commit.COM:refs 908401145 # Number of memory references committed @@ -171,6 +174,8 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::total 2213708436 # Number of instructions fetched each cycle (Total) +system.cpu.fp_regfile_reads 66048246 # number of floating regfile reads +system.cpu.fp_regfile_writes 52282096 # number of floating regfile writes system.cpu.icache.ReadReq_accesses 400588369 # number of ReadReq accesses(hits+misses) system.cpu.icache.ReadReq_avg_miss_latency 8967.410787 # average ReadReq miss latency system.cpu.icache.ReadReq_avg_mshr_miss_latency 5871.276669 # average ReadReq mshr miss latency @@ -270,6 +275,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 210074657 # system.cpu.iew.memOrderViolationEvents 2755264 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 45730558 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 48147488 # Number of branches that were predicted taken incorrectly +system.cpu.int_regfile_reads 5403725947 # number of integer regfile reads +system.cpu.int_regfile_writes 1668305359 # number of integer regfile writes system.cpu.ipc 0.832787 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.832787 # IPC: Total IPC of All Threads system.cpu.iq.ISSUE:FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued @@ -361,6 +368,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle system.cpu.iq.ISSUE:issued_per_cycle::total 2213708436 # Number of insts issued each cycle system.cpu.iq.ISSUE:rate 1.104443 # Inst issue rate +system.cpu.iq.fp_alu_accesses 64689412 # Number of floating point alu accesses +system.cpu.iq.fp_inst_queue_reads 126628637 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_wakeup_accesses 56420382 # Number of floating instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_writes 101846831 # Number of floating instruction queue writes +system.cpu.iq.int_alu_accesses 2441240602 # Number of integer alu accesses +system.cpu.iq.int_inst_queue_reads 7046560079 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_wakeup_accesses 2188392805 # Number of integer instruction queue wakeup accesses +system.cpu.iq.int_inst_queue_writes 4055397012 # Number of integer instruction queue writes system.cpu.iq.iqInstsAdded 3002770977 # Number of instructions added to the IQ (excludes non-spec) system.cpu.iq.iqInstsIssued 2445205760 # Number of instructions issued system.cpu.iq.iqNonSpecInstsAdded 9835077 # Number of non-speculative instructions added to the IQ @@ -470,7 +485,11 @@ system.cpu.memDep0.conflictingLoads 48375882 # Nu system.cpu.memDep0.conflictingStores 167873780 # Number of conflicting stores. system.cpu.memDep0.insertedLoads 976823890 # Number of loads inserted to the mem dependence unit. system.cpu.memDep0.insertedStores 487069954 # Number of stores inserted to the mem dependence unit. +system.cpu.misc_regfile_reads 4207984120 # number of misc regfile reads +system.cpu.misc_regfile_writes 14227476 # number of misc regfile writes system.cpu.numCycles 2213972582 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.rename.RENAME:BlockCycles 17658494 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 1482327508 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 4825678 # Number of times rename has blocked due to IQ full @@ -484,10 +503,14 @@ system.cpu.rename.RENAME:RunCycles 880460602 # Nu system.cpu.rename.RENAME:SquashCycles 187283417 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 23975327 # Number of cycles rename is unblocking system.cpu.rename.RENAME:UndoneMaps 1203658997 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:fp_rename_lookups 485863672 # Number of floating rename lookups +system.cpu.rename.RENAME:int_rename_lookups 8770011391 # Number of integer rename lookups system.cpu.rename.RENAME:serializeStallCycles 185210215 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 19466962 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 226114375 # count of insts added to the skid buffer system.cpu.rename.RENAME:tempSerializingInsts 13965391 # count of temporary serializing insts renamed +system.cpu.rob.rob_reads 4997592572 # The number of ROB reads +system.cpu.rob.rob_writes 6212467818 # The number of ROB writes system.cpu.timesIdled 87015 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu.workload.PROG:num_syscalls 1411 # Number of system calls diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini index ecd3fff8c..97cb6c6e4 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=AtomicSimpleCPU @@ -52,12 +61,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=perlbmk -I. -I lib lgred.makerand.pl -cwd=build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-atomic +cwd=build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-atomic egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simout b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simout index 6f1aaca4d..e6fdba858 100755 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simout +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Oct 11 2010 18:37:23 -M5 revision c4e3d74d9a68 7726 default ext/mp_boot.patch qtip tip -M5 started Oct 11 2010 19:04:52 -M5 executing on aus-bc3-b4 -command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-atomic +M5 compiled Feb 7 2011 01:56:16 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:56:24 +M5 executing on burrito +command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt index 62cb1fa61..807917422 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2747008 # Simulator instruction rate (inst/s) -host_mem_usage 259372 # Number of bytes of host memory used -host_seconds 671.19 # Real time elapsed on the host -host_tick_rate 1377891283 # Simulator tick rate (ticks/s) +host_inst_rate 966272 # Simulator instruction rate (inst/s) +host_mem_usage 234680 # Number of bytes of host memory used +host_seconds 1908.12 # Real time elapsed on the host +host_tick_rate 484679459 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1843766922 # Number of instructions simulated sim_seconds 0.924828 # Number of seconds simulated @@ -53,8 +53,24 @@ system.cpu.itb.write_hits 0 # DT system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 1849656818 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 1849656818 # Number of busy cycles +system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 52289415 # Number of float alu accesses +system.cpu.num_fp_insts 52289415 # number of float instructions +system.cpu.num_fp_register_reads 60540850 # number of times the floating registers were read +system.cpu.num_fp_register_writes 46777010 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 1843766922 # Number of instructions executed -system.cpu.num_refs 908401146 # Number of memory references +system.cpu.num_int_alu_accesses 1619025871 # Number of integer alu accesses +system.cpu.num_int_insts 1619025871 # number of integer instructions +system.cpu.num_int_register_reads 4830749754 # number of times the integer registers were read +system.cpu.num_int_register_writes 1365217022 # number of times the integer registers were written +system.cpu.num_load_insts 631405848 # Number of load instructions +system.cpu.num_mem_refs 908401146 # number of memory refs +system.cpu.num_store_insts 276995298 # Number of store instructions system.cpu.workload.PROG:num_syscalls 1411 # Number of system calls ---------- End Simulation Statistics ---------- diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini index 32ec6dcf7..dfd8de545 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=TimingSimpleCPU @@ -152,12 +161,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=perlbmk -I. -I lib lgred.makerand.pl -cwd=build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-timing +cwd=build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-timing egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simerr b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simerr index 805a6606f..d834843e9 100755 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simerr +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simerr @@ -1,5 +1,11 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 +warn: Complete acc isn't called on normal stores in O3. +For more information see: http://www.m5sim.org/warn/138d8573 +warn: Complete acc isn't called on normal stores in O3. +For more information see: http://www.m5sim.org/warn/138d8573 +warn: Complete acc isn't called on normal stores in O3. +For more information see: http://www.m5sim.org/warn/138d8573 warn: fcntl64(3, 2) passed through to host For more information see: http://www.m5sim.org/warn/a55e2c46 hack: be nice to actually delete the event here diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simout b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simout index 850a4596a..b556adbf3 100755 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simout +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Oct 11 2010 18:37:23 -M5 revision c4e3d74d9a68 7726 default ext/mp_boot.patch qtip tip -M5 started Oct 11 2010 18:41:18 -M5 executing on aus-bc3-b4 -command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/opt/long/40.perlbmk/arm/linux/simple-timing +M5 compiled Feb 7 2011 01:56:16 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:56:25 +M5 executing on burrito +command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. diff --git a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/stats.txt b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/stats.txt index 2158e673a..1e3225702 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/arm/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 628678 # Simulator instruction rate (inst/s) -host_mem_usage 267092 # Number of bytes of host memory used -host_seconds 2915.13 # Real time elapsed on the host -host_tick_rate 812964589 # Simulator tick rate (ticks/s) +host_inst_rate 494422 # Simulator instruction rate (inst/s) +host_mem_usage 242392 # Number of bytes of host memory used +host_seconds 3706.70 # Real time elapsed on the host +host_tick_rate 639353926 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1832675505 # Number of instructions simulated sim_seconds 2.369896 # Number of seconds simulated @@ -242,8 +242,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 66099 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 4739792356 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 4739792356 # Number of busy cycles +system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 52289415 # Number of float alu accesses +system.cpu.num_fp_insts 52289415 # number of float instructions +system.cpu.num_fp_register_reads 60540850 # number of times the floating registers were read +system.cpu.num_fp_register_writes 46777010 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 1832675505 # Number of instructions executed -system.cpu.num_refs 908401146 # Number of memory references +system.cpu.num_int_alu_accesses 1619025871 # Number of integer alu accesses +system.cpu.num_int_insts 1619025871 # number of integer instructions +system.cpu.num_int_register_reads 5455211671 # number of times the integer registers were read +system.cpu.num_int_register_writes 1365288731 # number of times the integer registers were written +system.cpu.num_load_insts 631405848 # Number of load instructions +system.cpu.num_mem_refs 908401146 # number of memory refs +system.cpu.num_store_insts 276995298 # Number of store instructions system.cpu.workload.PROG:num_syscalls 1411 # Number of system calls ---------- End Simulation Statistics ---------- |