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author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-11 19:06:46 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-11 19:06:46 -0400 |
commit | d9c3b636b0f85d5585d7a26ea8d64a2c5b4db024 (patch) | |
tree | d892a28f1fc02c2ac1187b3ca8647c84b213cd1f /tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt | |
parent | 26f440c44e5e85dc3e03371d08a1e6587e5f50cf (diff) | |
download | gem5-d9c3b636b0f85d5585d7a26ea8d64a2c5b4db024.tar.xz |
vortex is a tru64 regression and not linux
--HG--
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/config.ini => tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/config.out => tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/smred.msg => tests/long/50.vortex/ref/alpha/tru64/o3-timing/smred.msg
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/smred.out => tests/long/50.vortex/ref/alpha/tru64/o3-timing/smred.out
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr
rename : tests/long/50.vortex/ref/alpha/linux/o3-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.ini => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.out => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.out
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/smred.msg => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/smred.out => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/smred.out
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr
rename : tests/long/50.vortex/ref/alpha/linux/simple-atomic/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/config.ini => tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/config.out => tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.out
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/smred.msg => tests/long/50.vortex/ref/alpha/tru64/simple-timing/smred.msg
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/smred.out => tests/long/50.vortex/ref/alpha/tru64/simple-timing/smred.out
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr
rename : tests/long/50.vortex/ref/alpha/linux/simple-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
extra : convert_revision : b62b8949628327d0a0ed2971772aa4f848764d54
Diffstat (limited to 'tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt')
-rw-r--r-- | tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt new file mode 100644 index 000000000..9c60e1316 --- /dev/null +++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt @@ -0,0 +1,18 @@ + +---------- Begin Simulation Statistics ---------- +host_inst_rate 1347543 # Simulator instruction rate (inst/s) +host_mem_usage 179988 # Number of bytes of host memory used +host_seconds 65.56 # Real time elapsed on the host +host_tick_rate 1347535 # Simulator tick rate (ticks/s) +sim_freq 1000000000000 # Frequency of simulated ticks +sim_insts 88340674 # Number of instructions simulated +sim_seconds 0.000088 # Number of seconds simulated +sim_ticks 88340673 # Number of ticks simulated +system.cpu.idle_fraction 0 # Percentage of idle cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.numCycles 88340674 # number of cpu cycles simulated +system.cpu.num_insts 88340674 # Number of instructions executed +system.cpu.num_refs 35224019 # Number of memory references +system.cpu.workload.PROG:num_syscalls 4583 # Number of system calls + +---------- End Simulation Statistics ---------- |