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authorSteve Reinhardt <stever@gmail.com>2009-04-22 01:55:52 -0400
committerSteve Reinhardt <stever@gmail.com>2009-04-22 01:55:52 -0400
commit7b40c36fbd1c348e5ef43231325923aae1cd0809 (patch)
treeb1d142d10229a7ca68eff864aa9aae672230e41a /tests/long/50.vortex/ref/alpha
parent6629d9b2bc58a885bfebce1517fd12483497b6e4 (diff)
downloadgem5-7b40c36fbd1c348e5ef43231325923aae1cd0809.tar.xz
Update stats for new single bad-address responder.
Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
Diffstat (limited to 'tests/long/50.vortex/ref/alpha')
-rw-r--r--tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini13
-rwxr-xr-xtests/long/50.vortex/ref/alpha/tru64/o3-timing/simout10
-rw-r--r--tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt8
-rwxr-xr-xtests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout8
-rw-r--r--tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt8
-rw-r--r--tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini9
-rwxr-xr-xtests/long/50.vortex/ref/alpha/tru64/simple-timing/simout8
-rw-r--r--tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt8
8 files changed, 33 insertions, 39 deletions
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index e2f1cbbca..33c06f76d 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -104,11 +104,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -277,11 +276,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -313,11 +311,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -356,12 +353,12 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=vortex lendian.raw
-cwd=build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing
+cwd=build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/o3-timing
egid=100
env=
errout=cerr
euid=100
-executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/vortex
+executable=/dist/m5/cpu2000/binaries/alpha/tru64/vortex
gid=100
input=cin
max_stack_size=67108864
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout
index f4ca6413a..689b74dbf 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 14 2009 23:40:03
-M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update
-M5 started Apr 14 2009 23:40:05
-M5 executing on phenom
-command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/o3-timing
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 16:52:32
+M5 executing on zizzer
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
index bae501a90..99db99027 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 213847 # Simulator instruction rate (inst/s)
-host_mem_usage 218620 # Number of bytes of host memory used
-host_seconds 372.19 # Real time elapsed on the host
-host_tick_rate 72905538 # Simulator tick rate (ticks/s)
+host_inst_rate 274491 # Simulator instruction rate (inst/s)
+host_mem_usage 215172 # Number of bytes of host memory used
+host_seconds 289.96 # Real time elapsed on the host
+host_tick_rate 93580527 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 79591756 # Number of instructions simulated
sim_seconds 0.027135 # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout
index cac080f34..9dd7f1f1a 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr 8 2009 12:43:53
-M5 executing on maize
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 16:57:23
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
index 25afd1229..aa4c8889a 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 5274353 # Simulator instruction rate (inst/s)
-host_mem_usage 207596 # Number of bytes of host memory used
-host_seconds 16.75 # Real time elapsed on the host
-host_tick_rate 2640164541 # Simulator tick rate (ticks/s)
+host_inst_rate 5366735 # Simulator instruction rate (inst/s)
+host_mem_usage 205860 # Number of bytes of host memory used
+host_seconds 16.46 # Real time elapsed on the host
+host_tick_rate 2686413423 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 88340673 # Number of instructions simulated
sim_seconds 0.044221 # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
index bec56725b..f5ae96163 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
@@ -40,11 +40,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -76,11 +75,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=1000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
@@ -112,11 +110,10 @@ type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
hash_delay=1
latency=10000
max_miss_count=0
-mem_side_filter_ranges=
mshrs=10
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout
index 621e65c84..b076edccd 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr 8 2009 12:30:03
-M5 executing on maize
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 16:43:17
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
index a690b2e36..cd99a1a3e 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2447162 # Simulator instruction rate (inst/s)
-host_mem_usage 215136 # Number of bytes of host memory used
-host_seconds 36.10 # Real time elapsed on the host
-host_tick_rate 3744340356 # Simulator tick rate (ticks/s)
+host_inst_rate 1524580 # Simulator instruction rate (inst/s)
+host_mem_usage 213492 # Number of bytes of host memory used
+host_seconds 57.94 # Real time elapsed on the host
+host_tick_rate 2332726052 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 88340673 # Number of instructions simulated
sim_seconds 0.135169 # Number of seconds simulated