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author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:06 -0600 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:06 -0600 |
commit | f7885b8f260ca11c2f4a405525d9fc4e554f41a8 (patch) | |
tree | 7843d9030dd422473d7efd5a4e2a0fd787e2b7f8 /tests/long/50.vortex/ref/arm/linux/o3-timing/simout | |
parent | 9b67f3723e48efdd0a0b640ff82cfcf8aad3a659 (diff) | |
download | gem5-f7885b8f260ca11c2f4a405525d9fc4e554f41a8.tar.xz |
ARM/O3: Add regressions for ARM w/ O3 CPU.
Diffstat (limited to 'tests/long/50.vortex/ref/arm/linux/o3-timing/simout')
-rwxr-xr-x | tests/long/50.vortex/ref/arm/linux/o3-timing/simout | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/long/50.vortex/ref/arm/linux/o3-timing/simout b/tests/long/50.vortex/ref/arm/linux/o3-timing/simout new file mode 100755 index 000000000..4650e6a0c --- /dev/null +++ b/tests/long/50.vortex/ref/arm/linux/o3-timing/simout @@ -0,0 +1,18 @@ +Redirecting stdout to build/ARM_SE/tests/fast/long/50.vortex/arm/linux/o3-timing/simout +Redirecting stderr to build/ARM_SE/tests/fast/long/50.vortex/arm/linux/o3-timing/simerr +M5 Simulator System + +Copyright (c) 2001-2008 +The Regents of The University of Michigan +All Rights Reserved + + +M5 compiled Jan 18 2011 03:54:36 +M5 revision 218f733923f8 7861 default qtip int/arm_gdb.patch tip +M5 started Jan 18 2011 04:19:02 +M5 executing on aus-bc2-b9 +command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/50.vortex/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/long/50.vortex/arm/linux/o3-timing +Global frequency set at 1000000000000 ticks per second +info: Entering event queue @ 0. Starting simulation... +info: Increasing stack size by one page. +Exiting @ tick 59259979500 because target called exit() |