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author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt | |
parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz |
Stats: Re update stats.
Diffstat (limited to 'tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt')
-rw-r--r-- | tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt b/tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt index c8769189d..ca56969f4 100644 --- a/tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 156565 # Simulator instruction rate (inst/s) -host_mem_usage 260328 # Number of bytes of host memory used -host_seconds 631.29 # Real time elapsed on the host -host_tick_rate 93871242 # Simulator tick rate (ticks/s) +host_inst_rate 60156 # Simulator instruction rate (inst/s) +host_mem_usage 246816 # Number of bytes of host memory used +host_seconds 1643.03 # Real time elapsed on the host +host_tick_rate 36067570 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 98838077 # Number of instructions simulated sim_seconds 0.059260 # Number of seconds simulated @@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle::total 114018884 # Number of insts commited each cycle system.cpu.commit.COM:count 98838077 # Number of instructions committed +system.cpu.commit.COM:fp_insts 56 # Number of committed floating point instructions. +system.cpu.commit.COM:function_calls 0 # Number of function calls committed. +system.cpu.commit.COM:int_insts 89710266 # Number of committed integer instructions. system.cpu.commit.COM:loads 27315295 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed system.cpu.commit.COM:refs 47871033 # Number of memory references committed @@ -171,6 +174,8 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::total 117533456 # Number of instructions fetched each cycle (Total) +system.cpu.fp_regfile_reads 58 # number of floating regfile reads +system.cpu.fp_regfile_writes 40 # number of floating regfile writes system.cpu.icache.ReadReq_accesses 12122688 # number of ReadReq accesses(hits+misses) system.cpu.icache.ReadReq_avg_miss_latency 12759.423411 # average ReadReq miss latency system.cpu.icache.ReadReq_avg_mshr_miss_latency 9476.994450 # average ReadReq mshr miss latency @@ -270,6 +275,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 2833293 # system.cpu.iew.memOrderViolationEvents 39532 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 1768227 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 860228 # Number of branches that were predicted taken incorrectly +system.cpu.int_regfile_reads 255816186 # number of integer regfile reads +system.cpu.int_regfile_writes 78479487 # number of integer regfile writes system.cpu.ipc 0.833936 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.833936 # IPC: Total IPC of All Threads system.cpu.iq.ISSUE:FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued @@ -361,6 +368,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle system.cpu.iq.ISSUE:issued_per_cycle::total 117533456 # Number of insts issued each cycle system.cpu.iq.ISSUE:rate 0.920997 # Inst issue rate +system.cpu.iq.fp_alu_accesses 187 # Number of floating point alu accesses +system.cpu.iq.fp_inst_queue_reads 370 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_wakeup_accesses 59 # Number of floating instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_writes 568 # Number of floating instruction queue writes +system.cpu.iq.int_alu_accesses 110479458 # Number of integer alu accesses +system.cpu.iq.int_inst_queue_reads 337237563 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_wakeup_accesses 104978377 # Number of integer instruction queue wakeup accesses +system.cpu.iq.int_inst_queue_writes 134232957 # Number of integer instruction queue writes system.cpu.iq.iqInstsAdded 116084938 # Number of instructions added to the IQ (excludes non-spec) system.cpu.iq.iqInstsIssued 109156507 # Number of instructions issued system.cpu.iq.iqNonSpecInstsAdded 1016199 # Number of non-speculative instructions added to the IQ @@ -473,7 +488,11 @@ system.cpu.memDep0.conflictingLoads 7990320 # Nu system.cpu.memDep0.conflictingStores 10924699 # Number of conflicting stores. system.cpu.memDep0.insertedLoads 32508348 # Number of loads inserted to the mem dependence unit. system.cpu.memDep0.insertedStores 23389031 # Number of stores inserted to the mem dependence unit. +system.cpu.misc_regfile_reads 153116651 # number of misc regfile reads +system.cpu.misc_regfile_writes 1948149 # number of misc regfile writes system.cpu.numCycles 118519960 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.rename.RENAME:BlockCycles 1866194 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 74745628 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 1883 # Number of times rename has blocked due to IQ full @@ -487,10 +506,14 @@ system.cpu.rename.RENAME:RunCycles 68672790 # Nu system.cpu.rename.RENAME:SquashCycles 3514572 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 1591233 # Number of cycles rename is unblocking system.cpu.rename.RENAME:UndoneMaps 18613027 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:fp_rename_lookups 83717 # Number of floating rename lookups +system.cpu.rename.RENAME:int_rename_lookups 333328918 # Number of integer rename lookups system.cpu.rename.RENAME:serializeStallCycles 11499162 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 818368 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 3724500 # count of insts added to the skid buffer system.cpu.rename.RENAME:tempSerializingInsts 819368 # count of temporary serializing insts renamed +system.cpu.rob.rob_reads 229794357 # The number of ROB reads +system.cpu.rob.rob_writes 237655572 # The number of ROB writes system.cpu.timesIdled 60726 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu.workload.PROG:num_syscalls 1946 # Number of system calls |