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author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-08-25 19:10:42 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-08-25 19:10:42 -0500 |
commit | e6d3fe8a0c02e0692444399e63e6c5ce6c3abd17 (patch) | |
tree | c8cc90c2577733fa32cd6250a9488450f65d8335 /tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt | |
parent | 4d8f4db8d135a23ceb5d54d3096e0598dd31e2fe (diff) | |
download | gem5-e6d3fe8a0c02e0692444399e63e6c5ce6c3abd17.tar.xz |
ARM: Update regression tests for ldr/str microcode changes.
Diffstat (limited to 'tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt')
-rw-r--r-- | tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt b/tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt index 54b57c099..8b5b713cb 100644 --- a/tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt +++ b/tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt @@ -1,13 +1,13 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 4246205 # Simulator instruction rate (inst/s) -host_mem_usage 204740 # Number of bytes of host memory used -host_seconds 23.16 # Real time elapsed on the host -host_tick_rate 2279192640 # Simulator tick rate (ticks/s) +host_inst_rate 2664701 # Simulator instruction rate (inst/s) +host_mem_usage 209976 # Number of bytes of host memory used +host_seconds 37.09 # Real time elapsed on the host +host_tick_rate 1429827283 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 98353426 # Number of instructions simulated -sim_seconds 0.052793 # Number of seconds simulated -sim_ticks 52792656500 # Number of ticks simulated +sim_insts 98838077 # Number of instructions simulated +sim_seconds 0.053035 # Number of seconds simulated +sim_ticks 53034982000 # Number of ticks simulated system.cpu.dtb.accesses 0 # DTB accesses system.cpu.dtb.hits 0 # DTB hits system.cpu.dtb.misses 0 # DTB misses @@ -28,8 +28,8 @@ system.cpu.itb.write_accesses 0 # DT system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.numCycles 105585314 # number of cpu cycles simulated -system.cpu.num_insts 98353426 # Number of instructions executed +system.cpu.numCycles 106069965 # number of cpu cycles simulated +system.cpu.num_insts 98838077 # Number of instructions executed system.cpu.num_refs 47871034 # Number of memory references system.cpu.workload.PROG:num_syscalls 1946 # Number of system calls |