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authorAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:31 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:31 -0500
commitb20e92e1ca36486b9f01fa7df7e8cc8a87d17dcb (patch)
treee391e796f376b0401ce34e724bad675b80345b68 /tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt
parent8af1eeec6f28d9722802bf1588c911711db07ddd (diff)
downloadgem5-b20e92e1ca36486b9f01fa7df7e8cc8a87d17dcb.tar.xz
ARM: Update stats for previous changes.
Diffstat (limited to 'tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt')
-rw-r--r--tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt14
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt b/tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt
index 310405f1b..0bdccd82b 100644
--- a/tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 759848 # Simulator instruction rate (inst/s)
-host_mem_usage 261720 # Number of bytes of host memory used
-host_seconds 131.33 # Real time elapsed on the host
-host_tick_rate 1013599729 # Simulator tick rate (ticks/s)
+host_inst_rate 558313 # Simulator instruction rate (inst/s)
+host_mem_usage 262448 # Number of bytes of host memory used
+host_seconds 178.74 # Real time elapsed on the host
+host_tick_rate 744762819 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 99791663 # Number of instructions simulated
sim_seconds 0.133117 # Number of seconds simulated
@@ -249,18 +249,18 @@ system.cpu.numCycles 266234884 # nu
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.num_busy_cycles 266234884 # Number of busy cycles
-system.cpu.num_conditional_control_insts 8896554 # number of instructions that are conditional controls
+system.cpu.num_conditional_control_insts 8920660 # number of instructions that are conditional controls
system.cpu.num_fp_alu_accesses 56 # Number of float alu accesses
system.cpu.num_fp_insts 56 # number of float instructions
system.cpu.num_fp_register_reads 36 # number of times the floating registers were read
system.cpu.num_fp_register_writes 20 # number of times the floating registers were written
-system.cpu.num_func_calls 3336597 # number of times a function call or return occured
+system.cpu.num_func_calls 3287514 # number of times a function call or return occured
system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 99791663 # Number of instructions executed
system.cpu.num_int_alu_accesses 91472788 # Number of integer alu accesses
system.cpu.num_int_insts 91472788 # number of integer instructions
system.cpu.num_int_register_reads 288972903 # number of times the integer registers were read
-system.cpu.num_int_register_writes 75127954 # number of times the integer registers were written
+system.cpu.num_int_register_writes 73126599 # number of times the integer registers were written
system.cpu.num_load_insts 27307109 # Number of load instructions
system.cpu.num_mem_refs 47862848 # number of memory refs
system.cpu.num_store_insts 20555739 # Number of store instructions